Sony Playstation-2 VPU: A Study on the Feasibility of Utilizing Gaming Vector Hardware for Scientific Computing
By Pavan Tumati Advisors: Professor Sanjay Patel and Professor Todd Martinez ECE298/299 5/16/03
2 Abstract One of the driving forces pushing the demand for increased computational power in consumeroriented devices is the video game industry. Video games, in the past decade, have demonstrated an insatiable desire for computing hardware that accelerates a certain subset of mathematical operations related to efficient rendering of graphical objects on the computer screen. Quite conveniently, these same mathematical operations used to accelerate computer graphics also are capable of accelerating common operations in the realm of scientific computing. Sony Corporation has invested quite heavily in producing complete computing platforms to accelerate computer graphics. Its offering, the Sony Playstation-2, exposes to software developers a wide array of computational devices that specifically assist in accelerating common graphics related operations, such as vector mathematics. In addition, Sony has offered to the developer community the open-source Linux operating system. The combination of Linux, open source development tools, and detailed developer information allows for the investigation of the feasibility of future use of commodity video gaming hardware for the acceleration of scientific calculations. This document details our investigation and assessment of the potential of the Playstation-2 for scientific computing.

Table of Contents:

Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8 Bibliography/References System Overview, Resources, and Expectations Establishing A Performance Metric and Basic Tests Macromode Performance Analysis and Experiment Construction Micromode Analysis and Test Construction Micromode VPU + FPU Usage Analysis Alleviating Bottlenecks in Performance New Directions in Performance Analysis and Test Development Results and Feasibility of Usage Assessment
Chapter 1 - System Overview, Resources, Expectations and Results
The core of the Playstation-2 is popularly known as the Emotion Engine. The Emotion Engine is a collection of various subsystems which are, as described in Sonys manual, an effort to have the highest performance by adopting the latest technology and the most advanced manufacturing technology from the early stages, in order to secure a long product life with performance at the point of sale kept unchanged. Some of the advertised features are fast rendering, multi-path geometry, on-demand data decompression, application specific processors, and data path buffering in whats labeled a unified memory architecture, or simply UMA. A block diagram of the overall system substantiates some of Sonys claims:
Figure 1: Block Diagram of Emotion Engine Core (Adapted from EE Overview Manual, Sony Corporation)
The CPU, Vector Processing Unit (VPU), FPU, scratchpad ram, the instruction and data caches are all collectively labeled the EE Core. The CPU implements the superscalar 64-bit MIPS IV instruction set architecture. The instruction cache is 16Kbytes in size, and is two-way set associative. The data cache is 8Kbytes in size, two-way set associative, and supports a write-back protocol. The EE core features two vector operation processors contained within the VPU Unit for floating point vector operations. These vector units are intended to accelerate geometric calculations. The two vector operation processors within the VPU are known as VU0 and VU1. VU0 is connected to the CPU via a 128-bit wide coprocessor bus. Because of this connection, it is possible to issue to the VPU, from the CPU, what are known as macro instructions to do mathematical operations in VU0 hardware. (It is not possible, however, to issue macro instructions to VU1, because of the lack of a connecting bus between the CPU and VU1 registers.) Also, the VU0 and VU1 are connected to separate units, known as vector interface units (VIFs), VIF0 and VIF1. The VIF units can decompress packets of information transferred via DMA into the local memories of VU0 and VU1. It is important to mention that the registers of the vector units are 128-bits wide, and conveniently accommodate vectors containing four 32-
5 bit floating point elements. Finally, VU1 is connected to the graphics synthesizer (GS) via the graphics interface unit (GIF.) For scientific computing applications on the Playstation-2, the CPU, VPU, VIF, and DMA units are of primary interest. The primary goal of the research detailed in this document is to utilize the Playstation-2s CPU, VPU, VIF, and DMA units to achieve high throughput for mathematical operations, especially linear algebra types of operations which dominate quantum chemical applications and are expected to be a strength of the PS2 architecture. The most significant computational unit in the PS2 is the VPU; in this document, the CPU, VIF, and DMA are primarily seen as external units whose sole purpose is largely only to keep the VPU fed with data. Therefore, it is important to give a brief introduction to the overall architecture and facilities of the VPU.

Figure 2: Block Diagram of EE Core Vector Units (Adapted from EE Overview Manual, Sony Corporation)
According to Sonys VU Users Manual, VU0 and VU1 both have the same basic architecture. That is, both possess data memory (VUmem), a VIF, several floating-point multiply-add ALUs (FMACs), a floating point divide calculator unit (FDIV), 32 four-parallel floating-point registers, 16-integer registers, and program memory (MicroMem.) There are two general modes of operation for the VPU: macromode and micromode. In macromode, the CPU utilizes coprocessor bus 2 (COP2) to issue macro instructions to the VPU, which then utilizes VU0 to complete a given task. In macromode, the CPU sees the registers of VU0 and can transfer information back and forth directly between its own general purpose registers and that of VU0. One of the benefits of having the COP2 connection between the CPU and the VPU is that the CPU does not have to issue a transaction over the main system bus, and can do quick calculations directly. In micromode, the VPU no longer executes commands issued to it over the coprocessor-2 bus (COP2). Instead, it relies on 64-bit instructions placed in its program memory, or micromem. The 64-bit instructions fed to the VU units are composed of 2 smaller instructions, each 32-bits
6 in length. The upper 32-bit instruction is fed to the floating-point ALU, and the lower 32-bit instruction is fed to the integer/control unit. The following diagram provides more detail on the structure and instruction issue mechanism of the VUs:
Figure 3: VPU Architecture Block Diagram (Adapted from VU Users Manual, Sony Corporation)
Close scrutiny of the diagram above suggests that the primary units of interest are the FMACs, which allow for performing floating-point multiply, addition, and accumulation. It is these units which enable high mathematical throughput for vector operations. In summary, the PS2s CPU has 2 vector units, in addition to a floating point unit. This is a total of three execution units that can execute in parallel. In addition, the CPU can be utilized in parallel to perform and coordinate computations. Because of this, it is quite evident that there is a great deal of potential for having a high throughput for calculations which fall into the domain of divide-and-conquer, or require several stages of computation. While the Playstation-2 has already been on the market for quite some time, it is our expectation that systems that are similar to it will be produced in the future and offer even better facilities for increased throughput, with regard to vector-mathematics related calculations. Before proceeding with tests to measure performance, our expectations were to witness a system that would give us reasonable performance that would be on par with the systems that were released around the time of the PlayStation-2. Our results confirm that, in terms of calculation speed, this is indeed the case. However, there were a plethora of performance bottlenecks that complicated simple software development. This document details those performance bottlenecks and discusses the feasibility of using gaming systems to accelerate mathematics.

Chapter 2 Establishing Performance Metric and Basic Test
On examination of the hardware layout of the PS2, it seemed evident that the primary strength of the overall system (as far as its use for scientific computation) was in the VLIW-SIMD vector units provided on the coprocessor-2 bridge to the main R5900-variant processor. The unit, collectively entitled the Vector Processing Unit(VPU), offers vector unit zero (VU0) and vector unit one (VU1). VU0 offers 4K of code and 4k of data memory for VU programs. VU1 offers 16k of code, and 16k of data memory. The instructions processed by the VPU's individual units are VLIW instructions and have 2 components: a floating point unit instruction, and an integer instruction. The floating-point hardware of each individual vector unit is of key interest; these units feature significant hardware in the form of "Floating Point Multiply and Accumulate Units" (FMACs). It was speculated that scientific applications would benefit the most from the hardware features of the FMAC, and that the overall benefit could be determined through carefully constructed benchmarking software. Since most scientific code, including computational chemistry, is dominated by floating point math, we aimed to determine the performance benefits of the PS2 for scientific computation using code that relied on floating-point multiplication and accumulation operations. Furthermore, we are especially interested in the performance for numerical linear algebra types of operations, which form the major bottleneck in many quantum chemistry applications. The dot product was chosen as the fundamental operation for our performance tests. This exercises the FMAC units, and further allows straightforward vectorization. Our test is incomplete since it focuses on a single operation, but we point out that the dot product is one of the most difficult linear algebra operations for efficient execution on vector and superscalar architectures because of the large data/computation ratio. Much higher absolute performance, e.g. in terms of MFLOPS, can be expected from matrix-matrix multiplication with its exceptionally low data/computation ratio. This should not be of undue concern in this paper because we emphasize comparisons to efficient code on conventional PC platforms rather than absolute MFLOPS. All efforts documented in this report focus on utilizing the base dot-product performance test and extending it into different scenarios in which the computational facilities of the PlayStation-2 are explored. It is arguable that this was not the most optimal test; however, considering time constraints, we believed this test would prove useful in assessing basic performance issues involved with the PS2 and would allow us to investigate the hardware in more depth. Essentially, the dot-product performance test was constructed with the idea of determining bounds on FMAC throughput. As referenced in chapter 1, the VPU can be operated in two modes: macromode and micromode. In order to get a feel for the instruction set of the Sony Playstation-2, it was decided that macromode would be used. In addition, it was decided that macromode code computing dot products could give a general overall picture of a sort of baseline performance that could be expected for the PlayStation-2. The next logical step was to construct or utilize code for computing the dot product and to measure its performance.

Chapter 3 Macromode Performance Analysis and Test Construction
In macromode, the principal components exercised within the Emotion Engine are the CPU, the COP2 bus, and VU0. In the diagram below, the exercised units are highlighted:
Figure 4: EE Core COP2 and VU0 Location (Adapted from EE Overview Manual, Sony Corporation)
In order to understand and exercise the VU0 unit, a small, crafty piece of code needed to be constructed or found. In this chapter, the objective of the code below, obtained from http://www.bd.wakwak.com/~yumimint/ps2linux/vu-tips.html , is to come up with a scalar result of the dot-product of two four-element vectors. For the purposes of demonstrating an example, supposing there were two vectors v1 and v2: v1 = < x1, y1, z1, w1 > v2 = < x2, y2, z2, w2 > To compute the dot product, code would be written that is functionally similar to what is listed below. (Note that the registers prefixed with VF to their name are macromode references to the floating point registers in VU0, the unit that gets exercised when requests are made over coprocessor bus 2.)
float COP2_DotProduct( void *src1, void *src2 ) { float result; __asm__ __volatile__ (" lqc2 vf16, 0x0( %1 ) lqc2 vf17, 0x0( %2 ) vaddw.x vf18, vf00, vf00 vmul.xyzw vf16, vf16, vf17 vmulax.x ACC, vf18, vf16x vmadday.x ACC, vf18, vf16y
vmaddaw.x vmaddz.x.set noat qmfc2 mtc1.set at ACC, vf18, vf16w vf16, vf18, vf16z $1, vf16 $1, %0
" : "=f" (result) : "r"(src1), "r"(src2) : "$1" ); return result; }
The code above doesnt make much sense until the notation for the various macro instructions is understood. Before reading the analysis below, it is important to note a few things. In the VPU of the PS2, the floating point registers have 4 32-bit parts. They are termed the w, z, y, and x components. The w component refers to bits 127-96. The z component refers to bits 95-64 The y component refers to bits 63-32 The x component refers to bits 31-0
Table 1: Vector Component Format

W (127-96)

z (95-64)

y (63-32)

x (31-0)
The VF00 register, however, has its components set to fixed values. The w value is set to 1.0, and all of the other parts of the register are set to 0.0. For the purpose of the understanding the detailed analysis below, assume that the contents of VF16 correspond to the parts of a vector v1 <x1, y1, z1, w1> and the contents of VF17 correspond to the parts of a vector v2 <x2, y2, z1, w2>. The dot after a register name in conjunction with a component letter is a reference to an element of a vector. For example, VF16.x refers to the x component of the 4 floating-point element vector contained within register VF16. The analysis of the code above is as follows:

Table 2: VU Macromode Dot Product Computation Code Breakdown
Instruction lqc2 vf16, 0x0( %1 ) lqc2 vf17, 0x0( %2 ) Vaddw.x vf18, vf00, vf00 Algebraic Expression VF16 = values VF17 = values VF18.x 4 floating point from parameter srcfloating point from src2 = VF00.x + VF00.w Important Things to Note
Vmul.xyzw vf16, vf16, vf17
VF16.x = VF16.x * VF17.x VF16.y = VF16.y * VF17.y VF16.z = VF16.z * VF17.z
VF18.x = 1 (Note VF00.x=0, VF00.w = 1, always ) VF16.x = x1*x2 VF16.y = y1*y2 VF16.z = z1*z2
Vmulax.x ACC, vf18, vf16x Vmadday.x ACC, vf18, vf16y Vmaddaw.x ACC, vf18, vf16w Vmaddz.x vf16, vf18, vf16z VF16.w = VF16.w * VF17.w ACC.x = VF18.x * VF16.x ACC.x = ACC.x + VF18.x * VF16.y ACC.x = ACC.x + VF18.x * VF16.w VF16.x = ACC.x + VF18.x * VF16.z VF16.w = w1*w2 ACC.x = x1 * x2 ACC.x = x1 * x2 + y1 * y2 ACC.x = x1 * x2 + y1 * y2 + w1 * w2
VF16.x = x1 * x2 + y1 *y2 + w1 * w2 + z1 * z2
$1 = VF16 Contents Transfer the floating point data to the value we want to return.

Qmfc2 Mtc1

$1, vf16 $1, %0
$1 = VF16 (VU to EE data transfer) Store lower 32 bits of GPR into floating point register. (We constrained %0 to a floating point register via =f specification in gccs extended asm syntax.)
Its quite clear from the column showing the algebraic expression that the dot-product operation benefits immensely from the SIMD characteristic that allows for 4 single-precision floating point multiplications in 1 instruction. The gcc-inlined code above featuring accumulation operations, result retrieval (qmfc) code, and the actual dot-product computation code allow for us to then construct a test to measure the actual performance of the code in execution. In order to compute the effectiveness of the above macromode code and to compare overall throughput with that of other commodity systems, the function above was placed in competition with similarly functioning C-code compiled for other platforms. Notice that the assembly code above is encapsulated in a C-function, COP2_DotProduct(). In non-PS2 systems, this function was replaced with a more generic C function used to compute the dotproduct. The competition code then was run repeatedly to figure out how fast a given system could compute dot-products. All test programs were compiled using gcc for the respective architecture. It is important to note that in the utilized performance program, on non-PS2 test systems, the equivalent dot product calculation code did not utilize specialized SIMD instructions, such as IA32 MMX/SSE/SSE2 or G4 AltiVec instructions. It was decided that the performance tests would pit the PS2 facilities against average or generically compiled mathematical C programs. The general idea was to compare the PS2 code with code that was generically compiled by a C program on the IA32 and G4 architectures; the rationale behind this decision was that there would be specific advances in compilers and toolkits for providing a better, overall generic performance on the Playstation-2 for average mathematical programs relying on single-precision floating point arithmetic. The performance graph below (obtained through the use of gprof) was obtained. (Note that the x-axis represents the number of dot products performed, and the y-axis represents the time required to complete all the calculations.)

Figure 5: Playstation-2 Dot-Product Calculation Performace versus Macs and PCs (X axis = # of Dot Products, Y axis = time in seconds.)
It is noticeable that a generally linear trend in performance with the increase in the number of dot products being calculated. Also quite evident is the sharp performance drop off of the PlayStation-2 after a certain data-size threshold is reached. This performance drop off is considerable, and demonstrates that the 32MB integrated RAM will prove to be a significant bottleneck because of paging. Consequently, it can be stated: any utilization of the PlayStation2 for efficient mathematics must avoid paging penalties and disk I/O. Notice, however, that in the region where the PS2 was not paging, it substantially outperformed other processors in terms of OPs/cycle. Therefore, tests designed to measure the raw computational throughput of the PS2 hardware were refactored to avoid exercising the scenario in which the virtual memory and disk subsystem were exercised.
Chapter 4 Micromode Performance Analysis
Looking at the performance graph for macromode, it is evident that macromode performance is fairly decent in comparison to commodity hardware released at around the same time the PS2 was released (given the test conditions stated above with regard to optimizations), but does not allow us to take full advantage of the advertised hardware offerings of the PlayStation-2. It was speculated during experimentation that utilization of micromode would allow for a significant performance boost that would allow our performance graphs to reach the performance levels of more common (not necessarily top of the line) PC hardware. The primary difference in micromode code utilization is that the CPU no longer specifically issues instructions over the coprocessor bus; instead, the VUs operate completely independently and in parallel. In addition, in macromode, only 1 VUs FMACs are used. By switching to micromode, we gain the ability to exercise the FMACs of both VUs. Because of the utilization of 2 VUs, it was expected that the performance throughput would roughly double. This idealized expectation neglects any contributions from the CPU or the FPU. The diagram below shows the portions of the PS2 that were used in the VU performance tests:
Figure 6: EECore Components Used in Micromode Tests (Adapted from EE Overview Manual, Sony Corporation)
The primary downside, initially, of micromode performance analysis was that entirely new program code needed to be written and assembled so that data could be written into the VUs. This meant that control instructions would have to be separated from mathematical instructions, and that completely new code would have to be written and assembled using a separate assembler. No longer could instructions be issued to the VUs directly; instead, the CPU needed to take pre-assembled VU instructions and write those instructions into the micromem of each individual VU unit.

# Low order address -> w, high is x sub.xyzw vf1, vf00, vf00 nop nop nop ilwr.x ilwr.y ilwr.z ilwr.w vi1, vi2, vi3, vi4, (vi0)x (vi0)y (vi0)z (vi0)w
##### Stage 1, Part of Stage 2 P1[16, 17, 18] -> P2[ 19, 20 ] # First attempt/pass adaptation of macromode computation code # for micromode code. nop lqi.xyzw vf16, (vi2++) nop lqi.xyzw vf17, (vi3++) OuterLoop1: addw.x vf18, vf00, vf00 iadd vi5, vi4, vi0 mul.xyzw vf16, vf16, vf17 sqi.xyzw vf1, (vi5++) mulax.x ACC, vf18, vf16x lqi.xyzw vf19, (vi2++) madday.x ACC, vf18, vf16y lqi.xyzw vf20, (vi3++) maddaw.x ACC, vf18, vf16w nop maddz.x vf16, vf18, vf16z nop addw.x vf21, vf00, vf00 mr32.w vf15, vf16 mul.xyzw vf19, vf19, vf20 mr32.z vf15, vf15 mulax.x ACC, vf21, vf19x lqi.xyzw vf22, (vi2++) madday.x ACC, vf21, vf19y lqi.xyzw vf23, (vi3++) maddaw.x ACC, vf21, vf19w lqi.xyzw vf25, (vi2++) maddz.x vf19, vf21, vf19z lqi.xyzw vf26, (vi3++) addw.x vf24, vf00, vf00 mr32.w vf15, vf19 mul.xyzw vf22, vf22, vf23 lqi.xyzw vf16, (vi2++) mulax.x ACC, vf24, vf22x lqi.xyzw vf17, (vi3++) madday.x ACC, vf24, vf22y mr32.yz vf15, vf15 maddaw.x ACC, vf24, vf22w nop maddz.x vf22, vf24, vf22z nop addw.x vf27, vf00, vf00 mr32.w vf15, vf22 mul.xyzw vf25, vf25, vf26 mr32.xyz vf15, vf15 mulax.x ACC, vf27, vf25x nop madday.x ACC, vf27, vf25y nop maddaw.x ACC, vf27, vf25w nop maddz.x vf25, vf27, vf25z nop nop mr32.w vf15, vf25 # Terminate execution and transfer control back to VU nop isubiu vi1, vi1, 4 nop ibgtz vi1, OuterLoop1 nop sqi.xyzw vf15, (vi4++) nop[t] nop[e] nop nop nop nop nop nop
For the sake of brevity, a more detailed instruction by instruction analysis is not provided here, but is provided in Appendix A. However, it can be witnessed that the same general computation code structure from the macromode example is presented in the left-hand column. The left-most instruction stream is, in fact, the stream of instructions that are issued to the floating point hardware. The right-most stream of instructions is issued to the integer/control unit. Notice that at the end of the instruction stream, there are No-Operation instructions (nops) with t and e flags specified. These instructions instruct the VU to raise an interrupt to signal to the CPU that computations have been completed. (The software used to conduct performance tests needed to wait on a queue until a secondary interrupt service routine awakened them.) In the initial test of the above code, only VU0 was used to measure performance. Eventually tests were performed utilizing VU1 alone, and also both VU0 and VU1. The following table relates performance of macromode with micromode in terms of time required to perform 200,000 dot products:

Table 3: VU Performance In Various Modes In Terms of Time for Calculating 200,000 dot products
Mode Macro Micro Micro Micro
Units used VU0 (via COP2) VU0 VU1 VU0+VU1*
Exec Time.144 seconds 14.8 seconds 3.1 seconds 3.5 seconds
*Data was transferred to the VUs only after both VUs completed processing their data. Macromode outperforms micromode! The significant performance difference is attributable to the amount of time spent transferring data across the main memory bus from RAM to the data memories of the VU units. (Note: It is important to note that the tests within this chapter relied on the CPU to perform data-transfers via the LQ and SQ opcodes, and did not rely on DMA and VIF hardware.) In addition, the number of system calls required for the user-mode code to control VU units contributed to an increased overhead. The amount of time required to transfer from user-mode to kernel-mode for system calls to VPU device drivers is significant. Latencies in the kernel control paths also contributed to performance degradation. Clearly, in order to avoid the performance penalties of data transfer and system-call overhead, another solution was required. Note, also, that the dot-product performance test lends itself to this behavior because the VU code does not systematically-reuse the data passed to it. It is speculated that if the ratio of transfer time to computation time were adjusted accordingly, significant performance increases would be realized. To get a feel for what sort of performance would be obtained without the transfer penalty, but with control-overhead a test was devised in which the VUs individually computed dot products over and over, without transferring data back and forth to RAM. The resulting time for 200000 dot products is:
Table 4: VU Micromode Performance Without Data Transfer Overhead

Mode Micro

Units used VU0+VU1*

Exec Time 3.0 seconds

For increased performance, significant modifications would be required to avoid kernel-control path and system call latencies. The assisting in proving the hypothesis that system-call overhead was the primary bottleneck, the code was restructured in a manner that allowed for calculation of 200,000 dot-products without any data transfers or raised-interrupts. In other words, to create the ideal situation without control-overhead and data-transfer overhead, the VU code was rewritten so the VU would repeat over 1 buffer and compute the dot-product repeatedly 200,000 times. This resulted in 200% improvement over macromode code, using only VU1! The results are shown in Table 5.

void EnableCOP2( int stat, unsigned char *frameptr ) {
KFEND( PRIORITY1, "EnableCOP2()" ); #ifdef __MIPSCOMPILATION__ _KDbgPrint( ( "VPUPERM: Previous Status: %08X\n", *((unsigned int *)( frameptr + PT_STATUS ) ) ) ); if( stat ) *((unsigned int *)( frameptr + PT_STATUS )) |= ST0_CU2; else *((unsigned int *)( frameptr + PT_STATUS )) &= ~ST0_CU2; _KDbgPrint( ( "VPUPERM: Current Status: %08X\n", *((unsigned int *)( frameptr + PT_STATUS ) ) ) ); #endif KFEXD( PRIORITY1, "EnableCOP2()\n" ); }
Again, it should be mentioned that the control overhead for the dot-product test was so significantly high, that multi-threaded test code results in severely degraded performance. The key benefit from threads in the PS2 arises when VU computational time far exceeds the cost (in terms of time) to perform control operations and transfer data. In the future, it is expected that more tests can be constructed to utilize multiple threads.
Chapter 6 Alleviating Bottlenecks in Performance
Its painfully evident from the results in chapter 4 that eliminating system call overhead is critical for VU utilization. The delays witnessed in existing performance tests are primarily due to the structure of the performance testing software and the device driver utilized. The designed dot product performance test software currently executes in user-mode, and relies on a set of ioctl()s to query the VU hardware. The performance test software typically starts the VU transaction directly over the COP2 bus, but sleeps on a wait-queue in the kernel until the VU executes the nop[t] instruction. The overhead associated with the user-mode to kernel-mode transition, in conjunction the event-management and thread-wake-up code is a hefty price to pay in the dot-product test. Consider VU0 -- it has 4k of data memory. Each vector requires 16-bytes of space. The data memory needs to be utilized to contain the two vectors used for the dot-product, the scalar results, and parameters passed into the VU functions. Thus, the VU0, in the performance test used, was only able to compute 36 dot-products before requiring an interrupt. The VU1 unit performs only 4x as many computations before requiring an interrupt to notify the CPU that more data needs to be sent across the bus. The quick computation time of the VUs in relation to the overall overhead incurred from managing interrupt service routines and user-to-kernel transitions causes the overall process to be inefficient. A simple potential solution would be to remove the system-call overhead within the kernel, and to simplify event management code within the PlayStation-2 Linux kernel device driver. Alternatively, the software developer can elect not to use the VUs when the ratio of system-calls and interrupts to VU computation time is unfavorable. In addition, the developer can simply expose all of the registers of the VU hardware to user-mode code via mmap(), and eliminate system-call overhead in order to manage everything in user-mode. (This strategy is used by the popular open-source SPS2 library.) The disadvantage of this is Before investigation into initiatives requiring the restructuring of device drivers and kernel management code, a few other alternatives were investigated on the Playstation-2. Namely, the DMA and VIF interface was inspected. At this time, no test has been developed to show an increase in performance, but because of the results of the previous chapter, it is speculated that DMA and VIF would play a vital role in increasing overall PS2 throughput. On the PlayStation-2, it is possible to construct a list of information containing a sequence of floating points values or integers that can be transferred into the code and data memories of the VUs. These lists consist of what are called VIF-packets. VIF-packets are constructed in such a manner that they can be used with the DMA hardware. That is, arbitrary data and commands can be streamed to the vector units. Interestingly, VU0 can only have data DMA transferred to it, but does not support DMA transfers from its data memory back to the CPU. VU1 and VIF1 do support transfers in both directions. In order to communicate with the vector units through the VIF hardware, 128-bit aligned VIF packets need to be constructed. Within the packet, a control operation is specified through what is known as a VIF-code. There are several types of VIF-codes that are embedded in VIF packets. For example, codes can be a NOP, a data transfer with the UNPACK command, a

19 microprogram transfer to code via the MPG command, or even a function call of sorts to force the VU to start executing code from a specific address in the code memories. Within the dot-product performance test, the dominant VIF operation was the UNPACK operation, which places information into the data memories of the VU. The dot-product performance test placed the microprogram into the code-memories in advanced, so no MPG operation ever needed to be issued. The VIFCode UNPACK packet is structured as follows (in C struct description):
typedef struct { unsigned int addr unsigned int reserved unsigned int usn unsigned int flg unsigned int numcount unsigned int cmdcode }VIFCodeStruct_unpack;
: 10; : 3; : 1; : 1; : 8; : 8;

/* /* /* /* /* /*

Bits 0-9, Start Address Bits 11-13, Reserved Bits 14, Signed Unsigned Decompression Bits 15, Address Mode - Add VIF1_Tops? Bits 16-23, Number of 128 bit chunks Bits 24-21, Command Code

*/ */ */ */ */ */

The VIFCodeStruct_unpack information needs to be placed ahead of the actual data in the buffer being transferred. The number of 128-bit chunks being transferred is specified within the packet information. By toggling bits in the actual command code field, the VIF unit can be instructed to raise an interrupt to signal the end of a data transfer. In the dot-product test performance application, this interrupt was used to signal that more information needed to be transmitted. Unfortunately, in current versions of the performance test, the utilization of the interrupt caused increased performance overhead, so no real performance benefit was gained in existing performance tests. The generalized code for performing a data transfer using Sony provided VPU device drivers and the UNPACK command is presented:
unsigned int vifstreamheader[] = { 0x00000000, 0x00000000, 0x00000000, 0x6C000000 }; [] dmapacket.ptr = (void *) fpacket; dmapacket.len = sizeof( VIF0FullTransferPacket ); vifevent = VIF0EventOpen(); if( vifevent < 0 ) { printf( "Unable to open VIF event object.\n" ); __RETURN( vifevent, "main()" ); } memset( (void *)( vu[0].datamem ), 0, PAGESIZE ); ioctl( vu[0].fildes, PS2IOC_SENDA, &dmapacket ); printf( "Transfer complete.\n" ); VIF0EventWait( vifevent ); VIF0EventClose( vifevent );
In the above code, the fpacket variable is a pointer to a block of floating point data containing a copy of the vifstreamheader array (with the VIF UNPACK code encoded in it) and a block of numbers to be used in a dot-product calculation. When the ioctl() is performed, the non-blocking PS2IOC_SENDA command (enumerated in header files provided with the source code for the Sony PS2-Linux kernel VPU device driver) is specified. This command instructs the device driver to perform a DMA transfer of length specified in dmapacket.len, from the address specified in dmapacket.ptr. The dmapacket.ptr in this case points to the fpacket region which

20 contains proper information formatted for the VIF, so that information can be placed in the VUs data memory. Notice that for the transfer to complete successfully, the ioctl() was required to start the transfer and computation, and that another system call was required to wait for the transfer to complete. The VIF0EventWait() code is just a wrapper function for a blocking system call (via ioctl()) that forces the thread to sleep until the data transfer is complete. The current test requires two system calls to coordinate operation. Again, the existing control overhead is high. However, it is speculated if the two system calls were removed, and the control were localized more effectively to strictly kernel space, the VIF transfer method would prove optimal and also allow for the CPU to be re-utilized during DMA transfers for performing other operations such as more dot-product calculations. This is the ideal scenario, and is the objective for the development of a new testing and performance measurement suite. It is speculated that if the user-mode to kernel-mode system-call overhead were eliminated, and that the interrupt-management overhead that currently exists is eliminated, that the VIF transfer mechanism would be exceptionally efficient. Ideally, in a restructuring of performance test code, the Sony device drivers would be rewritten in such a manner that the kernel would have copies of the buffers used for computing dot-products within kernelspace, and the interrupt management could would be more streamlined, such that no extra computation would have to be performance to determine which user-mode process thread would need re-awakening upon completion of VPU mathematical processing after a DMA transfer. In gaming software, the level of organization and sophistication of device drivers is miniscule; however, the organization required to manage information within the Playstation-2 Linux kernel is much greater. In order to successfully utilize Linux, the time-to-hardware for mathematical data must be reduced, and certain protections offered by a Unix-like OS will need to be traded off.
Chapter 7 Possible New Directions in Performance Analysis and Test Development
In the previous chapter, direct transfer of data to the VU data memories via the VIF units was discussed. Its evident that, even after data transfer and execution of dot-product code, information must still be reclaimed via memory copy cycles, or another DMA transfer. The user-mode code still has quite a bit of system-call overhead to initiate the DMA transfers. Clearly, to remove system-call overhead, more functionality needs to be integrated into the device drivers for the vector units, or computational code needs to be placed within kernel-space. With regards to the dot-product performance test, the ratio of control-overhead to computation time is still too high. Another alternative to the techniques previously used is to adjust the flow of data such that, instead of reclaiming the results from the vector units after computation, the data be transferred as texture data to the graphics synthesizer and its local memory via the GIF unit. The Playstation-2 graphics unit has 4MB of local memory in which textures can be stored, and through which data can be transferred back and forth via DMA and through KICK instructions through the vector units. The new region of the EE core that would be utilized is highlighted, in addition to other units used in micromode, in the block diagram below:

Figure 7: GIF and GS Unit location (Adapted from EE Overview Manual, Sony Corporation)
The graphics synthesizer introduces a great deal of complexity: textures must be managed, the local memory must be partitioned, and the hardware must be instructed not to perform any transformations on the incoming data. Future tests are expected to utilize the graphics synthesizer in the overall performance test. The development time for such a test is anticipated to be very high, due to the high configurability of the graphics synthesizer.
Chapter 8 Results and Feasibility of Usage Asssessment
While no dramatic performance improvement was shown in this particular study, the framework for performance improving tests has been created. Enough evidence has been presented that significant throughput can be expected if device drivers or kernel code is written to minimize VU control overhead. The dot-product performance test effectively allowed us to set expectations for the sort of throughput to be expected from the FMAC units in the VPU. This chapter summarizes the basic steps believed to be required to produce satisfactory throughput utilizing the VUs. If a device driver or more optimized kernel were introduced, then customized code tailored for scientific computing could take full advantage of the vector hardware in the Playstation-2. In short, the primary boundaries preventing exceptionally efficient code are: The overhead making a user-mode to kernel-mode transition Managing interrupts and threads within the kernel Data transfers to and from the VU units
The overhead involved with user-mode to kernel-mode transitions can be eliminated if a software architecture is introduced that allows for coordination of VU utilization entirely within kernel space. Currently, if a process wants to write information to the VUs using existing Sony Playstation-2 drivers, it needs to memory map the VUs code and data memories and perform a sequence of reads and writes to initialize the VUs, and then issue system calls to instruct the VU to begin operation and signal completion through an interrupt. The overhead of coordinating events is exceptionally high with regards to the amount of work the actual VU is performing. If the software is re-architected in such a manner that event coordination and management is performed in a very streamlined and quick manner entirely within the kernel, then a significant performance improvement could be achieved. When the VU or VIF signals an interrupt, the Sony device driver searches through a chain of registered event handlers to determine which threads need to be awoken. This is a very general purpose approach, but is entirely inappropriate for extracting optimal performance from the VUs. While the current approach may be appropriate if the VU spends quite a bit of time doing calculations without requiring more control operations, it is not appropriate for tests such as the dot-product performance test. Finally, the third improvement that would immensely increase overall throughput is if the DMAto-VIF transfer mechanism were used more effectively. If the information used in scientific calculations were packaged in such a manner that function calls were specified, and blocks of data were inlined with VIF codes, the overall CPU intervention required to manage the VU operation would decrease. This would enable for efficient utilization of the CPU and FPU while simultaneously allowing for intelligent use of the VUs. If this method were combined successfully with the utilization of the graphics synthesizer, it is believed a tremendous throughput would be achieved that would provide scientific applications with a significant, costeffective overall performance increase.

JNPT Volume 31, December 2007
Sony PlayStation Poststroke
ence the emotional sense of winning in a particular game.33 These attributes of VR training are important, as lack of motivation and adherence to exercise have been shown to be problematic in traditional treatment regimens, thus impacting therapeutic outcomes.19,31,Preliminary research in the area of VR has focused primarily on complex VR systems designed for specic therapeutic purposes, providing the participant with visual, sensory, and haptic feedback tailored to retrain a precise motor skill. What had not yet been explored is the therapeutic value of commonly available VR games not explicitly created for rehabilitation. Although less expensive and lower tech, these VR games do in fact share many tasks and behaviors similar to its higher cost predecessor, the IREX system.15 While off-the-shelf gaming technology lacks specicity, it has the advantage of mass accessibility, broad affordability, and the potential for home use. The use of VR games played with Sony Eyetoy: Play 2 gaming software may provide an engaging environment to challenge and retrain motor activity. As the nature of the technology allows for unlimited repetition with ongoing feedback, training in the VE may lead to neural reorganization and a decrease in the decits commonly found following stroke. The primary purpose of this case report was to explore the feasibility of using a VR gaming device (Sony Eyetoy: Play 2 on a PlayStation 2) to improve function two years after stroke for an individual who has exhausted all traditional rehabilitative interventions. Given this participants unique professional background as a retired professor of physical therapy, upon completion of the training program an in-depth interview was conducted to gather qualitative data regarding the participants perceptions about this device and its application to physical therapy. Outcomes for impairment, activity, and participation, before and after using the VR gaming device at home, are included.

CASE DESCRIPTION History

The participant, MRB, was a 76-year-old woman who sustained a right hemorrhagic stroke 17 months prior to the start of the study. Her past medical history was signicant for low blood pressure, myofascial pain syndrome, bromyalgia, and a hearing impediment for which she wore a hearing aid. Prior to her stroke, she led an active retirement lifestyle with no physical function or cognitive limitations. Before retirement, MRB worked as a physical therapist and a professor of physical therapy for many years. On the day of the stroke, MRB was taken to the emergency room, where an MRI was used to diagnose her condition. She remained in the ICU for two days, entered acute care for three days, and then transferred to inpatient rehabilitation for ve weeks. While in inpatient rehabilitation, she received physical, occupational, and speech therapy daily, with various adjuncts such as recreational and animal therapy. Upon leaving the hospital, MRB was ambulating on level surfaces using a quad cane and stand-by assistance. ADL could be performed independently, but often not at a functional speed; she required assistance with eating, groom 2007 Neurology Section, APTA

ing, and bathroom activities in order to complete them within a reasonable time frame. Cognitive decits were also noted, including problems with memory and word-nding. At the conclusion of inpatient rehabilitation, MRB began day therapy three times weekly for one month. During this period, she began to ambulate independently within the community. She also began to develop greater speed with ADL, but continued to require assistance with more complex ne motor tasks, such as buttoning, cutting food, and tying her shoes. Although MRB was able to communicate effectively, previously noted cognitive decits remained (wordnding and memory difculties), leading to a minor reduction in conversational speed. Following completion of available treatment opportunities, MRB engaged in a daily self-directed program of exercise and activity aimed at maximizing both motor and cognitive potential. She made minor modications to her home environment, including the addition of handrails in her bathroom and bedroom. Follow-up CAT and MRI imaging studies ruled out any additional cerebral vascular accidents (CVAs). She occasionally had low back pain with a rating of approximately 2 out of 10. MRB indicated that her hobbies were reading, studying history, and traveling, all of which had become difcult following her stroke. Being a physical therapist, she engaged in exercises aimed at improving her gait and arm and leg strength such as cone stacking coordination exercises, playing ping-pong, and kicking a ball. She had not changed her exercise program in the recent past nor planned to change her exercise program during the course of this study. She had no experience with computer games, video games, or VR programs. She was interested in trialing the VR technology to further her rehabilitation. MRB had the following characteristics necessary for the study and volunteered to participate. These characteristics included that the individual would (1) have had a previous stroke and completed available treatment options, (2) not currently be receiving physical therapy or be undergoing new treatment, such as surgery or a medication change, (3) not change their regular exercise regimen during the course of the study, and (4) be able to play VR games safely within their own home. The participant then signed an informed consent statement, in accordance with requirements of the Georgia State University Institutional Review Board.

Evaluation and Prognosis

In general, MRB had signicant motor and sensory recovery poststroke; however, she had difculty performing high-level coordination and balance tasks. From a motivation perspective, MRBs rehabilitation potential was excellent. However, due to her already high level of recovery, we were prepared for minimal change.

Intervention

The VR system used in this case was the Eyetoy: Play 2 (Sony, Park Ridge, New Jersey), a commercially available gaming system that uses a video capture interface to allow the user to interact directly with their own television screen. Components for this system include a color digital camera device with USB interface (an OmniVision OV519 Video Device with an OmniVision OV7648 sensor, manufactured by Logitech, Fremont, California), a PlayStation 2 (PS2) (model number SCPH-75001), a DUALSHOCK 2 Analog Controller with pressure sensitivity, and the Eyetoy: Play 2 disc. The total cost of the system is less than $200. The system uses motion and color-sensitive computer vision to
process images taken by the camera. As the user moves his/her body, the camera presents a real-time likeness on the television screen, with a graphic overlay of a virtual surrounding. Objects within the game environment move and react when contacted by the users image, creating an interactive experience between the two. Sound and visual feedback indicate the success or failure of movement relative to the game task. The Eyetoy: Play 2 provides the player with 23 different game experiences, each presenting similar movement challenges: accurate, target-based upper extremity motion, motor planning, dynamic sitting and standing balance, and eye-hand coordination (Table 1). The movement tasks are multiplanar and multidirectional, with rotational and diagonal components, mimicking essential aspects of functional movement. Games can be played from a sitting or standing position. Six additional multiplayer games are available for use with up to four people. MRB was provided with the system, which interfaced with her own television set via an AV cable. After the Sony Eyetoy was easily set up in her home, assistance was provided with lighting conditions and sound settings to allow for easy interaction with the screen. Setting up the system took less than one hour, and no modications were made to the games. During the set-up in her home, a place that was safe and free from objects that may cause injury if she were to fall was chosen. On initiation of training, she was asked to play each of the Eyetoy games at least twice, after which game choices were at her discretion. As she was able to safely maintain standing balance while playing the Eyetoy, she chose to complete the activity from a standing position. The participant completed a total of 20 one-hour sessions of play over four and a half weeks.The training sessions were completed in time intervals determined by the participants fatigue level. For example, sometimes MRB played for 30 minutes before resting, while on other days she played for shorter times before requiring a break. The variability was due to training intensity, other activities performed that day, or general fatigue possibly due to myofascial pain or bromyalgia. The research team did not supervise the training sessions; however, her companion monitored and encouraged her during the training sessions by being present in the room or home. Compliance was monitored via the use of daily play logs that listed games played, time of session, and comments regarding individual games, collected at the completion of 10 and 20 gaming sessions. The games played are summarized in Table 1. The research team contacted the participant weekly to answer questions and encourage her continued participation.

OUTCOMES Feasibility of Use
After conducting an extensive interview and reviewing the daily logs, we discovered that this device was quite feasible as well as quite enjoyable to use. Since this participant uniquely understood the benets of this research project, we queried her regarding her opinion of the device (Table 2). In general, she described the games as very motivating and
2007 Neurology Section, APTA
TABLE 1. Summary of Game Descriptions and Number of Times the Participant Played Each Game
Games Played Air Guitar Description The player uses her hands to strum along to music. Various symbols indicate movements ranging form single hits/picks, slides, strums, and windmills to rock along to some classic rock and roll riffs. The player attempts to pop all the bubbles as quickly as possible, leaving only the red bubbles. Bomb bubbles will detonate everything nearby, so player uses them wisely. Player uses her upper extremities in all planes to color various templates as she chooses. The player uses her arms to select the best techniques to nish a professional job, catch a runaway drill, chop wood, and shred trees while keeping other objects out of the shredder. The player must move her hands to beat out rhythms using various timed beats in a specied pattern. The player attempts to prevent the computer from scoring any goals on her. Her body is used to block as many shots as possible. Other parts of the game include an agility drill, reaction test, and a tness test. The player uses her hands to swing at pitches, run the bases, and try to score as many runs as possible with 10 baseballs. There are tools to increase the score such as a strike zone, mini-map of the ineld, and a direction gauge. The player uses her arms to punch out the opponent in three rounds or less. A musical tune indicates the opportunity to launch a combo attack to focus on the opponents weak spot. Other parts of this game include sparring, punching a heavy bag, and a speed bag. The player uses her strength and agility to defeat all enemies in the way using various karate techniques. The player swings her way across the monkey bars, grabbing as many bananas as possible while collecting various fruits for extra points and intermittently dodging opponents. The player grabs and drags all the ingredients needed to complete the orders to assigned specications followed by a speed competition against an opponent. The player has to clear all of the balls from the pool table utilizing various angles of movement with her upper extremities under time constraints. The player is to sneak around collecting hidden items, solve puzzles, and move slowly so no one detects her movements as she breaks out of prison. The player navigates through the solar system by body movements. The player uses his arms as paddles to play against a number of incrementally more challenging opponents # Times Played 4 Dynamic Balance X UE ROM Speed X Cognition X Reaction Time X TargetBased X

Bubblepop

Colors Do It Yourself (DIY)

X X X X

Drummin Goal Attack

Homerun

Knockout

Kung 2 Monkey Bars

Mr. Chef

Secret Agent

Solar System Table Tennis
Abbreviation: UE ROM, Upper Extremity Range of Motion
enjoyable to play. She also found some of the games to be too difcult or in need of modication for individuals with sensorimotor impairments. MRB commented on a number of possible benets of using this technology. She suggested that individuals who are playing the games might exercise for longer periods of time without realizing how much time had passed. She enjoyed the competitive nature of the games. She indicated during her midtest session that she had set a goal of wanting to knock down the wall before time ran out. She
arrived for her posttest smiling and declaring, I nally knocked down the whole wall before my time ran outI nally did it yesterday! Furthermore, she expressed enthusiasm for exercising at home. Shortly after her stroke, she noticed that her grandson was loosing interest in visiting her. During one of his visits, he observed her playing the games and asked if he could join her. Thereafter, he often asked to visit grandma again so that they could play together. Lastly, she found benet in the convenience of playing the games
TABLE 2. Players Comments
Game Players Comments Air Guitar It takes a little time to gure it out, but after a couple of times, it gets easier. Bubblepop Its fast and requires nesse with arm movement when trying not to pop the red bubbles. Colors An interesting way to move without constraints on the type of movement or the speed of movement. can do trunk movements too. Do It Yourself (DIY) Its a great game for a lot of various arm movements that is satisfying when youve succeeded in knocking down the wall. Drummin Its difcult to advance, but can get further with more repetitions. Goal Attack Its good for weight shifts. Homerun Hitting the ball is fun, but difcult to advance. Knockout Challenging, but good game for stamina and accuracy. Kung 2 Good arm reactions and breaking the ice is fun. Monkey Bars Difcult, but gets better with more repetitions. Mr. Chef Good for cognitive, fast-paced decision making. Pool The game requires difcult, varied arm movement in different planes. Secret Agent Good for arm movements, but gets more difcult as the game advances. Solar System Good for arm movements without the time constraints. Table Tennis Good for two ways of hitting/arm movements, but difcult due to timing.

throughout the day, instead of having to exercise all at one time. She concluded by suggesting that while its widespread application may be limited, this device shows promise.
The following section describes the outcomes of the standardized assessments used in this study. The order of the tests were randomly selected and performed by the research team who were not blinded as to the intervention (Table 3). The following tests were chosen either because they are valid and reliable for individuals post troke and/or because they measured across the ICF continuum.
motor, 10/12 balance, 21/24 sensory, 44/44 range of motion, and 43/44 pain. The largest change occurred in sensory function, specically proprioception. Essentially she was unable to detect proprioception in her left side prior to beginning the study, and was able to detect it awlessly after the one-month training period. Balance was the only component that did not show improvement over the course of training and improvement in other components was negligible. As an increase of 10 points has been theorized to represent clinically signicant change,41 an increase of 22 points represents meaningful improvement.

Fugl-Meyer Assessment

Based on Brunstroms recovery patterns, the FMA is a valid and reliablemeasure of recovery of sensorimotor function poststroke. The participant scored a total of 192/226 on the FMA during her pretest and a total of 214/226 on her posttest, demonstrating a 9.74% improvement following training. Scores for the individual components of the FMA were pretest: 94/100 motor, 11/12 balance, 10/24 sensory, 38/44 range of motion, and 39/44 pain and posttest: 96/100
TABLE 3. Summary of Findings
Standardized Assessment (Total Score) Fugl-Meyer Assessment % Recovery (100) Upper Extremity Functional Index (80) Beck Depression Inventory Berg Balance Scale (56) Dynamic Gait Index (24) Mini-Mental Status Exam (30) Timed Up and Go (s.) Six-Minute Walk Test (ft) Motor Activity Log-Quality of Movement (5) Motor Activity Log-Actual Amount of Use (5) Modied Ashworth Scale (0 normal tone) Functional Reach Test (in) Improvement Increase Increase Decrease Increase Increase Increase Decrease Increase Increase Increase Decrease Increase
Upper Extremity Functional Index
This 20-item self-report questionnaire measures upper extremity task performance. MRB scored a 56/80 at her pretest and a 65/80 at her posttest on the Upper Extremity Functional Index (UEFI). The six-month follow-up showed a large improvement over the posttest, at a perfect 80/80. While a potentially promising result, the improvement indicated by this score is striking enough to be interpreted with caution. As this outcome is measured via self-report, the result is reliant

Pretest 84.96% 24 12.3.50 5.11.33
Midtest 87.00% 26 10.3.92 4.10.25
Posttest 94.70% 29 11.4.70 5.11.50
Six-Month 98.00% 26 9.5.00 5.12.00
on the accuracy of subjective recall and a consistent reading of test questions.46

Six-Minute Walk Test

The distance MRB was able to ambulate during the Six-Minute Walk Test (6MWT) varied and did not demonstrate identiable changes over time. Her pretest distance was 1282 feet, midtest distance was 1250 feet, and posttest distance was 1337 feet. Each distance was less than expected norms for women with a mean age of 62 , but this norm was established in the healthy elderly population and may not be relevant for an individual post-CVA.60,61
Beck Depression Inventory
A minor decline in self-reported depressive symptoms was evident in this participant, although no scores (pretest, midtest, or posttest) were outside the normal range. She identied six items as originally problematic, dropping to two items by the posttest. Further decline was evident by the six-month follow-up, with a score of 0 at that time. Generally, a score of nine or greater indicates the presence of depression according to Beck Depression Inventory (BDI) criteria.4750

Motor Activity Log

The Motor Activity Log (MAL) is a 26-item interview that measures upper extremity functional poststroke. MRB scored a 5/5 per self-report on the Actual Amount of Use (MAL-AAU) portion of the MAL at the pretest, indicating that her affected extremity participated in all ADL.62 The Quality of Movement (MAL-QOM), however, was rated a 3.5/5 at the pretest, a score that reveals a deciency in the quality of motion. By the posttest, the QOM was rated a 4.7/5, signifying the self-perception that quality of motion had improved following training.

Berg Balance Scale5153

The Berg Balance Scale (BBS), a 14-item multitask balance test, showed consistent improvement over the pretest to posttest period. The participant scored an initial 51/54 and a nal 54/54, a score that was maintained at the six-month follow-up. As only three points were deducted at the pretest and she eventually achieved a perfect score on this measure, a ceiling effect may have contributed to a lack of signicant change for this individual.

Modied Ashworth Scale

We used the Modied Ashworth Scale (MAS) to assess spasticity. The MAS revealed variable and inconclusive scoring: an initial score of 2, a 0 at midtest, a 1 at posttest, and a 0 at the six-month follow-up.63 This participant generally experienced only mild and sporadic spasticity that did not signicantly impact her life. This remained true in all stages prior to, during, and following training.

Dynamic Gait Index

This eight-item tool assesses balance, postural control, mobility, and functional gait abilities. MRB initially scored a 16/24 on the Dynamic Gait Index (DGI).54,55 By the posttest, she achieved a score of 21/24. As a score of 19 or below is a commonly accepted identication criteria for risk to fall, the change in scores represents a clinically signicant result. At the six-month follow-up, she continued to demonstrate this reduction in fall risk, with a score of 20/24.

Functional Reach Test64

As an indication of postural responses, we used the Functional Reach Test (FRT). Reach distances did not improve over the testing periods, with a pretest measure of 11.33 inches and a posttest measure of 11.5 inches. All scores were within normal limits established for the participants age group.

Mini-Mental State Exam

A screen for cognitive impairments, the Mini-Mental State Exam (MMSE) measures memory, language, and spatial ability.56,57 The participant performed consistently better from the pretest to the posttest on the MMSE, with an initial score of 24/30 and a nal score of 29/30. Although her score decreased at the six-month follow-up, it did not return to her pretraining level, but remained at the 26/30 midtest level. Generally, the cutoff for cognitive impairment in the postCVA population is considered to be a score of 24/30,42 and the participant remained above this level throughout.

DISCUSSION

The outcomes of this study indicate that for this participant, VR rehabilitation using a commercially available device was feasible. There were no reports of increased pain or falls during the intervention phase. She was able to perform all of the training with relative ease. Despite her lack of computer/technology experience, after two to three days of practice using the device, she maneuvered through the various levels of the game choices. She explored different games and found games that she enjoyed playing more than others. MRB indicated her interest in purchasing a device to continue its use at her home. While we cannot rule out other causes for her gains in function during this one-month intervention, the VR gaming device positively impacted her function. She reported multiple attempts at performing specic tasks such as cutting her ngernails prior to participating in this study. After her one-month intervention, she reported that she could successfully cut her ngernails.

by her posttest, an improvement over her initial 16/24 that placed her outside of the risk-to-fall category. People with stroke are commonly understood to be at increased risk for falling, with approximately 25% reporting recurrent falls.65 Falling is associated with numerous complications and has been correlated with decreased mobility, decreased independence with ADL, and reduced arm function.65 Loss of selfcondence secondary to recurrent falls can lead to selfimposed limitation to activity, causing further decline in strength, balance, and functional independence.66 Given the signicant value of a reduction in fall potential, we believe the participants nal score on the DGI represents important and noteworthy change. Furthermore, it should also be underscored that this change occurred in the chronic stages of stroke recovery, after the conventional course of post-CVA treatment had been completed. As the Sony Eyetoy was not developed to retrain a specic motor skill in a particular disabled population, many outcome measures were chosen to explore change across a spectrum of possibilities. Each of the four testing sessions lasted approximately 2.5 hours and involved challenges to both motor and cognitive function. Fatigue during these sessions represents a confounding variable, with a possibility of later tests exhibiting a decline in function not indicative of true decit. Some variability in scores where the participant initially showed improvement and then a decline during a particular test may be explained in this way. Specically, the 6MWT showed an increase in distance in all test sessions except at the six-month follow-up. During this testing session, the 6MWT was the last test administered to the participant, who may have been fatigued and thus demonstrated a decrease in walking distance. Finally, it should be noted that the device itself, not necessarily the VE, might have contributed to a lack of improvements in these various tests. For example, the games are not played in the rst person but rather are third person mediated. In other words, the persons image is projected on the screen instead of the screen being what the person would be seeing if a camera were attached to their forehead. Secondly, the games themselves are not modiable. Therefore, some of the games may be too difcult to perform even at their lowest levels. In the future it would be benecial to either develop the ability to modify these games or develop new games that address the specic needs of each individual. It is unknown if regular training with the Sony Eyetoy affords equal or greater benet than other types of independent exercise. The gains achieved may result from the commencement of a new daily exercise regimen and have occurred with any new form of training. However, as this individual was a trained physical therapist already performing a daily exercise routine prior to starting the study, this explanation is unlikely. Moreover, as a purpose of this case report was to explore the motivational aspects of a gamingbased exercise program, any improvement represents a meaningful result. Further study with a large sample size and control group could describe the relative benet of Eyetoy VR training as compared to other self-directed forms of

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As the participant is a former physical therapist, this opinion is offered from an experienced perspective. For the individual that feels an emotional drive to win a game, there
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