ALESIS D4/DM5 Drum Modules Service Manual V1.00 10/17/95
Alesis D4/D5 Drum Modules Service Manual

02/19/03

PREFACE
This document is intended to assist the service technician in the operation, maintenance and repair of the D4/DM5 Drum Modules. Together with the D4 and DM5 Reference Manuals, this document provides a complete description of the functionality and serviceability of the D4 and DM5. Any comments or suggestions you may have pertaining to the document are welcome and encouraged.

WARNINGS

TO REDUCE THE RISK OF ELECTRIC SHOCK OR FIRE, DO NOT EXPOSE THIS PRODUCT TO WATER OR MOISTURE.

CAUTION

RISK OF ELECTRIC SHOCK DO NOT OPEN
The arrowhead symbol on a lightning flash inside a triangle is intended to alert the user to the presence of un-insulated "dangerous voltage" within the enclosed product which may be of sufficient magnitude to constitute a risk of electric shock to persons. The exclamation point inside a triangle is intended to alert the user to the presence of important operating, maintenance and servicing instructions in the literature which accompanies the product. REPAIR BY ANY PERSON OR ENTITY OTHER THAN AN AUTHORIZED ALESIS SERVICE CENTER WILL VOID THE ALESIS WARRANTY. PROVISION OF THIS MANUAL DOES NOT AUTHORIZE THE RECIPIENT TO COMPETE WITH ANY ALESIS DISTRIBUTOR OR AUTHORIZED REPAIR SERVICE CENTER IN THE PROVISION OF REPAIR SERVICES OR TO BE OR MAKE REPAIRS AS AN AUTHORIZED SERVICE CENTER. ALL REPAIRS DONE BY ANY ENTITY OTHER THAN AN AUTHORIZED ALESIS SERVICE CENTER SHALL BE SOLELY THE RESPONSIBILITY OF THAT ENTITY, AND ALESIS SHALL HAVE NO LIABILITY TO THAT ENTITY OR TO ANY OTHER PARTY FOR ANY REPAIRS BY THAT ENTITY.

SAFETY SUGGESTIONS

Carefully read the applicable items of the operating instructions and these safety suggestions before using this product. Use extra care to follow the warnings written on the product itself and in the operating instructions. Keep the operating instructions and safety suggestions for reference in the future.
1. 2. 3. 4. 5. 6. 7. 8. Power Source. The product should only be connected to a power supply which is described either in the operating instructions or in markings on the product. Power Cord Protection. AC power supply cords should be placed such that no one is likely to step on the cords and such that nothing will be placed on or against them. Periods of Non-use. If the product is not used for any significant period of time, the product's AC power supply cord should be unplugged from the AC outlet. Foreign Objects and Liquids. Take care not to allow liquids to spill or objects to fall into any openings of the product. Water or Moisture. The product should not be used near any water or in moisture. Heat. Do not place the product near heat sources such as stoves, heat registers, radiators or other heat producing equipment. Ventilation. When installing the product, make sure that the product has adequate ventilation. Improperly ventilating the product may cause overheating, which may damage the product. Mounting. The product should only be used with a rack which the manufacturer recommends. The combination of the product and rack should be moved carefully. Quick movements, excessive force or uneven surfaces may overturn the combination which may damage the product and rack combination. Cleaning. The product should only be cleaned as the manufacturer recommends. Service. The user should only attempt the limited service or upkeep specifically described in the operating instructions for the user. For any other service required, the product should be taken to an authorized service center as described in the operating instructions. Damage to the Product. Qualified service personnel should service the unit in certain situations including without limitation when: a. Liquid has spilled or objects have fallen into the product, b. The product is exposed to water or excessive moisture, c. The AC power supply plug or cord is damaged, d. The product shows an inappropriate change in performance or does not operate normally, or e. The enclosure of the product has been damaged.

9. 10.

Table of Contents PREFACE... ii WARNINGS.... ii SAFETY SUGGESTIONS... iii 1.00 General Descriptions... 1 2.00 Power Supply.. 2
2.10 Battery Backup...2 2.20 PUP Circuit...3
3.00 Digital Signal Paths... 3
3.10 The 8031...3 3.11 Reset...3 3.12 Memory mapped I/O...4 3.13 Data Entry Knob And Footswitches..4 3.14 Keypad Decoding..4 3.15 MIDI...4 3.20 DM3AG ASIC...4 3.21 Address Buss Decoding..5 3.30 Mask ROMS...6
4.00 Analog Signal Paths.. 6
4.10 D4 Audio Output....6 4.11 D4 Headphone Output..6 4.20 D5 Audio Output....6 4.21 D5 Headphone Output..7 4.30 Trigger Inputs...7 4.30 Analog-Digital Conversion..7
5.00 Test Procedures... 7
5.10 D4 Self Test...8 5.20 D5 Self Test...8 5.30 Further Testing...9
6.00 Updates and Corrections.. 10

6.10 D4 Updates...10

7.00 Common Solutions... 11 8.00 Service Parts Lists... 12
8.10 D4 Service Parts List...12 8.20 D5 Service Parts List...14
9.00 D4 Software History.. 16
9.10 Version 1.01...16 9.20 Version 1.02...16 9.30 Version 1.03...17 9.40 Version 1.04...17
10.00 D5 Software History.. 18

10.10 Version 1.01...18

11.00 MIDI Implementation... 19 12.00 Service Manual History.. 28 13.00 Schematics... 29
13.10 D4 Schematics....29 13.20 D5 Schematics....31 13.30 D5 Component I.D..34

INDEX... 36

1.00 General Descriptions
The D4 is a rather simple unit to repair, as the component count has been greatly reduced by the use of the DM3AG ASIC (Application Specific Integrated Circuit). The basic building blocks of the unit are the 8031 micro controller (which handles all basic unit functions such as triggers , LCD output, Keypad input, and MIDI I/O), sample generation circuits (ASIC, DAC, Analog switch, and output filter/buffers), and some miscellaneous support circuits such as system reset, battery backup, etc. The DM5 (Alesis product code D5) is extremely similar in design, with the one major difference being the use of better DACs. This has required the addition of on extra IC {D56IFT ASIC} for the purpose of converting parallel data to a serial format and generating clock signals for use with the new DACs. In addition this IC consolidates several other functions previously performed by discreet logic such as memory map decoding and handling the highest order Mask ROM addressing lines. Please note that there are several main PC Board revisions, and some differences will be noticed from unit to unit. Reference designators refer to the D4 unless in brackets {D5 reference} or otherwise noted.

3.00 Digital Signal Paths
3.10 The 8031 The 8031 MPU is the heart of the D4/D5's control section. It handles everything from keypad input and MIDI I/O, to triggers. Note that the 8031 data buss serves a dual purpose. This buss multiplexes between low order addresses (1st 8 bits), and data. Latch U4 {internal to 56IFT ASIC} is used to hold the low order address half, during 8031 read and write cycles. The (U5) {U15} is used to hold 8031 program information. The SRAM (U6) {U16} holds system variables, as well as user parameter data. Z1 {Z1} provides the 12MHz 8031 clock. MIDI I/O is handled through the 8031's built in RXD (Read Serial Data), and TXD (Transmit Serial Data) ports. Piezo input is handled through the regular 8031 I/O ports. Keypad decoding, DM3AG ASIC control, and LCD output are handled through memory mapped I/O (see section 3.12). 3.11 Reset The reset circuit is perhaps the most singly important circuit in the D4/D5. Failures in the reset circuit can cause symptoms ranging from loss of battery backup to a complete machine lock up. The circuit utilizes the positive raw supply voltage to determine when the supply voltage is high enough for the regulators to function properly. Diagram Error! Bookmark not defined. shows the sequence of events during power up. When the raw Diagram 3 supply voltage reaches approximately 7.2V, Q1 {Q11} switches on, pulling the base of Q2 {Q7} low and shutting it off. This allows C32 {C106} to charge via R23 {R126}. Once C32 {C106} reaches roughly 3V, U7 {U27A} (pins 10 and 11) switches states, Alesis D4/D5 Drum Modules Service Manual 3 02/19/03
completing the reset process. The reverse process occurs anytime the raw supply falls below 7.2V. This ensures that all functions that might cause data corruption are not functioning when the power supply is unstable. 3.12 Memory mapped I/O In order to easily control the vast number of hardware functions that the 8031 needs to access, a system of memory mapped I/O is used. The basic idea is to make hardware functions appear to the 8031 as unused memory locations. That way all that the software has to do is write to a memory location in order to send that information to a specific device such as the LCD, or ASIC. In the case of the D5 many of the map decoding functions are incorporated into the D56IFT ASIC, reducing the parts count relative to the D4. 74HC138 (U12) {D56IFT} performs the majority of the work in this circuit. Two things are required before U12 becomes active. 1> A15 must be low (i.e. the 8031 is accessing the lower 32K of address space). 2> The 8031 WRite line must be active (the 8031 is performing a memory write). A15 is used to directly control which function (memory or I/O) is active. Once U12 is enabled, addresses A12-A14 are decoded by it, and the latch corresponding to the value of the decoded address is strobed. At this point, data on the 8031 data buss is "written" into the latch. 3.13 Data Entry Knob And Footswitches The data entry knob and footswitches are read via the memory mapped latch U11 {U22}. This allows the 8031 to directly read any changes in the status of these inputs. 3.14 Keypad Decoding The keypad is handled through a simple polling matrix implemented through the memory mapped latches U10 and U11 {U20, U22}. Each row is tested by the 8031, one at a time, via U10 {U20}. Any closed switches are read into U11 {U22}, and passed along to the 8031 for interpretation. 3.15 MIDI The MIDI hardware is a standard implementation. MIDI out/thru begins at the 8031's TXD port (pin 11) and is buffered with two inverters of U7 {U27}. MIDI in consists mostly of the opto isolator (U8) {U23}, protection diode D4 {D6}, pullup R18 {R128}, and threshold resistor R19 {R129}. 3.20 DM3AG ASIC The DM3AG ASIC is a complex LSI device, specifically designed for the purpose of playing percussion samples. Obviously, the internal workings of such a device are beyond the scope of this manual, however, a brief description of the important pins follows.

NAME MD0-MD7 CLOCK DAC0-DAC16 A0-A19 D0-D7 SNH0 SNH1 SNHIN Inhibit. STRES STB
PIN#(s) 27-42-51, 53-60 3-17, 19-23 61-26 25
Function 8031 Data Buss Input. Asic Clock Input (8MHz in SR-16). Output to DAC. Mask Address Buss Mask Rom Data Buss Output Sample and Hold Control " " " " " Output Sample and Hold Instruction reset strobe. Instruction latch strobe.
Diagram 2 Diagram 5 3.21 Address Buss Decoding Due to the fact that we are pushing the ASIC beyond it's original design, a little extra hardware was required to accomplish the design goals of the D4. Two limitations needed to overcome. 1> The address space directly accessible wasn't enough for all of the samples. 2> The ASIC clock speed was increased from earlier designs to 12MHz, making extra communication from the 8031 more difficult. This solution to these problems takes the form of an asynchronous decoder. The purpose of the decoder is to act as an extra set of address lines to ensure that only one Mask ROM is enabled at any given time. Alesis D4/D5 Drum Modules Service Manual 5 02/19/03
Two bits are required for each sample read (6 Mask ROMs, 0-5). This, plus the fact that there are sixteen voices available means that 32 bits total are required for each "sample output cycle". Latches U14-U17 provide the storage area needed to hold all 32 "extra" address bits (which are provided by the software via memory mapped I/O [see section 3.12]). Binary counters U19-U20 are used to synchronize the decoding process. U13 is used to decode which latch the current voice's bit pair will come from, while U18 is used to mask the bit pair itself from the other outputs of the current latch. U30 does the actual decoding of the bit pair, providing the single Chip Enable needed to access the desired sample. Note that 1/2 of U43 is used as a one shot multivibrator to extend the time that the CLear line of the binary counters (U19-U20) is held low slightly longer than SNH0 is low. This is to ensure that the 8031 has time to communicate necessary parameters to the ASIC before the decoder starts it's processing. Since the D5 uses much larger Mask ROMs, this type of decoding scheme is not necessary. The D56IFT ASIC contains all the extra hardware needed to handle extra address lines not dealt with in the DM3AG ASIC. 3.30 Mask ROMS The Mask ROMs contain the all of the sample information. The 18 bit address buss allows for 2 megabytes per Mask ROM. Since Mask ROMs rarely fail, most problems in this area will consist of opens or shorts along the data and address busses. Mask Roms in the D5 have a 20 bit address buss (thus only 2 are needed).

4.00 Analog Signal Paths

4.10 D4 Audio Output Output from the DAC is routed to the four individual output (Main and Aux, Left and Right) by an analog switch (U39). Output selection is controlled directly by the DM3AG ASIC. Each output section consists of an output sample capacitor (C96-C99), and a buffer/anti aliasing filter amplifier (U42, associated resistors and capacitors). 4.11 D4 Headphone Output The left and right headphone outputs are a sum of the main and aux outputs sent though a pair of X10 inverting amplifiers. The output impedance is fixed by the sum of the op-amps output impedance, and R141/R142 in parallel with C34/C35, at roughly 150. This makes the headphone outs more compatible with 600 pro headphones than the 8 consumer variety. 4.20 D5 Audio Output The outputs of the '4319 DACs are buffered and low pass filtered by U2 (and surrounding resistors and capacitors) before being routed to the outputs via A.C. coupling capacitors {C11, C3, C35, C31}. Note that only the main outs run through the volume potentiometer just before being sent to the outputs. Output impedances are fixed at roughly 300. C1, C2, C29, and C30 provide R.F. filtering at the outputs.
4.21 D5 Headphone Output Headphone outputs are taken from the main out lines after the volume potentiometer. These signal are passed through a gain stage (approximately X10) consisting of U5 and it's associated circuitry. The signal is R.F. filtered {C42, C43} before passing on to the output jack. Note that supply lines to U5 are taken from the raw +/-12V. This is to provide the maximum possible amount of headroom to this output. A lower output impedance than the D4 provides for a little extra current when using 8 "consumer" headphones. 4.30 Trigger Inputs The trigger input circuitry is much simpler than it might first appear. Note that due to the fact that the trigger inputs are the same, only "typical" designations appear on the D4 schematic. A chart of actual part designations appears below the trigger input circuit on the schematic. The input from JT1 is noise filtered by CT0 and CT1. The two sections of an LM339 act as a differential buffer amplifier, providing isolation for the input signal. CT2 provides further filtering and smoothing. The signal is then sent to the analog switches U22 {U11} (trigger ins 1-6) and U23 {U13} (trigger ins 7-12) where it is multiplexed with the other trigger inputs before analog to digital conversion. Trigger input selection is handled by the 8031 via memory mapped I/O (see section 3.12) latch U10 {U20} (TRG A0-TRG A4). The D5s trigger input circuitry is virtually identical to that of the D4. Note that on the D5 schematics all triggers are shown separately. 4.30 Analog-Digital Conversion Successive approximation is an empirical approach to the process of analog to digital conversion. The idea is to divide the process into short, manageable sections. Each significant binary weight (starting with the Most Significant Bit) is taken in turn, thus requiring only 8 comparisons to achieve a final value. U2 {U18} is used to buffer the 8031 output ports. These signal are summed through the binary weighted resistor network consisting of R1-R5 and the resistor SIP R7 {R104-R114, R137}. This signal is compared to the filtered and shaped trigger input signal. The result of this comparison is sent back to the 8031. Once the 8031 has obtained a value for all 8 bits, it stores the final result in memory for further processing, and continues with the next trigger input. Note that when the 8031 examines the states of the trigger inputs, it doesn't use a specific amplitude to trigger on, rather it looks for a large change in amplitude over a short period of time. This helps to prevent false triggering from the other drums in the kit.

5.00 Test Procedures

The D4 contains a number of built in "hidden" routines to assist with troubleshooting and repair of the D4. These routines include: Self Test-Initiates internal diagnostics routines. (Power up while holding the "MIDI" and "DRUMSET" buttons simultaneously. Use the "MIDI" button to advance to the next test.) Reinitialization-Clears memory and resets software parameters to initial values. (Power up while holding "OUTPUT" and "VOICE" simultaneously.) Check Version-Shows current software version. (Select "DRUM SET" Mode. Press "CURSOR RIGHT" and "CURSOR LEFT" simultaneously.)
5.10 D4 Self Test The self test consists of several separate routines to check different parts of the D4s circuitry. To initiate the self test hold "MIDI" and "DRUMSET" while powering up the unit. The tests include (in order): RAM: Tests each location in memory for accuracy. The is not memory destructive. ROM: Generates a checksum of all ROM locations and compares it to the correct value stored in the ROM. The chances of this test failing to identify a true ROM failure are extremely low. LEDs: Sequentially lights all LEDs beginning with the upper left corner. MIDI: Tests MIDI I/O functions. (A MIDI cable MUST be connected between the D4's MIDI IN and OUT for the test to operate correctly.) Level Check Test: Tests Main and aux output levels. Triggers: Test individual triggers (See D5 self test procedures for details) Buttons: Tests front panel buttons. DAC Adjustment: While listening to the main outs, adjust the DAC trimpot for minimum distortion. 5.20 D5 Self Test The D5 has two self test modes which allow the running of diagnostic tests on the digital circuitry. In Individual Test mode, one can select particular tests to run. In All Test mode, the D5 runs all of the tests in series. To enter Individual Test mode: - Power up the unit while holding down the DRUMSET and GROUP buttons. Use the Value Dial to select which test to run (each test is described below). Press STORE to execute the test. When the test is complete, you can either select another test to run or exit Individual Test mode by simultaneously pressing MIX and OUTPUT. To enter All Test mode: - Power up the unit while holding down the DRUMSET and MIDI buttons. Individual Test Descriptions: 1. ROM Test. If the unit passes, the D5 will display "Passed ROM Test" and exit the test automatically. If the unit fails, the D5 will display "Failed ROM Test!" and won't exit the test. In this case, the user must press OUTPUT to exit. 2. RAM Test. If the unit passes, the D5 will display "Passed RAM test" and exit the test automatically. If the unit fails, the D5 will display "Failed RAM test!" and won't exit the test. In this case, the user must press OUTPUT to exit. 3. LED Test (Individual). Lights up each LED individually. The D5 automatically exits this test after all LEDs have been lighted. 4. LCD TEST. Lights up all the LCD pixels. Press OUTPUT to exit the test. 5. Switch and Encoder Test. Checks all of the buttons and the rotary encoder. The user must press every button and rotate the encoder in both directions in order for the test to pass. After pressing all the buttons, the user should simultaneously press the left and right Cursor buttons. If at this point all of the buttons have been pressed (i.e., the unit passed), then the D5 will simply exit. If instead not all of the buttons have been pressed, the D5 will display "Fail Switch Test". The user can either restart the test (by pressing STORE) or exit the test (by pressing OUTPUT). 6. MIDI In/Out Test. Before running this test the user must connect a MIDI cable from the MIDI Out to the MIDI In. If the unit passes, the D5 will display "Passed MIDI I/O" and exit the test. If the unit

fails, the D5 will display "Failed MIDI I/O!" and won't exit the test. In this case, the user must press OUTPUT to exit. 7. Output Test. This tests the four output channels by playing a trio of drum sounds through them. Pressing the STORE button starts the test. It starts with the Main Left channel. Pressing the OUTPUT button cycles through the Main and Aux channels, and then exits the test. 8. Trigger Test. This tests the twelve trigger inputs by playing a sound through the MAIN LEFT output, and triggering a trigger input. A cable must be connected from the MAIN LEFT output to one of the 12 Trigger Inputs, in order from 1 to 12 Pressing the STORE button starts the test. Once the test has been started, connect a cable from the MAIN LEFT output to the Trigger 1 input ONLY! Do NOT connect the output to all 12 triggers simultaneously! When the test has started, the LCD will display the message, "Testing Trig 1". At this point, plug the cable from the MAIN LEFT output into Trigger Input 1. Soon after, the display should change to "Testing Trig 2". If the display does not change, or displays the message "Fail Trig 1", then the test has failed for this trigger input. Pressing the OUTPUT will skip to the next trigger if an error occurs. Once the display shows "Testing Trig 2", unplug the cable from the Trigger 1 input, and plug it into the Trigger 2 input. The display should then show "Testing Trig 3". Repeat the process until all 12 triggers have been tested. 5.30 Further Testing Because of the extensive self test capabilities of the D4/D5 very little extra testing is necessary. It is always a wise policy to listen to the unit (both through the headphones and via the main and aux outs) for any signs of distortion. Trigger inputs can be tested using a piezo element (such as the type commonly used for establishing front panel velocity) wired to a 1/4" jack. MIDI can be further tested using a sequencer or SYS-EX storage device (SYS-EX is probably more accurate as it allows data travel to be sent as well as received). As always, it is a good idea to shake the fully reassembled unit to ensure that no loose components are inside.
6.00 Updates and Corrections
6.10 D4 Updates Revision C and higher boards require no updates as of this manual release. The remainder of this section applies to all Revision A and B PCBs unless otherwise noted. Revision A PCBs will contain many odd jumpers. These were installed at the factory and should not be of too much concern to the technician. Revision A & early revision B PCBs have gray ribbon cables between the main and front panel PCBs. These were found to be unreliable and should be replaced with standard SIL cables (ALPARTNO 4-19-7511). These same PCBs will also have black headers where the gray cable attaches. These headers should also be replaced for the same reason. Add 20pF between left side of D3 and right side of R12. Note that this may already exist on the bottom of the board. This update filters out audio noise that occurs when the data wheel is in certain positions. R153 should be changed from 200k to 100k and the trimpot from 250k to 50k on revision A PCBs only (later revisions have already incorporated this change). This changes the range of the DAC adjust circuitry. On some early units the DAC may not be adjusted correctly due to the fact that the range is not large enough R9 should be changed to 100 from 470. This speeds up the response of the output sample and hold circuitry resulting in a timbrely brighter output.

DESCRIPTION

PCB, D4 MAIN ASSY PCB, D4 KEYPAD ASSY 14 PIN DIL 200mm 3 PIN SIL 175mm 3 PIN SIL 75mm 10 PIN SIL 75mm 0.47 MF ELEC 50V 2200 MF ELEC 16V 1000 PF CERDISC 0.01 MF CERDISC 0.1 MF CERDISC 150 PF CERDISC 20 PF CERDISC 5000 PF CERDISC 0.01 MF FILM 03 PIN SIL (SHROUDED) 10 PIN SIL (SHROUDED) 14 PIN DIL 6-32x1/4 PPB M3x7mm PHILSLOT 6-32x1/2 STANDOFF SOLDER LUG RETAINER STRIP 11x200mm FOAM STRIP 6.5x180mm FOAM STRIP 6.5x100mm 7805 +5 V REG TO-5 V REG TO220 74HC138 DEMUX 74HC153 DUAL 4-I/P MUX 74HC161 BINARY COUNTER 74HC541 OCTAL BUFFER 74HC573 3-STATE LATCH 74HC574 OCTAL FF 74HC04 HEX INVERTER 74HC74 DUAL D FF 8Kx8 SRAM 58128 27C512 EPROM 80C31 MPU TLOOP AMP NE5532N DUAL OP AMP LM311 ANALOG COMP LM339 QUAD COMP 4051 ANALOG SWITCH 4052 ANALOG SWITCH 6N138 OPTO ISO PCM54HP 16-BIT DAC MASK ROM D1 CHIP 1 MASK ROM D1 CHIP 2 MASK ROM D2 CHIP 1 MASK ROM D2 CHIP 2 MASK ROM D4-1 MASK ROM D4-2 DM3ET0 ASIC 5 PIN DIN JACK 1/4 CLIFF (MONO) 1/4 CLIFF (STER) 3.5mm BAR JACK (P3)

ALPARTNO

8-20-0022 8-20-0023 4-18-0415 4-19-0103 4-19-0104 4-19-7511 1-07-1474 1-08-2200 1-02-0102 1-02-0103 1-02-0104 1-02-0151 1-02-0200 1-02-0502 1-20-0103 4-14-0003 4-14-0010 4-14-0014 5-00-0003 5-00-0020 5-02-0003 9-03-1036 9-13-1019 9-23-1014 9-23-1017 2-11-7805 2-11-7905 2-14-0138 2-14-0153 2-14-0161 2-14-0541 2-14-0573 2-14-0574 2-14-7404 2-14-7474 2-17-0129 2-19-0512 2-20-8031 2-21-0084 2-21-5532 2-22-0311 2-22-0339 2-23-4051 2-23-4052 2-24-0138 2-25-0054 2-27-0003 2-27-0004 2-27-0007 2-27-0008 2-27-0013 2-27-0014 2-27-0015 4-00-0001 4-02-0001 4-03-0001 4-16-0002

QTYPER

POSITION
MAIN BOARD ASSEMBLY FRONT PANEL (KEYPAD) BOARD ASSEMBLY J4-LCD J6-PHONES PCB J3-ENCODER PCB,J5-VOL PCB J1-KEYPAD PCB,J2-KEYPAD PCB C4-15 C1-3 C31 C17,18,44,46,48,50,52,54,59,60,62,63,65,66 C16,19,20,23-28,30,30,32-42,55-57,68-76,100,101,102,104,105 C29,43,45,47,49,51,53,58,61,64,67,77,79,80,82,83,85,87,88,90,91,94,95,106-113 C21,22,78, (REV D) C114 C81,84,86,89,96-99 C103 J3,J5,J6,ENCODER PCB,PHONE PCB,VOL PCB J1,J2,KEYPAD PCB (2) HEATSINKS CASE HEATSINKS FRONT PANEL FRONT PANEL RACK EAR

MANUFACT

MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN

MAIN MAIN MAIN MAIN

U12,13,30 U18 U19,20 U2,11 U4 U9,10,14-17 U7 U43 U6 U5 U3 U21,42 U41 U1 U24-29 U22,23 U39 U8 U38 U36 U35 U34 U33 U32 U31 U37
MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN

5 The signal threshold for the diagnostics trigger self-test has been lowered to keep units from failing unnecessarily in repair. 6 The note number assignment of trigger 9 has been changed on most preset drumsets from 039 D#1 (handclap) to 057 A2 (crash cymbal 2). 7 The dynamic voice allocation scheme has been improved so that voice-stealing is less noticeable.
8 Any system exclusive messages received that included nested midi real-time messages (i.e. timing clocks, active sensing, start, stop, or continue) would cause the system exclusive data to be ignored and the SYSEX DATA ERROR message would be displayed. This has been fixed so that any nested realtime message are ignored, and the sysex data reception continues uninterrupted. 9 A new system exclusive message has been added (opcode 05H) to transmit and receive the new trigger parameters. The new sysex messages will allow version 1.01 software to upload trigger gains to version 1.02, but the trigger types will be ignored. Version 1.02 trigger parameters sent to a version 1.01 machine will be ignored completely. 10 The reception of a "System Info Request" system exclusive message (opcode 40H) would result in the transmission of the complete 25 packet system exclusive dump of the entire D4's memory. This has been changed so that only the System Info message packet is sent. 11 The system exclusive message that allows an external device to display characters on the LCD (opcode 04H) had a bug that would cause the SYSEX DATA ERROR message to be displayed instead. This now works properly. Alesis D4/D5 Drum Modules Service Manual 16 02/19/03
9.30 Version 1.03 1/2/A bug existed in the v1.02 voice allocation routine that would cause short sounds or individual samples within sounds to drop out or sputter until the machine was powered off. This is now fixed. 2 A bug existed (in v1.02 only) that could prevent the user from selecting a new trigger note number for triggers 3, 7, and 11. This is now fixed. 9.40 Version 1.04 3/19/A bug existed (in v1.03 only) that could crash the machine if a flurry of notes were sent to the D4 and if some of the voices assigned to those notes were set to SINGLE, GROUP1, or GROUP2 mode. This is now fixed. 2 The system exclusive receive routine has been modified so that the time out period used to detect unplugged midi cables and unfinished system exclusive messages is now 250mS instead of 80mS as in earlier versions. This was done to allow slow computers more time while transmitting to the D4 before the D4 panics and aborts the sysex load. In addition, the LCD will now correctly display the "MIDI BUFFER OVERFLOW" message when the buffer overflows during sysex reception instead of the "SYSEX DATA ERROR" message. 3 The signal threshold for the diagnostics trigger self-test has been lowered even further to keep units from failing unnecessarily in repair.

10.00 D5 Software History
10.10 Version 1.01 9/22/95 First production release.
11.00 MIDI Implementation
April 3, 1992 D4 Software Version 1.04 Including September 22, 1995 D5 V1.01 D5 differences are noted in italics.
TRANSMITTED DATA Channel Messages Status 1001 nnnn

Second 0kkk kkkk

Third 0vvv vvvv
Description Note On kkk kkkk = 0-127 (61 Key Window + Root Note) vvv vvvv = 1-127 vvv vvvv = 0 = Note Off
Universal System Exclusive Messages (Transmitted on power up and when Inquiry Request is received) Byte 0uuu uuuu 0qqq qqqq 0qqq qqqq 0rrr rrrr 0rrr rrrr Description Exclusive Status Non-Real Time Message ID Universal Sysex Channel (Same as D4 Midi Channel) General Information Sub-ID Inquiry Message Identity Reply Manufacturers System Exclusive ID Code Alesis = 00H,00H,0EH Device Family Code LSB (D4 = 6 D5 = 13H) Device Family Code MSB Device Family Member LSB (D4 = 0) Device Family Member MSB Software Version LSB Software Version MSB Software Revision LSB Software Revision MSB EOX
D4/D5 System Exclusive Messages Byte 0000 nnnn 00oo oooo 0ddd dddd ---- ---Description Exclusive Status Manufacturers System Exclusive ID Code Alesis = 00H,00H,0EH Device ID (D4 = 6) Midi Channel Opcode (see Sysex section for opcode definitions and data structures) Data --EOX
RECOGNIZED RECEIVE DATA Channel Messages Status 1001 nnnn Second 0kkk kkkk Third 0vvv vvvv Description
Note On kkk kkkk = 0-127 (61 Key Window + Root Note) vvv vvvv = 1-nnnn 0vvv vvvv Data Entry MSB *nnnn 0vvv vvvv Volume *nnnn 0xxx xxxx Data Increment *1 xxx xxxx = Ignored 1011 nnnn 0xxx xxxx Data Decrement *1 xxx xxxx = Ignored 1011 nnnn 0vvv vvvv Non-Registered Parameter Number LSB *nnnn 0vvv vvvv Non-Registered Parameter Number MSB *1 (see Parameter section for specific values) 1011 nnnn 0vvv vvvv Registered Parameter Number LSB *nnnn 0vvv vvvv Registered Parameter Number MSB *1 (see Parameter section for specific values) 1011 nnnn 0xxx xxxx Reset All Controllers *nnnn Local Control Off 1011 nnnn Local Control On 1011 nnnn 0xxx xxxx Omni Mode Off 1011 nnnn 0xxx xxxx Omni Mode On 1100 nnnn 0ppp pppp ---- ---Program change 1110 nnnn 0mmm mmmm 0nnn nnnn Pitch Bend Change *1 *1 Recognized only if CONTROLLERS is set to ON in MIDI page Universal System Exclusive Messages Byte 0uuu uuuu Description Exclusive Status Non-Real Time Message ID Universal Sysex Channel (ignored if OMNI = ON, 7FH = any channel) General Information Sub-ID Identity Request EOX
D4 System Exclusive Messages Byte 0uuu uuuu 00oo oooo 0ddd dddd ---- ---Description Exclusive Status Manufacturers System Exclusive ID Code Alesis = 00H,00H,0EH Device I.D. (D4 = 6 D5 = 13H) Midi Channel 7FH = Any channel Opcode (see Sysex section for opcode definitions and data structures) Data --EOX

The seventh byte "qq" is the opcode. If bit 6 of this opcode is set the message is a data request and the opcode is always followed immediately by an end-of-exclusive status byte. Opcodes with bit 6 cleared are data dump headers that identify the type of data that is to follow. In either case, the lower six bits of the opcode represent the same data structure, whether the message is a data request or a data dump. Most system exclusive messages on the D4 include a checksum byte after the data immediately before the F7H end-of-exclusive status byte. This checksum is the modulo 128 addition of all the data bytes contained in the message starting with the byte immediately following the opcode. Opcode ---- ------- ---001p pppp ---- ------- ---01qq qqqq Length (Total bytes) System Info 11 Drumset Data for Edit Buffer 343 Old Trigger Setup (version 1.01 only) 33 Program Change Table 137 Display Message 40 New Trigger Setu 69 Reserved / Unused x --x --x Reserved / Unused x Drumset Data for Drumset 0-Reserved / Unused x --x --x Reserved / Unused x Requests for opcodes 0-Description Checksum No Yes Yes Yes No Yes x x x x Yes x x x x No
When a "SYSTEM (ALL)" bulk dump is initiated from the front panel the D4's entire memory contents get transmitted out MIDI in a series of 25 system exclusive messages. This series begins with the Program Change Table message, and is followed by the Trigger Setup message, the Edit Buffer message, 21 consecutive Single Set messages (beginning with Drumset 0), and finally the System Info message. Note that it is possible in some systems to overflow the D4's midi receive buffer when sending data for more than one drumset. If this happens the transmitting device should pause for at least 250 milliseconds every 256 bytes to insure that the receiving D4 has enough time to manage drumset memory. Message 0 / System Info Data Format (following header): Byte 11 Bit Field 0bbb bbbb 0000 nnnn 000s ssss Description Opcode = System Info System Byte (see specific bit definitions following) Midi Channel (0-15) Currently selected drumset (0-20) EOX
System Byte Bit Definitions: Bit 6 Function Polarity Omni Off Set if omni mode is off. Midi Thru Enable Set if MIDI thru is enabled. Program Change Enable Set if program change receive is enabled. Controllers Enable Set if MIDI controllers are enabled. Drumset Edited Set if drumset in edit buffer has changed. Footswitch Mode 0 = Hi Hat, 1 = Drumset Advance Note Chase Enable Set if Note Chase is on.
Message 1 / Edit Buffer Data Format (following header): Byte 9 --------36 37-41 42-46 ----337-343 Bit Field 0aaa aaaa 0aaa aaaa ---- ------- ---0aaa aaaa 0mmm mmmm 00nn nnnn 00nn nnnn 00nn nnnn 00nn nnnn ---- ------- ---00nn nnnn ---- ------- ------- ------- ------- ---0xxx xxxx Description Opcode = Edit Buffer Drumset name character 1 Drumset name character 2 ----Drumset name character 14 Drumset Root Note Footswitch "closing" note Footswitch "held" note Trigger 1 note number Trigger 2 note number ----Trigger 12 note number Data packet for note 0 Data packet for note 1 ----Data packet for note 60 Checksum EOX Range (ascii) (ascii) (ascii) (0-67) (0-60) (0-60) (0-60) (0-60)

(0-60) (see below for packet definitions) --------(0-127)
Note Data Packet Definitions (5 bytes per note): Byte Bit Field 0vvv vvvv 0ppp obbb Description v = volume (0-99) p = panning: 0=left, 3=center , 6=right o = output: 0=main, 1 = aux b = drum bank: (0-6) Kik, Snr, Cym, Tom, Prc, Efx {0-8} Kik, Snr, Tom, Hat, Cym, Prc, Efx, Rnd n = drum number (0-99, drum bank specific) f = fine tuning (0-99 cents) x = reserved, always 0 g = assign group (0-3): 0=multi, 1=single, 2=group 1, 3=group 2 c = coarse tuning (-4,+3 semitones)
0nnn nnnn 0fff ffff 0xxg gccc
Message 2 / Old Trigger Setup (version 1.01 only) Data Format (following header): Byte 9 ----21 ----33 Bit Field 000t tttt 000t tttt ---- ------- ---000t tttt 000t tttt 000t tttt ---- ------- ---000t tttt 0xxx xxxx Description Opcode = Trigger Setup Trigger 1 gain Trigger 2 gain ----Trigger 12 gain Trigger 1 type Trigger 2 type ----Trigger 12 type Checksum EOX Range (0-99) (0-99) ----(0-99) (0-25) (0-25) ----(0-25) (0-127)
Message 3 / Program Table Data Format (following header): Byte Bit Field 000p pppp 000p pppp ---- ------- ---000p pppp 0xxx xxxx Description Opcode = Program table Internal Drumset selected for external program change 0 Internal Drumset selected for external program change 1 ----Internal Drumset selected for external program change 127 Checksum EOX Range (0-20) (0-20) ----(0-20) (0-127)
Message 4 / Display Message This message will display 32 characters on the LCD for approximately 5 seconds and then restore the previous display. Data Format (following header): Byte 9 ----Bit Field 0aaa aaaa 0aaa aaaa ---- ------- ---0aaa aaaa Description Opcode = Display Message LCD character position 0 LCD character position 1 ----LCD character position 31 EOX Range (ascii) (ascii) ----(ascii)
Message 5 / New Trigger Setup (versions 1.02 and greater) Note that the D5 can both transmit and receive trigger setups to and from a D4. Data Format (following header): Byte 69 Bit Field 0ggg gggg 0ggg gggg ---- ------- ---0ggg gggg 0ggg gggg 0000 0ccc 0nnn nnnn 0xxx xxxx 0ddd dddd 0000 0ccc 0nnn nnnn 0xxx xxxx 0ddd dddd ---- ------- ---0000 0ccc 0nnn nnnn 0xxx xxxx 0ddd dddd 0xxx xxxx Description Opcode = New Trigger Setup Trigger 1 gain Trigger 2 gain ----Trigger 11 gain Trigger 12 gain Trigger 1 vcurve Trigger 1 cross-talk Trigger 1 noise floor Trigger 1 decay Trigger 2 vcurve Trigger 2 cross-talk Trigger 2 noise floor Trigger 2 decay ----Trigger 12 vcurve Trigger 12 cross-talk Trigger 12 noise floor Trigger 12 decay Checksum EOX Range (0-99) (0-99) ----(0-99) (0-99) (0-7) (0-99) (0-99) (0-99) (0-7) (0-99) (0-99) (0-99) ----(0-7) (0-99) (0-99) (0-99) (0-127)