5K320 SATA OEM Specification Table 76 Extended Error log data structure Table 77 Command data structure Table 78 Error data structure Table 79 Extended Self-test log data structure Table 80 Extended Self-test log descriptor entry Table 81 Command Error information Table 82 Phy Event Counter Identifier Table 83 Phy Event Counter information Table 84 Read Multiple Command (C4h) Table 85 Read Multiple Ext Command (29h) Table 86 Read Native Max Address Command (F8h) Table 87 Read Native Max Address Ext Command (29h) Table 88 Read Sector(s) Command (20h/21h) Table 89 Read Sector(s) Ext Command (24h) Table 90 Read Verify Sector(s) Command (40h/41h) Table 91 Read Verify Sector(s) Ext Command (42h) Table 92 Recalibrate Command (1xh) Table 93 Security Disable Password Command (F6h) Table 94 Password Information for Security Disable Password command Table 95 Security Erase Prepare Command (F3h) Table 96 Security Erase Unit Command (F4h) Table 97 Erase Unit Information Table 98 Security Freeze Lock Command (F5h) Table 99 Security Set Password Command (F1h) Table 100 Security Set Password Information Table 101 Security Unlock Command (F2h) Table 102 Security Unlock Information Table 103 Seek Command (7xh) Table 104 Sense Condition Command (F0h) Table 105 Set Features Command (EFh) Table 106 Set Max Address Command (F9h) Table 107 Set Max Address Ext Command (37h) Table 108 Set Multiple Command (C6h) Table 109 Sleep Command (E6h/99h) Table 110 S.M.A.R.T. Function Set Command (B0h) Table 111 Log sector addresses Table 112 Device Attribute Data Structure Table 113 Individual Attribute Data Structure Table 114 Status Flag Definitions Table 115 Device Attribute Thresholds Data Structure Table 116 Individual Threshold Data Structure Table 117 SMART Log Directory Table 118 S.M.A.R.T. error log sector Table 119 Error log data structure Table 120 Command data structure Table 121 Error data structure Table 122 Self-test log data structure Table 123 Selective self-test log data structure Table 124 S.M.A.R.T. Error Codes Table 125 Standby Command (E2h/96h) Table 126 Standby Immediate Command (E0h/94h) Table 127 Write Buffer Command (E8h) Table 128 Write DMA Command (CAh/CBh) Table 129 Write DMA Ext Command (35h) Table 130 Write DMA FUA Ext Command (3Dh) Table 131 Write FPDMA Queued Command (61h) Table 132 Write Log Ext Command Table 133 Write Multiple Command (C5h) Table 134 Write Multiple Ext Command (39h) Table 135 Write Multiple FUA Ext Command (CEh) Table 136 Write Sector(s) Command (30h/31h) 170 171

5K320 SATA OEM Specification Table 137 Write Sector(s) Ext Command (34h) Table 138 Write Uncorrectable Ext Command (45h) Table 139 Timeout Values 175

General 1 Introduction

This document describes the specifications of the HITACHI Travelstar 5K320, a 2.5-inch hard disk drive with Serial ATA interface: Drive name Travelstar 5K320-320 Travelstar 5K320-250 Travelstar 5K320-160 Travelstar 5K320-120 Travelstar 5K320-80 Model Number Max data transfer rate (Gbps) 3.0 1.5 3.0 1.5 3.0 1.5 3.0 1.5 3.0 1.5 Capacity (GB) 80 Height (mm) Rotation speed (rpm) 5400
HTS543232L9A300 HTS543232L9SA00 HTS543225L9A300 HTS543225L9SA00 HTS543216L9A300 HTS543216L9SA00 HTS543212L9A300 HTS543212L9SA00 HTS543280L9A300 HTS543280L9SA00

9.5 9.5 9.5 9.5 9.5

32 KB 64 KB A AC AT ATA Bels BIOS C CSA C-UL Cyl DC DFT DMA ECC

Abbreviations

Meaning 32 x 1024 bytes 64 x 1024 bytes inch amp alternating current Advanced Technology Advanced Technology Attachment unit of sound power Basic Input/Output System degrees Celsius Canadian Standards Association Canadian-Underwriters Laboratory cylinder direct current Drive Fitness Test Direct Memory Access error correction code

Abbreviation

5K320 SATA OEM Specification EEC EMC ERP Esd FCC FRU G Gb GB GND h HDD Hz I ILS imped I/O ISO KB Kbit/mm Kbit/sq-mm KHz LBA Lw m max. or Max. MB Mbps Mb/sec MB/sec MHz MLC mm ms us, Nm No. or # oct/min O s European Economic Community electromagnetic compatibility Error Recovery Procedure electrostatic discharge Federal Communications Commission field replacement unit gravity, a unit of force bits bytes ground hexadecimal hard disk drive hertz Input integrated lead suspension impedance Input/Output International Standards Organization 1,000 bytes 1,000 bits per mm 1000 bits per square mm kilohertz logical block addressing unit of A-weighted sound power meter maximum 1,000,000 bytes 1,000,000 Bit per second 1,000,000 Bit per second 1,000,000 bytes per second megahertz Machine Level Control millimeter millisecond microsecond Newton meter number oscillations per minute Output 10
5K320 SATA OEM Specification OD PIO POH Pop. P/N p-p PSD RES RFI RH % RH RMS RPM RST R/W sec Sect/Trk SELV S.M.A.R.T Trk. TTL UL V VDE W 3-state Open Drain Programmed Input/Output Program I/O power on hours population part number peak-to-peak power spectral density radiated electromagnetic susceptibility radio frequency interference relative humidity per cent relative humidity root mean square revolutions per minute reset read/write second sectors per track secondary low voltage Self-monitoring, analysis, and reporting technology track transistor-transistor logic Underwriters Laboratory volt Verband Deutscher Electrotechniker watt transistor-transistor tristate logic

1.2 1.3

References General caution
Serial ATA International Organization : Serial ATA Revision 2.6
Do not apply force to the top cover (See figure below). Do not cover the breathing hole on the top cover (See figure below). Do not touch the interface connector pins or the surface of the printed circuit board. The drive can be damaged by shock or ESD (Electric Static Discharge). Any damages incurred to the drive after removing it from the shipping package and the ESD protective bag are the responsibility of the user

n=1 max.

Weighted Average = (max. + 1)(max) Where: max. = maximum seek length n = seek length (1-to-max.) = inward measured seek time for an n-track seek Tnin = outward measured seek time for an n-track seek Tnout

4.4.2.2

Full stroke seek
Typical (ms) 20.0 21.0 Max. (ms) 25.0 26.0
Command Type Read Write Table 6. Full stroke seek time
Full stroke seek time in milliseconds is the average time of 1000 full stroke seeks.

4.4.2.3

Single track seek time (without command overhead, including settling)
Typical (ms) 1.0 1.1 Maximum (ms) 2.0 2.2
Command Type Read Write Table 7. Single track seek time
Single track seek is measured as the average of one (1) single track seek from every track in both directions (inward and outward).

4.4.2.4

Average latency
Time for one revolution (ms) 11.1 Average Latency (ms) 5.5
Rotational Speed (RPM) 5400 Table 8. Latency time

4.4.2.5

Drive ready time
Typical (sec) 3.5 Max. (sec) 9.5
Condition Power On To Ready Table 9. Drive ready time Ready
The condition in which the drive is able to perform a media access command (for exampleread, write) immediately. Power On To Ready This includes the time required for the internal self diagnostics.

Operating modes

Description Start up time period from spindle stop or power down. Seek operation mode Write operation mode Read operation mode
Operating mode Spin-Up Seek Write Read Performance idle
The device is capable of responding immediately to media access requests. All electronic components remain powered and the full frequency servo remains operational. The device is capable of responding immediately to media access requests. Some circuitryincluding servo system and R/W electronicsis in power saving mode. Active idle The head is parked near the mid-diameter the disk without servoing. A device in Active idle mode may take longer to complete the execution of a command because it must activate that circuitry. The head is unloaded onto the ramp position. The spindle motor is rotating at full Low power idle speed. The device interface is capable of accepting commands. The spindle motor is stopped. All circuitry but the host interface is in power saving mode. Standby The execution of commands is delayed until the spindle becomes ready. The device requires a soft reset or a hard reset to be activated. All electronics, Sleep including spindle motor and host interface, are shut off. Table 10. Operating mode

Sector Count Register

This register contains the number of sectors of data requested to be transferred on a read or write operation between the host and the device. If the value in the register is set to 0, a count of 256 sectors (in 28-bit addressing) or 65,536 sectors (in 48-bit addressing) is specified. If the register is zero at command completion, the command was successful. If not successfully completed, the register contains the number of sectors which need to be transferred in order to complete the request. The contents of the register are defined otherwise on some commands. These definitions are given in the command descriptions.

Status Register

Status Register 5 DF 4 DSC 3 DRQ 2 CORR 1 IDX 0 ERR
BSY DRDY Table 28 Status Register
This register contains the device status. The contents of this register are updated whenever an error occurs and at the completion of each command. If the host reads this register when an interrupt is pending, it is considered to be the interrupt acknowledge. Any pending interrupt is cleared whenever this register is read. If BSY=1, no other bits in the register are valid. Bit Definitions BSY Busy. BSY=1 whenever the device is accessing the registers. The host should not read or write any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status Register will be returned. - 49 -

DRDY (RDY) DF DSC

CORR (COR) IDX ERR
5K320 SATA OEM Specification Device Ready. RDY=1 indicates that the device is capable of responding to a command. RDY will be set to 0 during power on until the device is ready to accept a command. Device Fault. DF=1 indicates that the device has detected a write fault condition. DF is set to 0 after the Status Register is read by the host. Device Seek Complete. DSC=1 indicates that a seek has completed and the device head is settled over a track. DSC is set to 0 by the device just before a seek begins. When an error occurs, this bit is not changed until the Status Register is read by the host, at which time the bit again indicates the current seek complete status. When the device enters into or is in Standby mode or Sleep mode, this bit is set by device in spite of not spinning up. Data Request. DRQ=1 indicates that the device is ready to transfer a word or byte of data between the host and the device. The host should not write the Command register when DRQ=1. Corrected Data. Always 0. Index. Always 0 ERR=1 indicates that an error occurred during execution of the previous command. The Error Register should be read to determine the error type. The device sets ERR=0 when the next command is received from the host.

Default Value Diagnostic Code 01h 01h 00h 00h 00h 50h 50h
The meaning of the Error Register diagnostic codes resulting from power on, COMRESET or the Execute Device Diagnostic command are shown in the following table.
Code 01h 02h 03h 04h 05h Table 31 Diagnostic Codes
Description No error Detected Formatter device error Sector buffer error Ecc circuitry error Controller microprocessor error
12.2 Diagnostic and Reset considerations
The Set Max password, the Set Max security mode and the Set Max unlock counter dont retain over a Power On Reset but persist over a COMRESET or Soft Reset. For each Reset and Execute Device Diagnostic, the Diagnostic is done as follows: Execute Device Diagnostic In all the above cases: Power on, COMRESET, Soft reset, and the EXECUTE DEVICE DIAGNOSTIC command the Error register is shown in the following table. Device 0 Passed Error Register Yes 01h No 0xh Where x indicates the appropriate Diagnostic Code for the Power on, COMRESET, Soft reset, or Device Diagnostic error. Table 32 Reset error register values

- 52 -

12.3 Power-off considerations

12.3.1

Load/Unload
Load/Unload is a functional mechanism of the HDD. It is controlled by the drive microcode. Specifically, unloading of the heads is invoked by the commands: Command Standby Standby immediate Sleep UL Response UL -> Comp. UL -> Comp. UL -> Comp. means unload.
Comp means complete. Table 33 Devices behavior by ATA commands Load/unload is also invoked as one of the idle modes of the drive. The specified start/stop life of the product assumes that load/unload is operated normally, NOT in emergency mode.

12.3.2

When HDD power is interrupted while the heads are still loaded, the microcode cannot operate and the normal 5V power is unavailable to unload the heads. In this case, normal unload is not possible, so the heads are unloaded by routing the back-EMF of the spinning motor to the voice coil. The actuator velocity is greater than the normal case, and the unload process is inherently less controllable without a normal seek current profile. Emergency unload is intended to be invoked in rare situations. Because this operation is inherently uncontrolled, it is more mechanically stressful than a normal unload. A single emergency unload operation is more stressful than 100 normal unloads. Use of emergency unload reduces the start/stop life of the HDD at a rate at least 100X faster than that of normal unload, and may damage the HDD.

14.4 Execute Device Diagnostic (90h)
Command Block Output Registers Register Data - Feature - Sector Count - LBA Low - LBA Mid - LBA High - Device - Command Command Block Input Registers Register 7 Data Error Sector Count LBA Low LBA Mid LBA High Device Status - - - - -.See Below. - - - - - - - - - - - - - - - - - - - - - - - - -.See Below. 0 -
0 AM N 0 V V V V V V V Table 49 Execute Device Diagnostic Command (90h)
Status Register 0 DSC DRQ COR IDX ERR 0
The Execute Device Diagnostic command performs the internal diagnostic tests implemented by the device. The results of the test are stored in the Error Register. The normal Error Register bit definitions do not apply to this command. Instead, the register contains a diagnostic code. See Table 31 Diagnostic Codes on Page 52 for the definition.

14.5 Flush Cache (E7h)

0 V Table 50 Flush Cache Command (E7h)

BSY RDY 0 V

Status Register 0 DSC DRQ COR IDX ERR V V
This command causes the device to complete writing data from its cache. The device returns a status, RDY=1 and DSC=1 (50h), after following sequence. Data in the write cache buffer is written to disk media. Return a successfully completion.
14.6 Flush Cache Ext (EAh)
Command Block Output Registers Register Data Low - - - - - - - Data High - - - - - - - Feature Current - - - - - - - Previous - - - - - - - Sector Count Current - - - - - - - Previous - - - - - - - LBA Low Current - - - - - - - Previous - - - - - - - LBA Mid Current - - - - - - - Previous - - - - - - - LBA High Current - - - - - - - Previous - - - - - - - Device - - - - - - - Command Error Register CRC UNC 0 IDN 0 ABT T0N AMN 0 V Table 51 Flush Cache EXT Command (EAh) Command Block Input Registers Register Data Low - - - - - - - Data High - - - - - - - Error.See Below. Sector Count LBA Low LBA Mid LBA High Device Status HOB=0 HOB=1 HOB=0 HOB=1 HOB=0 HOB=1 HOB=0 HOB=1 - - - - - - - - - - - - - - - - - - - - - - - - - - -.See Below. -
Status Register BSY RDY DF DSC DRQ COR 0 V 0 V 0

1 IDX 0

0 ERR V

This command causes the device to complete writing data from its cache. The device returns good status after data in the write cache is written to disk media.
14.7 Format Track (50h: Vendor Specific)
Command Block Output Registers Register Data - Feature - Sector Count - LBA Low V V LBA Mid V V LBA High V V Device - L Command 5 V V V V V V V V V H V V V H V V V H V V V H 0 Command Block Input Registers Register 7 Data Error Sector Count LBA Low V LBA Mid V LBA High V Device Status - - - - -.See Below. - - - - - V V V V V V V V V V V V V V V V V V - - - H H H.See Below. 0 V V V H
0 V 0 V Table 52 Format Track Command (50h)
The Format Track command formats a single logical track on the device. Each good sector of data on the track will be initialized to zero with write operation. At this time, whether the sector of data is initialized correctly is not verified with read operation. Any data previously stored on the track will be lost. Output Parameters To The Device In LBA mode, this register specifies LBA address bits 0 - 7 to be formatted. (L=1) LBA Low The cylinder number of the track to be formatted. (L=0) LBA High/Mid In LBA mode, this register specifies LBA address bits 8 - 15 (Mid), 16 - 23 (High) to be formatted. (L=1) The head number of the track to be formatted. (L=0) H In LBA mode, this register specifies LBA address bits 24 - 27 to be formatted. (L=1) Input Parameters From The Device In LBA mode, this register specifies current LBA address bits 0-7. (L=1) LBA Low In LBA mode, this register specifies current LBA address bits 8 - 15 (Mid), 16 - 23 (High) LBA High/Mid In LBA mode, this register specifies current LBA address bits 24 - 27. (L=1) H In LBA mode, this command formats a single logical track including the specified LBA.
14.8 Format Unit (F7h: Vendor Specific)
Command Block Output Registers Register Data - Feature V V Sector Count - LBA Low - LBA Mid - LBA High - Device - Command 5 V V V V V V 1 Command Block Input Registers Register 7 Data Error Sector Count LBA Low LBA Mid LBA High Device Status - - - - -.See Below. - - - - - - - - - - - - - - - - - - - - - - - - -.See Below. 0 -
0 V 0 V Table 53 Format Unit Command (F7h)
Status Register DF DSC DRQ COR IDX ERR 0 V V
The Format Unit command initializes all user data sectors after merging reassigned sector location into the defect information of the device and clearing the reassign information. Both new reassign information and new defect information are available right after this command completion, and are also used on next power on reset. Both previous information are erased from the device by this command. Note that the Format Unit command initializes from LBA 0 to Native MAX LBA. Host MAX LBA set by Initialize Drive Parameter or Set MAX ADDRESS command is ignored. So the protected area by Set MAX ADDRESS commands is also initialized. The security erase prepare command should be completed immediately prior to the Format Unit command. If the device receives a Format Unit command without a prior Security Erase Prepare command the device aborts the Format Unit command. If Feature register is NOT 11h, the device returns Abort error to the host. This command does not request to data transfer. Output Parameters To The Device Destination code for this command Feature 11H Merge reassigned location into the defect information The execution time of this command is shown below. HTS543232L9SA00 / HTS543232L9A300 HTS543225L9SA00 / HTS543225L9A300 HTS543216L9SA00 / HTS543216L9A300 HTS543212L9SA00 / HTS543212L9A300 HTS543280L9SA00 / HTS543280L9Amin 100 min 65 min 50 min 35 min

14.9 Identify Device (ECh)
0 V 0 Table 54 Identify Device Command (ECh)
Status Register DF DSC DRQ COR IDX ERR 0 V
The Identify Device command requests the device to transfer configuration information to the host. The device will transfer a sector to the host containing the information in Table 55 Identify device information on Page 91-101.
Description Drive classification, bit assignments: 15 (=0): 1=ATAPI device, 0=ATA device * 14 (=0): 1=format speed tolerance gap required * 13 (=0): 1=track offset option available * 12 (=0): 1=data strobe offset option available * 11 (=0): 1=rotational speed tolerance > 0.5% * 10 (=1): 1=disk transfer rate > 10 Mbps * 9 (=0): 1=disk transfer rate > 5 Mbps but <= 10 Mbps * 8 (=0): 1=disk transfer rate <= 5 Mbps 7 (=0): 1=removable cartridge device 6 (=1): 1=fixed device * 5 (=0): 1=spindle motor control option implemented * 4 (=1): 1=head switch time > 15 us * 3 (=1): 1=not MFM encoded 2 (=x): 1=Identify data incomplete * 1 (=1): 1=hard sectored 0 (=0): Reserved 01 Note.2 Number of cylinders in default translate mode 02 xxxxh Specific configuration C837h SET FEATURES subcommand is not required to spin-up and IDENTIFY DEVICE response is complete 37C8h SET FEATURES subcommand is required to spin-up and IDENTIFY DEVICE response is incomplete 03 Note.2 Number of heads in default translate mode 04-* Reserved 06 003FH Number of sectors per track in default translate mode 07-Reserved 10-19 XXXX Serial number in ASCII (0 = not specified) 20 0003H * Controller type: 0003: dual ported, multiple sector buffer with look-ahead read 21 Note.2 * Buffer size in number of sectors 22 00xxH * Obsolete 23-26 XXXX Microcode version in ASCII 27-46 Note.2 Model number in ASCII 47 8010H Maximum number of sectors that can be transferred per interrupt on Read and Write Multiple commands 15-8 : (=80h) 7-0 : Maximum number of sectors that can be transferred per interrupt. Note.1 The * mark in Content field indicates the use of those parameters that are vendor specific. 00 Note.2 See following table Table 64 Number of cylinders/heads/sectors by models for HTS5432XXL9SA00 / HTS5432XXL9A300 on Page 102

Content 045xH

Content 0x07H

Table 57 Identify device information --- Continued ---
Description SATA supported features 15-7(=0) Reserved 6(=1) 1=Software setting preservation supported 5(=0) Reserved 4(=1) 1=In-order data delivery supported 1=Device initiated interface power management 3(=1) supported 2(=1) 1=DMA Setup Auto-Activate optimization supported 1=Non-zero buffer offset in DMA Setup FIS 1(=1) supported 0(=0) Reserved 79 00xxH SATA enabled features 15-7(=0) Reserved 6(=x) 1=Software setting preservation enabled 5(=0) Reserved 4(=x) 1=In-order data delivery enabled 1=Device initiated interface power management 3(=x) enabled 2(=x) 1=DMA Setup Auto-Activate optimization enabled 1(=x) 1=Non-zero buffer offset in DMA Setup FIS enabled 0(=0) Reserved 80 01FCH Major version number ATA-2.3 and ATA/ATAPI-4, 5, 6, 7, 0042H Minor version numberATA8-ACS revision 3f -82 746BH Command set supported 15 (=0) Reserved 14 (=1) 1=NOP command supported 13 (=1) 1=READ BUFFER command supported 12 (=1) 1=WRITE BUFFER command supported 11 (=0) Reserved 10 (=1) 1=Host Protected Area Feature Set supported 9 (=0) 1=DEVICE RESET command supported 8 (=0) 1=SERVICE interrupt supported 7 (=0) 1=release interrupt supported 6 (=1) 1=look-ahead supported 5 (=1) 1=write cache supported 4 (=0) 1=supports PACKET Command Feature Set 3 (=1) 1=supports Power Management Feature Set 2 (=0) 1=supports Removable Media Feature Set 1 (=1) 1=supports Security Feature Set 0 (=1) 1=supports S.M.A.R.T Feature Set Note.1 The * mark in Content field indicates the use of those parameters that are vendor specific. 78

Content 005EH

Table 58 Identify device information --- Continued ---
Description 83 Command set supported 15 (=0) Always 14 (=1) Always 13 (=1) 1=FLUSH CACHE EXT command supported 12 (=1) 1=FLUSH CACHE command supported 11 (=1) 1=Device Configuration Overlay command supported 10 (=1) 1=48-bit Address feature set supported 9 (=0) Reserved 8 (=1) 1=SET MAX security extension supported 7 (=0) Reserved 6 (=1) 1=SET FEATURES subcommand required to spin-up 5 (=1) 1=Power-Up In Standby feature set supported 4 (=0) 1=Removable Media Status Notification Feature Set supported 3 (=1) 1=Advanced Power Management Feature Set supported 2 (=0) 1=CFA Feature Set supported 1 (=0) 1=READ/WRITE DMA QUEUED supported 0 (=1) Download Microcode Command Supported 84 6163H Command set/feature supported extension 15 (=0) Always 14 (=1) Always 13 (=1) 1=IDLE IMMEDIATE with UNLOAD FEATURE supported 12- 9 (=0) Reserved 8 (=1) 1=64-bit World wide name supported 7 (=0) 1=WRITE DMA QUEUED FUA EXT command supported 6 (=1) 1=WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT commands supported 5 (=1) 1=General Purpose Logging feature set supported 4- 2 (=0) Reserved 1 (=1) 1=SMART self-test supported 0 (=1) 1=SMART error logging supported Note.1 The * mark in Content field indicates the use of those parameters that are vendor specific.

14.17.3.1

Self-test log data structure revision number
The value of this revision number shall be 01h.

14.17.3.2

Self-test descriptor index
This indicates the most recent self-test descriptor. If there have been no self-tests, this is set to zero. Valid values for the Self-test descriptor index are 0 to 18.

14.17.3.3

Extended Self-test log descriptor entry
Bytes Offset 00h 01h 02h 04h 05h 06h 07h 08h 09h 0Ah 0Bh
The content of the self-test descriptor entry is shown below.
Description Self-test number Self-test execution status Power-on life timestamp in hours Self-test failure check point Failing LBA (7:0) Failing LBA (15:8) Failing LBA (23:16) Failing LBA (31:24) Failing LBA (39:32) Failing LBA (47:40) Vendor specific
Table 80 Extended Self-test log descriptor entry

14.17.4 Command Error

The following table defines the format of the Command Error data structure.
Byte 0 NQ Rsv Table 81 Command Error information
Reserved Status Error LBA Low LBA Mid LBA High Device LBA Low Previous LBA Mid Previous LBA High Previous Reserved Sector Count Sector Count Previous Reserved Vendor Unique Data Structure Checksum
The TAG field (Byte 0 bits 4-0) contains the tag number corresponding to a queued command, if the NQ bit is cleared. The NQ field (Byte 0 bit 7) indicates whether the error condition was a result of a non-queued or not. If it is cleared, the error information corresponds to a queued command specified by the tag number indicated in the TAG field. The bytes 1 to 13 correspond to the contents of Shadow Register Block when the error was reported.
5K320 SATA OEM Specification The Data Structure Checksum (Byte 511) contains the 2s complement of the sum of the first 511 bytes in the data structure. The sum of all 512 bytes of the data structure will be zero when the checksum is correct.
14.17.5 Phy Event Counter
Phy Event Counters are a feature to obtain more information about Phy level events that occur on the interface. The counter values are not retained across power cycles. The counter values are preserved across COMRESET and software resets.

14.17.5.1

Counter Reset Mechanisms
There are 2 mechanisms by which the host can explicitly cause the Phy counters to be reset. The first mechanism is to issue a BIST Activate FIS to the drive. The second mechanism uses the Read Log Ext command. When the drive receives a Read Log Ext command for log page 11h and bit 0 in Feature register is set to one, the drive returns the current counter values for the command and then resets all Phy event counter values.

Table 97 Erase Unit Information
Zero indicates that the device should check the supplied password against the user password stored internally. One indicates that the device should check the given password against the master password stored internally. The Security Erase Unit command erases all user data and disables the security mode feature (device lock function). So after completing this command, all user data will be initialized to zero with write operation. At this time, it is not verified with read operation whether the sector of data is initialized correctly. Also, the defective sector information and the reassigned sector information for the device are not updated. The security erase prepare command should be completed immediately prior to the Security Erase Unit command. If the device receives a Security Erase Unit command without a prior Security Erase Prepare command the device aborts the security erase unit command. Identifier
5K320 SATA OEM Specification This command disables the security mode feature (device lock function), however the master password is still stored internally within the device and may be re-activated later when a new user password is set. If you execute this command on disabling the security mode feature (device lock function), the password sent by the host is NOT compared with the password stored in the device for both the Master Password and the User Password, and then the device only erases all user data. The execution time of this command in Normal Erase mode is shown below. HTS543232L9SA00 / HTS543232L9A300 HTS543225L9SA00 / HTS543225L9A300 HTS543216L9SA00 / HTS543216L9A300 HTS543212L9SA00 / HTS543212L9A300 HTS543280L9SA00 / HTS543280L9A300 The execution time of this command in Enhanced Erase mode is shown below. HTS543232L9SA00 / HTS543232L9A300 HTS543225L9SA00 / HTS543225L9A300 HTS543216L9SA00 / HTS543216L9A300 HTS543212L9SA00 / HTS543212L9A300 HTS543280L9SA00 / HTS543280L9A300 For the Bulk Encryption model, the execution time in Enhanced Erase Mode is less than 1 minute. 128 min 102 min 68 min 52 min 38 min 126 min 100min 66 min 50 min 36 min
Security Freeze Lock (F5h)
0 V 0 Table 98 Security Freeze Lock Command (F5h)
The Security Freeze Lock Command allows the device to enter frozen mode immediately. After this command is completed, the command which updates Security Mode Feature (Device Lock Function) is rejected. Frozen mode is quit only by Power off. The following commands are rejected when the device is in frozen mode. For detail, refer to Table 35 Command table for device lock operation on Page 62-64. Security Set Password Security Unlock Security Disable Password Security Erase Unit

S.M.A.R.T. Read Log Sector (Subcommand D5h)
This command returns the specified log sector contents to the host. The 512 bytes data are returned at a command and the Sector Count value shall be set to one. The LBA Low shall be set to specify the log sector address. Log sector address Content 00h Log Directory 01h S.M.A.R.T. Error Log 02h Comprehensive S.M.A.R.T. Error Log 06h S.M.A.R.T. Self-test Log 09h Selective self-test log 80h-9Fh Host vendor specific Table 111 Log sector addresses Type Read Only Read Only Read Only Read Only Read/Write Read/Write
S.M.A.R.T. Write Log Sector (Subcommand D6h)
This command writes 512 bytes data to the specified log sector. The 512 bytes data are transferred at a command and the Sector Count value shall be set to one. The LBA Low shall be set to specify the log sector address (Table 111 Log sector addresses). If Read Only log sector is specified, the device returns ABRT error.
S.M.A.R.T. Enable Operations (Subcommand D8h)
This subcommand enables access to all S.M.A.R.T. capabilities within the device. Prior to receipt of a S.M.A.R.T. Enable Operations subcommand, Attribute Values are neither monitored nor saved by the device. The state of S.M.A.R.T. (either enabled or disabled) will be preserved by the device across power cycles. Once enabled, the receipt of subsequent S.M.A.R.T. Enable Operations subcommands will not affect any of the Attribute Values. Upon receipt of the S.M.A.R.T. Enable Operations subcommand from the host, the device enables S.M.A.R.T. capabilities and functions. 148
S.M.A.R.T. Disable Operations (Subcommand D9h)
This subcommand disables all S.M.A.R.T.capabilities within the device including the devices attribute autosave feature. After receipt of this subcommand the device disables all S.M.A.R.T. operations. Non self-preserved Attribute Values will no longer be monitored. The state of S.M.A.R.T. (either enabled or disabled) is preserved by the device across power cycles. Note that this subcommand does not preclude the devices power mode attribute autosaving. Upon receipt of the S.M.A.R.T. Disable Operations subcommand from the host, the device disables S.M.A.R.T. capabilities and functions. After receipt of the device of the S.M.A.R.T. Disable Operations subcommand from the host, all other S.M.A.R.T. subcommandswith the exception of S.M.A.R.T. Enable Operationsare disabled, and invalid and will be aborted by the device (including the S.M.A.R.T. Disable Operations subcommand), returning the error code as specified in Table 124 S.M.A.R.T. Error Codes on Page 159. Any Attribute Values accumulated and saved to volatile memory prior to receipt of the S.M.A.R.T. Disable Operations command will be preserved in the devices Attribute Data Sectors. If the device is re-enabled, these Attribute Values will be updated, as needed, upon receipt of a S.M.A.R.T. Read Attribute Values or S.M.A.R.T. Save Attribute Values command.

Copyright Hitachi Global Storage Technologies Hitachi Global Storage Technologies 3403 Yerba Buena Road San Jose, CA 95135 Produced in the United States 4/10 All rights reserved Travelstar is a trademark of Hitachi Global Storage Technologies. Microsoft, Windows XP, and Windows are trademarks of Microsoft Corporation in the United States, other countries, or both. Other product names are trademarks or registered trademarks of their respective companies. References in this publication to Hitachi Global Storage Technologies products, programs or services do not imply that Hitachi Global Storage Technologies intends to make these available in all countries in which Hitachi Global Storage Technologies operates. Product information is provided for information purposes only and does not constitute a warranty. Information is true as of the date of publication and is subject to change. Actual results may vary. This publication is for general guidance only. Photographs may show design models. 9 Apr., 2010