KD-SC900R

SERVICE MANUAL

CD RECEIVER
Area Suffix E ------------- Continental Europe EX ---------------- Central Europe

TABLE OF CONTENTS

Important Safety Precautions. 1-2 Disassembly method. 1-4 Adjustment. 1-24 Description of major ICs. 1-28
COPYRIGHT 2003 VICTOR COMPANY OF JAPAN, LTD.

No.49829 2003/04

SECTION 1 Important Safety Precautions

1.1 Safety Precautions

Burrs formed during molding may be left over on some parts of the chassis. Therefore, pay attention to such burrs in the case of preforming repair of this system.
Please use enough caution not to see the beam directly or touch it in case of an adjustment or operation check.

1-2 (No.49829)

1.2 Preventing static electricity Electrostatic discharge (ESD), which occurs when static electricity stored in the body, fabric, etc. is discharged, can destroy the laser diode in the traverse unit (optical pickup). Take care to prevent this when performing repairs. 1.2.1 Grounding to prevent damage by static electricity Static electricity in the work area can destroy the optical pickup (laser diode) in devices such as DVD players. Be careful to use proper grounding in the area where repairs are being performed. (1) Ground the workbench Ground the workbench by laying conductive material (such as a conductive sheet) or an iron plate over it before placing the traverse unit (optical pickup) on it. (2) Ground yourself Use an anti-static wrist strap to release any static electricity built up in your body.
(caption) Anti-static wrist strap
Conductive material (conductive sheet) or iron plate
(3) Handling the optical pickup In order to maintain quality during transport and before installation, both sides of the laser diode on the replacement optical pickup are shorted. After replacement, return the shorted parts to their original condition. (Refer to the text.) Do not use a tester to check the condition of the laser diode in the optical pickup. The tester's internal power source can easily destroy the laser diode. 1.3 Handling the traverse unit (optical pickup) (1) Do not subject the traverse unit (optical pickup) to strong shocks, as it is a sensitive, complex unit. (2) Cut off the shorted part of the flexible cable using nippers, etc. after replacing the optical pickup. For specific details, refer to the replacement procedure in the text. Remove the anti-static pin when replacing the traverse unit. Be careful not to take too long a time when attaching it to the connector. (3) Handle the flexible cable carefully as it may break when subjected to strong force. (4) I t is not possible to adjust the semi-fixed resistor that adjusts the laser power. Do not turn it. 1.4 Attention when traverse unit is decomposed *Please refer to "Disassembly method" in the text for the CD pickup unit. Apply solder to the short land before the flexible wire is disconnected from the connector on the CD pickup unit. (If the flexible wire is disconnected without applying solder, the CDpickup may be destroyed by static electricity.) In the assembly, be sure to remove solder from the short land after connecting the flexible wire.
Short-circuit point (Soldering) Flexible wire
Pickup Short-circuit point Pickup

(No.49829)1-3

SECTION 2 Disassembly method
2.1 Main body 2.1.1 Removing the front panel assembly (See Fig.1) (1) Push the detach button in the lower left part of the front panel assembly and remove the front panel assembly in the direction of the arrow.

Front panel assembly

Detach button
Fig.1 2.1.2 Removing the front chassis assembly (See Figs.2 to 4) Prior to performing the following procedure, remove the front panel assembly. (1) Remove the screw A on the both sides of the main body. (2) Remove the two screws B on the front side of the main body. (3) Release the two joints a and two joints b on both sides of the main body using a screwdriver, and remove the front chassis assembly forward. (4) Release the two joints c on the bottom side of the main body and remove the front chassis assembly in the direction of the arrow.(see Fig.3)

Joint a

Joint b
Joint a Front chassis assembly Fig.2
Front chassis assembly Joint c Joint c

Fig.4 1-4 (No.49829)

2.1.3 Removing the heat sink (See Fig.5) (1) Remove the two screws C and one screws D on the left side of the main body.

Heat sink

2.1.4 Removing the bottom cover (See Figs.6 and 7) Prior to performing the following procedure, remove the front panel assembly, front chassis assembly and heat sink. (1) Turn over the body and release the two joints d, two joints e and joint f. CAUTION: Do not damage the main board when releasing the joint d using a screwdriver. (See Figs.6 and 7)

Joint d Bottom cover

Joint f

Joint e

Joint e Bottom cover

Joint f Joint d

(No.49829)1-5
2.1.5 Removing the rear bracket (See Fig.8) Prior to performing the following procedure, remove the front panel assembly, front chassis assembly, heat sink and bottom cover. (1) Remove the three screws E, one screws F and two screws G on the back of the body. (2) Remove the rear bracket.

Rear bracket

Insert Subwoofer and steering cables into the slots. Fig.8
2.1.6 Removing the main board (See Fig.9) Prior to performing the following procedure, remove the front panel assembly, front chassis assembly, heat sink, bottom cover and rear bracket. (1) Remove the two screws H attaching the main board. (2) Disconnect connector CN501 and remove the main board.

Main board

2.1.7 Removing the CD mechanism assembly (See Fig.10) Prior to performing the following procedure, remove the front panel assembly, front chassis assembly, heat sink, bottom cover, rear bracket and main board. (1) Remove the three screws J.

CD mechanism assembly

Chassis rivet assembly Joint d

Clamper assembly

Chassis rivet assembly Fig.11

1-12 (No.49829)

2.2.6 Removing the loading / feed motor assembly (See Figs.12 and 13) Prior to performing the following procedure, remove the top cover, connector board and chassis unit. (1) Remove the screw C and move the loading / feed motor assembly in the direction of the arrow to remove it from the chassis rivet assembly. (2) Disconnect the wire from the loading / feed motor assembly if necessary. CAUTION: When reassembling, connect the wire from the loading / feed motor assembly to the flame as shown in Fig.12.
Loading / feed motor assembly Fig.12 Loading / feed motor assembly

(No.49829)1-13

2.2.7 Removing the pickup unit (See Figs.14 to 18) Prior to performing the following procedure, remove the top cover, connector board and chassis unit. (1) Remove the screw D and pull out the pu. shaft holder from the pu. shaft. (2) Remove the screw E attaching the feed sw. holder. (3) Move the part e of the pickup unit upward with the pu. shaft and the feed sw. holder, then release the joint f of the feed sw. holder in the direction of the arrow. The joint g of the pickup unit and the feed rack is released, and the feed sw. holder comes off. (4) Remove the pu. shaft from the pickup unit. (5) Remove the screw F attaching the feed rack to the pickup unit. 2.2.8 Reattaching the pickup unit (See Figs.14 to 17) (1) Reattach the feed rack to the pickup unit using the screw F. (2) Reattach the feed sw. holder to the feed rack while setting the joint g to the slot of the feed rack and setting the part f of the feed rack to the switch of the feed sw. holder correctly. (3) As the feed sw. holder is temporarily attached to the pickup unit, set to the gear of the joint g and to the bending part of the chassis (joint h) at a time. CAUTION: Make sure that the part i on the underside of the feed rack is certainly inserted to the slot j of the change lock lever. (4) Reattach the feed sw. holder using the screw E. (5) Reattach the pu. shaft to the pickup unit. Reattach the pu. shaft holder to the pu. shaft using the screw D.

Pickup unit

Part e

Feed rack

Fig.15

Feed sw. holder

Pu. shaft Part i Pickup unit
Slot j Joint g Joint f Joint h

Pu. shaft holder

Fig.16

Pu. shaft Joint g

Fig.17

Pickup unit Joint g

Pu. shaft holder Fig.14 Pickup unit Part e
Joint f Feed rack Feed sw. holder Fig.18

1-14 (No.49829)

2.2.9 Removing the trigger arm (See Figs.19 and 20) Prior to performing the following procedure, remove the top cover, connector board and clamper unit. (1) Turn the trigger arm in the direction of the arrow to release the joint k and pull out upward. CAUTION: When reassembling, insert the part m and n of the trigger arm into the part p and q at the slot of the chassis rivet assembly respectively and join the joint k at a time.

Joint k

Trigger arm
Chassis rivet assembly Fig.19
Part p Trigger arm Part m Part n Chassis rivet assembly Part q
Fig.20 2.2.10 Removing the top plate assembly (See Fig.21) Prior to performing the following procedure, remove the top cover, connector board, chassis unit, and clamper assembly. (1) Remove the screw H. (2) Move the top plate assembly in the direction of the arrow to release the two joints r. (3) Unsolder the wire marked s if necessary.

Top plate assembly

Joints r

Fig.21

(No.49829)1-15
2.2.11 Removing the mode sw. / select lock arm (See Figs.22 and 23) Prior to performing the following procedure, remove the top plate assembly. (1) Bring up the mode sw. to release from the link plate (joint t) and turn in the direction of the arrow to release the joint u. (2) Unsolder the wire of the mode sw. marked s if necessary. (3) Turn the select lock arm in the direction of the arrow to release the two joints v. (4) The select lock arm spring comes off the select lock arm at the same time.

Link plate

Joint t Mode sw. Select lock arm

Joint u

s Fig.22 Select lock arm Top plate
Hook w Select lock arm Top plate Select lock arm spring

Joints v Link plate

Fig.23

1-16 (No.49829)

2.2.12 Reassembling the mode sw. / select lock arm (See Figs.24 to 26) REFERENCE: Reverse the above removing procedure. (1) Reattach the select lock arm spring to the top plate and set the shorter end of the select lock arm spring to the hook w on the top plate. (2) Set the other longer end of the select lock arm spring to the boss x on the underside of the select lock arm, and join the select lock arm to the slots (joint v). Turn the select lock arm as shown in the figure. (3) Reattach the mode sw. while setting the part t to the first peak of the link plate gear, and join the joint u. CAUTION: When reattaching the mode sw., check if the points y and z are correctly fitted and if each part operates properly.

Extension cable EXTSH002-22P

1-24 (No.49829)

3.2 Flow of functional operation unit TOC read
When the pickup correctly moves v to the inner area of the disc
Microprocessor $83 commands FMO TC94A14FA "40" FEED MOTOR +TERMINAL IC501 "4" REST SW ON $82 $81 3.3V Hi-Z 0V 6V 4V 2V OFF

Power ON Set Function CD

When the laser diode correctly emits
Microprocessor commands SEL TC94A14FA"38"

$84 3.3V 0V 4V 0V

Disc inserted
Pickup feed to the inner area YES Laser emitted

LD CN501"15"

When correctly focused

Focus search

FEO TA2157 "15"
"No disc" display YES
2.2V When the disc correctly rotates
Microprocessor $84 commands
DMO TC94A14FA "41"

$86 $ A200

Focus Servo Loop ON
Disc rotates RF signal eye-pattern remains closed Tracking loop closed RF signal eye-pattern opens TOC read out

3.3V 2.2V 0V 6V 3.2 2V

Spindle motor(-) IC501 "7"
Acceleration 0.5 Sec Rough Servo 0.5 Sec

Servo CLV

Jump to the first track

Tracking Servo Loop ON

RF signal

Rough Servo Mode

CLV Servo Mode (Program Area)
CLV Servo Mode (Lead-In Area; Digital :0)

(No.49829)1-25

3.2.1 Feed section
Is the voltage output at IC541 pin "40" 5V or 0V? YES Is 4V present at both sides of the feed motor? YES Check the feed motor.

3.2.2 Focus section

Is the wiring for IC501 pin 27? NO
YES Is 3.3V present at IC501 pin "20"? YES Check the vicinity of IC541.

Check CD 8V and 5V.

Is 6V or 2V present at IC501 "4" and "5"? NO Check IC501.
YES Check the feed motor connection wiring.
When the lens is moving: 4V
Does the S-search waveform appear at IC501 pins "8" and "9"?
Check the circuits in the vicinity of IC501 pins "8","9"and"15". YES
Check the pickup and its connections

3.2.3 Spindle section

NO Is the disk rotated? YES Does the RF signal appear at RF test point? YES Is the RF waveform at RF test point distorted? YES Proceed to the Tracking section

3.2.4 Tracking section

Is 4V present at IC501 pins "6" and "7"? YES Check the spindle motor and its wiring
Is 4V present at IC541 pins "41" ? YES Check the vicinity of IC501.

Check IC541 and IC501.

NO Check the circuits in the NO vicinity of IC501 "19"~ "24" or the pickup
When the disc is rotated at first:
Approx. 1.2V Is the tracking error signal output at IC501 "11"?
Check the circuit in the vicinity of IC501 pins "2"~"12".

4.2 AN80T07 (IC901) : Regulator Block diagram

MODE1 6

*ASO, Peak Current Protection. *Thermal Protection (Except VDD, Comp output).
Outputs Reference Voltage

Pre Drive

EXT Out

ANT Out

15 ILM 10V
Pin function Pin No. 15 16

4 VDD 5.7V

10 ANT

16 GND

ILM MODE2 SW5V Out AJ
CD BATT.DET COMP AUDIO 8.0V 9.0V
Symbol SW5V Output COMP Output ACC Input VDD Output NC MODE1 CD Output EXT Output VCC ANT Output MODE2 BATT.DET Audio Output ILM AJ ILM(Illumination) Output GND
Function When Mode 1 pin is "M", "H" SW output is VDD -0.7V (Io=100mA min). When ACC input pin is "H" COMP Output is VDD -0.7V (Io=100mA min). L: COMP Output OFF and H: COMP Output ON 5.7V Output voltage for a microcontroller (Io=100mA min). NC pin 3 Input "L", "M", "H" control pin When Mode 1 pin is "H" CD output is 8V (Io=1200mA min). When Mode 1 pin is "M", "H" EXT output is Vcc-1.0V (Io=300mA min). Connected to car BACKUP Power supply. When Mode 2 pin is "H" ANT output is Vcc-1.0V (Io=300mA). L: ANT Output OFF and H: ANT Output ON NPN Transistor open collector Output (When battery is lower then 9V "L") When Mode 1 pin is "M", "H" Audio output is 9V (Io=500mA min). ILM (Illumination) Output adjustable pin. When Mode 1 pin is "M", "H" ILM output is 10V (Io=300mA min). Connected to the IC substrate.

(No.49829)1-29

4.3 BR24C16F-X (IC771) : EEPROM Pin layout

VCC WP SCL SDA

Pin function Symbol VCC GND A0,A1,A2 SCL SDA

A0 A1 A2 GND

I/O I I I/O I Power supply. GND

Function

No use connect to GND. Serial clock input. Serial data I/O of slave and ward address. Write protect terminal.
A11bit AAddress decoder 11bit Slave Ward Address resister 16kbit EEPROM allay 8bit Data resister 7 WP 8 Vcc

START AControl circuit

(No.49829)1-33

4.7 LA6579H-X (IC501) : 4-Channel bridge driver Pin layout & Block diagram
[H] VIN1-A 1 + VIN1+A 2 + VCCP33k VO+ 4 + 11k
Signal system power supply VIN1_SW [H]: OP-AMP_A [L]: OP-AMP_B

28 [L] 27

VIN1-B

VIN1+B

Level shift

All outputs ON/OFF

VIN1-SW

H : ON L : OFF

VREFIN
33k 11k VCCP33k VIN+ 11k + 17 VIN2

1-34 (No.49829)

+ Level shift Level shift

Power system GND

Signal system power supply
3.3VREG (External:PTP Tr)

3.3VREG

16 11k 15
Pin function Pin No. Symbol VIN1-A VIN1+A VCCP1 VO1+ VO1VO2+ VO2VO3+ VO3VO4+ VO4VCCP2 VIN4 VIN4G VIN3 VIN3G VIN2 VIN2G REGIN 3.3VREG VCCS VREFIN MUTE VIN1_SW S_GND VIN1+B VIN1-B VIN1 CH1 input AMP_inverted input CH1 input AMP_non-inverted input CH1 and CH2 power stage power supply Output pin(+)for channel 1 CH1 output pin (-) for channel 1 Output pin(+)for channel 2 Output pin(-)for channel 2 Output pin(+)for channel 3 Output pin(-)for channel 3 Output pin(+)for channel 4 Output pin(-)for channel 4 CH3 and CH4 power stage powr supply Input pin for channel 4 Input pin for channel 4(for gain adjustment) Input pin for channel 3 Input pin for channel 3(for gain adjustment) Input pin for channel 2 Input pin for channel 2(for gain adjustment) External PNP transistor base connection 3.3VREG output pin external PNP transistor,collector connection Signal system GND Reference voltage application pin Output ON/OFF pin CH1 input OP AMP_changeover pin Signal system GND CH1 AMP_B non-inverted input pin CH1 AMP_B inverted input pin CH1 input pin input OP_AMP output pin Function

(No.49829)1-35

4.8 NJM4565M-WE (IC581) : CD L.P.F.

A OUTPUT 1

A - INPUT 2

7 B OUTPUT

A+INPUT 3

B - INPUT

B+INPUT
4.9 NJU7241F25-X (IC461) : Regulator Pin layout

GND 1 VIN 2 VOUT 3

Short protect VIN VOUT

Vref GND GND

1-36 (No.49829)
4.10 NJU7241F33-X (IC471) : Voltage regulator
PIN FUNCTION 1. GND 2. VIN 3. VOUT 4. +NC 5. STB
4.11 RPM6938-SV4 (IC602) : Remote control receiver Pin diagram

Vcc AGC AMP

I/V conversion

Vcc 22k

20 AMCP

23 AGND
12-bit Programmable counter

(No.49829)1-39

4.14 TA2157FN-X (IC521) : RF amp Terminal layout

PEAK 50k 15k

14 20k 15 10pF 15k 20k 40k 20k 10pF 40k

16 20k

50 A 12k 12k 1.3V 2k 50k
17 20k 18 40k BOTTOM PEAK

1k 14k 2k

19 240k 15pF 20 20k 21 30k 180k 40pF 240k 15pF

x0.5 K x2

x0.x2 94k 60k 22k 94k 22k

22 180k 23 3k 3k 24 40pF

PIN VCTRLPIN VCC HiZ GND
SEL (APC SW) APC ON APC ON APC OFF (LDO=H)

TEB (TE BAL) -50% 0% 50%

RFGC (AGC Gian) +12dB +6dB 0dB
TEB (TE BAL) Normal mode (0dB) Normal mode (0dB) CD-RW mode (+12dB)

1-40 (No.49829)

Pin function Pin No. Symbol VCC FNI FPI TPI TNI MDI LDO SEL I/O I I I I I O I 3.3V power supply pin Main-beam amp input pin Main-beam amp input pin Sub-beam amp input pin Sub-beam amp input pin Monitor photo diode amp input pin Laser diode amp output pin APC circuit ON/OFF control signal, laser diode (LDO) control signal input or bottom/peak detection frequency change pin. Function

SEL GND Hiz VCC

9 TEB I

APC circuit OFF ON ON

LDO Connected VCC through 1k resistor Control signal output Control signal output
Tracking error balance adjustment signal input pin Adjusts TE signal balance by eliminating carrier component from PWM signal (3-state output, PWM carrier = 88.2kHz) output from TC94A14F/FA TEBC pin using RC-LPF and inputting DC. TEBC input voltage:GND~VCC Tracking error signal generation amp negative-phase input pin Tracking error signal generation amp output pin. Combining TEO signal RFRP signal with TC94A14F/FA configures tracking search system. RF signal peak detection output pin AGC/FE/TE amp gain change pin

TEN TEO RFDC GVSW

I O O I

GVSW GND Hiz VCC

20 VRO FEO FEN RFRP REIS RFGO RFGC O O I O I O I Reference voltage (VRO) output pin *VRO=1/2VCC When VCC=3.3V Focus error signal generation amp output pin

Mode CD-RW Normal

Focus error signal generation amp negative-phase input pin Signal amp output pin for track count Combining RFRP signal and TEO signal with TC94A14F/FA configures tracking search system. RF signal amplitude adjustment amp output pin RF amplitude adjustment control signal input pin Adjusts RF signal amplitude by eliminating carrier component from PWM signal (3-state output, PWM carrier=88.2kHz)output fromTC94A14F/14FA *RFGC pin using RC-LPF and inputting DC. *RFGC input voltage:GND~VCC RF signal amplitude adjustment amp input pin RF signal generation amp output pin RF signal generation amp input pin GND pin

AGCIN RFO RFI GND

I O I -

(No.49829)1-41

4.15 TC94A14FA (IC541) : DSP & DAC Terminal layout & block daiagram

Clock generator LPF

64 Microcontroller interface

1-bit DAC

Servo control
Address circuit Correction circuit
Digital equalizer automatic RAM adjustment circuit

16 k RAM

CLV servo

Data slicer

Synchronous guarantee EFM decoder Audio out circuit Digital output Sub code decoder

PLL TMAX

Pin function Pin Symbol I/O Descroption No 1 BCK O Bit clock output pin.32fs48fsor 64fs selectable by command. 2 LRCK O L/R channel clock output pin."L" for L channel and "H" for R channel. Output polarity can be inverted by command. 3 AOUT O Audio data output pin. MSB-first or LSB-first selectable by command. 4 DOUT O Digital data output pin.Outputs up to double-speed playback. 5 IPF O Correction flag output pin. When set to "H" AOUT output cannot be corrected by C2 correction processing. - Digital 3.3V power supply voltage pin. 6 VDD3 - Digital GND pin. 7 VSSSBOK O Subcode Q data CRCC result output pin. "H" level when result is OK. 9 CLCK O Subcode P-W data read I/O pin. I/O polarity selectable by command. 10 DATA O Subcode P-W data output pin. 11 SFSY O Playback frame sync signal output pin. 12 SBSY O Subcode block sync signal output pin. "H" level at S1 when subcode sync is detected. 13 HSO I/O General-purpose input / output pins.Input port at reset. 14 UHSO - PLL-only 3.3V power supply voltage pin. 15 PVDDPDO O EFM and PLCK phase difference signal output pin. 1-42 (No.49829)
Pin Symbol I/O No 17 TMAX O TMAX detection result output pin.

Descroption

TMAX Detection Result Longer than fixed period Within fixed period Shorter than fixed period
38 LPFN LPFO PVREF VCOF AVSS3 SLCO RFI AVDD3 RFCT RFZI RFRP FEI SBAD TEI TEZI FOO TRO VREF RFGC TEBC SEL I O O O I I I I I I I I O O O O O
TMAX Output "PVDD3" "HiZ" "AVSS3"
39 AVDDFMO O 41 DMO O 42 VSSVDDTESIN I 45 XVSSXI I 47 XO O 48 XVDDDVSS3R 50 RO O 51 DVDDDVR 53 LO O 54 DVSS3L 55 ZDET O 56 VSSBUSBUSBUS2 I/O Microcontroller interface data I/O pins. 60 BUSBUCK I Microcontroller interface clock input pin. 62 /CCE I Microcontroller interface chip enable signal input pin.At "L", BUS0 to BUS3 are active. 63 /RST I Reset signal input pin. At reset, "L". - Microcontroller interface 5V power supply pin. 64 VDD5
Inverted input pin for PLL LPF amp. Output pin for PLL LPF amp. PLL-only VREF pin. VCO filter pin. Analog GND pin. DAC output pin for data slice level generation. RF signal input pin. Zin selectable by command. Analog 3.3V power supply voltage pin. RFRP signal center level input pin. RFRP signal zero-cross input pin. RF ripple signal input pin. Focus error signal input pin. Sub-beam adder signal input pin. Tracking error input pin. Inputs when tracking servo is on. Tracking error signal zero-cross input pin. Focus equalizer output pin. Tracking equalizer output pin. Analog reference power supply voltage pin. RF amplitude adjustment control signal output pin. Tracking balance control signal output pin. APC circuit ON/OFF signal output pin. At laser on, high impedance with UHS="L", H output with UHS="H". Analog 3.3V power supply voltage pin. Feed equalizer output pin. Disc equalizer output pin. Digital GND pin. Digital 3.3V power supply voltage pin. Test input pin. Normally, fixed to "L". System clock oscillator GND pin. System clock oscillator input pin. System clock oscillator output pin. System clock oscillator 3.3V power supply voltage pin. DA converter GND pin. R-channel data forward output pin. DA converter 3.3V power supply pin. Reference voltage pin. L-channel data forward output pin. DA converter GND pin. 1 bit DA converter zero detection flag output pin. Microcontroller interface GND pin.

(No.49829)1-43

1-44 (No.49829) Block diagram
4.16 TC94A20F-011 (IC401) : CD-ROM decoder + MP3 decoder with DAC and SRAM
Interrupt control Timer Flag General output port

DRAM I/F

General inputbport
51 X-RAM 4k word X-Pointer register Bus Switch Y-Pointer register C-Pointer register Y-RAM 4k word CROM 4k word *7 ERAM 2k word Address calc. 2sets DAC 25 PRAM 256word register X0 X1 X2 Y0 Y1 YDAC Program control MAC A0 A1 A2 AALU 22 MX MY MZ AX AY round & limit round & limit Audio I/F 6 9

SRAM I/F

1Mbit SRAM

SubCode I/F

PROM 4k*3 =12k word

Timing generator

Instruction decoder

Microcom. I/F

Pin functions Pin No 23 24,31~36~42 43,46,49,62,Symbol /RESET MiMD /MiCS /MiLP MiDio /MiCK MiACK VDDT SDo BCKo LRCKo SDiO BCKiA LRCKiA SDiL BCKiB LRCKiB VDD STANBY VSS VSSL VRAL LO VDAL,VDAR RO VRAR VSSR TESTP TXO Po0~Po3 VDDT Po4~Po6 REQ VSS IRO VDDM Fi0,Fi1 VSSM Pi0,Pi1 VSS Pi2,Pi3 Pi4/CLCL VDD Pi5/DATA TSTiN/SFSY Fi2/SBSY VSSP Pdo Vcoi VDDP CKo/CKi VDDX Xi,Xo VSSX I/O I I I I I/O I O O O O I I I I I I I O O I O O O O I/O I I I I I I I O I I/O I,O Functions Hard reset input H:normal L:reset Micon I/F mode select input Micon I/F chip select input Micon I/F latch palus input Micon I/F data input/output Micon I/F clock input Micon I/F acknowledge output Power supply for digital (3.3V) Data output Bit output LR clock output Data input 0 Bit clock input A LR clock input A Data input terminal 1 Bit clock input terminal B LR clock input terminal B Power supply for digital (2.5V) Standby mode control input H:STBY L:normal GND for digital GND for DAC Lch Reference voltage for DAC Lch DAC Lch output Power supply for DAC Lch/Power supply for DAC Rch (2.5V) DAC Rch output Reference voltage for DAC Rch GND for DAC R ch Test terminal H:test mode L:normal SPDIF output General purpose output 0 ~ 3 Power supply for digital (3.3V) General purpose output 4 ~ 6 REC terminal GND for digital External interrupt input Internal 1Mbit SRAM power supply (2.5V) Flug input 0,1 GND for internal 1Mbit SRAM General ourpose input 01 GND for digital General purpose input 23 General purpose input 4/SUBQ I/F clock inputoutput Power supply for digital (2.5V) General purpose input 5/SUBQ I/F data input Test terminal/SUBQ I/F flame sync input Flug input 2/SUBQ I/F block sync input GND for VCO PLL phase error detection signal output VCO control voltage input Power supply for VCO (2.5V) External clock input/Clock output terminal Power supply for X'tal oscillator (2.5V) Oscillator connection terminal for input/output GND for oscillator

(No.49829)1-45

4.17 UPD784217AGC195 (IC701) : CPU Pin Layout
Block Diagram Pin No. 33 34,45 Symbol CDRESET CDMUTE SW2 PSW LM0 LM1 NC ANTCRTL VDD X2 X1 VSS XT2 XT1 RESET SW1 BUSINT PS2 STEERING RDSSCK RDSDA REMOCON AVDD AVREF0 VOL1 VOL2 KEY0 KEY1 KEY2 LEVEL SQ SM AVSS NC AVREF BUSSI BUSSO BUSSCK BUSI/O LCDDA LCDCK LCDCE NC EPROMDI I/O O O O O O I I I I I I I I I I I I I I I I O I/O O O O O O I Function Not use Not use CD mecha SW2 CD mecha position setting SW Loading motor control output 0 Loading motor control output 1 Not use Antenna remote control Power supply

Ground

System reset CD mecha SW1 Not use Power save2, H means STOP mode Not use RDS clock input RDS data input Remocon data input A/D converter power supply A/D reference voltage Volume encoder pulse input 1 Volume encoder pulse input 2 Key input 0 Key input 1 Key input 2 Level meter input Signal lquality input Signal level meter input Ground Not use Analog reference voltage Not use Not use Not use Not use LCD DATA output LCD CK LCD CE Not use I2C data input

1-46 (No.49829)

Pin No. Symbol I/O Function 46 EPROMDO O I2C data output 47 EPROMCK O I2C clock output 48 OPEN I DOOR OPEN SW 49 CSN O External DAC IC chip select output 50 CCLK O External DAC IC control data output 51 CDTI O External DAC IC control data output 52 PDN O Power down mode output 53 SD/ST I Station detector or stereo indicator input ; H means a station is there. L means the program is stereo. 54 MP3CLK O MP3 IC clock output 55 MONO O Mono by power force 56 MP3DIN I MP3 IC data input 57 MP3DOUT O MP3 IC data output 58 MP3STBY O MP3 IC standby output 59 MP3RESET O MP3 IC reset output 60 MP3REQ I MP3 IC REQ input 61 DETACH I Detach signal input 62 AFCK I AF check input 63 SEEK/STOP O Switching SEEK/STOP 64 IFC CONT O IF control 65 FM/AM O FM,AM band selecting output; H=FM,L=AM 66 PLLCE O CE output for PLL IC 67 PLLDA O Data output for PLL IC 68 PLLCK O Clock output for PLL IC 69 PLLDI I Data input from PLL IC 70 TELMUTE I Telephone muting detection input ; Active level can be selected H or L in PSM 71 NC - Not use 72 VSS - Ground 73 DIMIN I Dimmer detector input, L=dimmer on 74 PS1 I Power save 1, L=ACC off 75 POWER O Power on/off control output, H=power on 76 CDON - CD power control 77 MUTE O Muting output, L=muting on 78 DIMOUT O Dimmer detector output 79,80 NC - Not use 81 VDD - Power supply 82 NC - Not use 83 VOLDA O Data output for e-volume IC 84 VOLCL O Clock output for e-volume IC 85 to 89 NC - Not use 90 STAGE - Not use 91 BUCK O DSP IC interface clock output 92 CCE O DSP IC interface chip enable signal output 93 RST O DSP IC reset output (L: reset) 94 TEST - Test terminal 95 BUS0 I/O DSP IC interface data input/output BUS1 I/O DSP IC interface data input/output BUS2 I/O DSP IC interface data input/output BUS3 I/O DSP IC interface data input/output NC - Not use 100 CDRW O RF gain control L=CD-RW, H=CD-DA

(No.49829)1-47

4.18 TEA6320T-X (IC161) : E.volume Pin layout
SDA GND OUTLR OUTLF TL B2L B1L IVL ILL QSL IDL MUTE ICL IMD IBL IAL 13 CD-CH TAPE 16 TUNER SCL VCC OUTRR OUTRF TR B2R B1R IVR ILR QSR IDR Vref ICR CAP IBR IAR

POWER SUPPLY

MUTE FUNCTION ZERO CROSS DETECTOR VOLUME 1 +20 to -31 dB LOUDNESS LEFT BASS LEFT +15 dB TREBLE LEFT +12 dB
VOLUME to 55 dB BALANCE FENDER REAR
VOLUME to 55 dB BALANCE FENDER FRONT
SOURCE SELECTOR VOLUME 1 +20 to -31 dB LOUDNESS RIGHT BASS RIGHT +15 dB TREBLE RIGHT +12 dB

HC BUS REC

VOLUME to -55dB BALANCE FENDER FRONT
VOLUME to -55dB BALANCE FENDER REAR
Pin functions Pin No. Symbol SDA GND OUTLR OUTLF TL B2L B1L IVL ILL QSL IDL MUTE ICL IMO IBL IAL I/O I/O O O I I I O I I I Functions Serial data input/output. Ground. output left rear. output left front. Treble control capacitor left channel or input from an external equalizer. Bass control capacitor left channel or output to an external equalizer. Bass control capacitor left channel. Input volume 1. left control part. Input loudness. left control part. Output source selector. left channel. Not used Not used Input C left source. Not used Input B left source. Input A left source. Pin No. Symbol IAR IBR CAP ICR Vref IDR QSR ILR IVR B1R B2R TR OUTRF OUTRR Vcc SCL I/O I I I O I I O I O O I Functions Input A right source. Input B right source. Electronic filtering for supply. Input C right source. Reference voltage (0.5Vcc) Not used Output source selector right channel. Input loudness right channel. Input volume 1. right control part. Bass control capacitor right channel Bass control capacitor right channel or output to an external equalizer. Treble control capacitor right channel or input from an external equalizer. Output right front. Output right rear. Supply voltage. Serial clock input.

1-48 (No.49829)

(No.49829)1-49
VICTOR COMPANY OF JAPAN, LIMITED AV & MULTIMEDIA COMPANY MOBILE ENTERTAINMENT CATEGORY 10-1,1chome,Ohwatari-machi,Maebashi-city,371-8543,Japan

(No.49829)

Printed in Japan 200304WPC