SYSMAC CJ-series CJ1M CPU Units (with Built-in I/O)

CJ1M-CPU2@

CSM_CJ1M-CPU2_DS_E_1_1
Compact, Applications-oriented Controllers with Built-in Pulse I/O for High Potential
The compact, high-potential SYSMAC CJ1M PLCs provide built-in pulse I/O for high-precision performance Pulse I/O for two axes to achieve higher machine precision.

CJ1M-CPU21

Features
Two 100-kHz Pulse Outputs Use special instructions to easily implement various types of positioning, such as positioning with trapezoidal acceleration/deceleration, positioning with different acceleration/deceleration rates, and triangular control. Combine positioning instructions to handle many different applications, such as interrupt feeding and target position changes during positioning. Pulse startup is as fast as 46 s and is 70 s even for trapezoidal acceleration/deceleration. Two Pulse Inputs Two high-speed counters and four interrupt inputs are also built in. The high-speed counters operate at up to 100 kHz for single-phase and 50 kHz for differential-phase operation. These inputs enable controlling with high-speed response. Use the Rich Lineup of CJ1 Units Handle a wide range of applications with the rich lineup of CJ1 Units, including Ethernet and other Communications Units and Analog I/O Units. Easier maintenance is also possible using Memory Cards.

Ordering Information

International Standards The standards are abbreviated as follows: U: UL, U1: UL(Class I Division 2 Products for Hazardous Locations), C: CSA, UC: cULus, UC1: cULus (Class I Division 2 Products for Hazardous Locations), CU: cUL, N: NK, L: Lloyd, and CE: EC Directives. Contact your OMRON representative for further details and applicable conditions for these standards.
CJ1M CPU Units (with Built-in I/O)
Specifications Product name I/O capacity/ Mountable Units (Expansion Racks) Program capacity 20K steps 32K words 10K steps (DM: 32K words, EM: None) 5K steps Data memory capacity LD instruction execution time Current consumption (A) Built-in I/O 5V 0.64 (See note 1.) 0.1 s 10 inputs and 6 outputs, 0.64 (See 2 counter note 1.) inputs, 2 pulse outputs 0.64 (See note 1.) 24 V CJ1M-CPU23 (See note 3.) CJ1M-CPU22 (See note 3.) CJ1M-CPU21 (See notes 2 and 3.) UC1, N, L, CE Model Standards
640 points/20 Units (1 Expansion Racks Built-in I/O max.) (See note 2.) 320points/10 Units CJ1M (No Expansion CPU Rack) Units 160 points/10 Units (No Expansion Rack)
Note: 1. Current consumptions include current for a Programming Console. Add 0.15 A per Adapter when using NT-AL001 RS-232C/RS-232A Adapters. Add 0.04 A per Adapter when using CJ1W-CIF11 RS-422A Adapters. 2. Some of the specifications for the low-end CJ1M CPU Units (CJ1M-CPU11(-ETN)/21) are different from the specifications for the other CJ1M CPU Units (CJ1M-CPU12(-ETN)/13(-ETN)/22/23), including the specifications for overhead time, pulse start time, the number of subroutines and jumps, the number of scheduled interrupt tasks, and the number of PWM outputs. For details, refer to the SYSMAC CJ Series Programmable Controllers Operation Manual (Cat. No. 393) and the SYSMAC CJ Series Built-in I/O Operation Manual (Cat. No. 395). 3. The connector for built-in I/O in the CJ1M-CPU21/22/23 is not included. Purchase one of the connectors or connector cables in the following table separately.

XW2Z-100J-A27

XW2Z-100J-B4

Cable length: 2 m

XW2Z-200J-B4

Accessories

The following accessories come with CPU Unit:
Item Battery End Cover End Plate Serial Port (RS-232C) Connector CJ1W-BAT01 CJ1W-TER01 (necessary to be mouned at the right end of CPU Rack) PFP-M (2 pcs) Connector set for serial port connection (D-SUB 9-pin male connector) Specification

Specifications

Common Specifications
Item Control method I/O control method Programming CPU processing mode Instruction length Ladder instructions Execution time Overhead time Unit connection method Mounting method Maximum number of connectable Units Maximum number of Expansion Racks Stored program Cyclic scan and immediate processing are both possible. LD (Ladder), SFC (Sequential Function Chart), ST (Structured Text), Mnemonic Normal Mode or Peripheral Servicing Priority Mode 1 to 7 steps per instruction Approx. 400 (3-digit function codes) Basic instructions: 0.10 s min. Special instructions: 0.15 s min. CJ1M CPU Units (CPU22/23): 0.5 ms min. CJ1M CPU Units (CPU21): 0.7 ms min. No Backplane: Units connected directly to each other. DIN Track (screw mounting not possible) Total of 20 Units in the System, including 10 Units on CPU Rack and 10 Units on one Expansion Rack. CJ1M CPU Units (CPU 13/23 only): 1 max. (An I/O Control Unit is required on the CPU Rack and an I/O Interface Unit is required on the Expansion Rack.) CJ1M CPU Units (CPU11/12/21/22): Expansion is not possible. 288 (cyclic tasks: 32, interrupt tasks: 256) Interrupt tasks can be defined as cyclic tasks called "extra cyclic tasks." Including these, up to 288 cyclic tasks can be used. Note: 1. Cyclic tasks are executed each cycle and are controlled with TKON(820) and TKOF(821) instructions. 2. The following 4 types of interrupt tasks are supported. Power OFF interrupt tasks: 1 max. Scheduled interrupt tasks: 2 max. I/O interrupt tasks: 32 max. External interrupt tasks: 256 max. Scheduled Interrupts: Interrupts generated at a time scheduled by the CPU Unit's built-in timer. (See note. 1) I/O Interrupts: Interrupts from Interrupt Input Units. Power OFF Interrupts (See note 2.): Interrupts executed when the CPU Unit's power is turned OFF. External I/O Interrupts: Interrupts from the Special I/O Units or CPU Bus Units. Note: 1. Scheduled interrupt time interval is 0.5 ms to 999.9 ms (in increments of 0.1 ms), 1 ms to 9,999 ms (in increments of 1 ms), or 10 ms to 99,990 ms (in increments of 10 ms) 2. Not supported when the CJ1W-PD022 Power Supply Unit is mounted. Supported (called "global subroutines"). Languages in function block definitions: ladder programming, structured text 1,280: CIO 000000 to CIO 007915 (80 words from CIO 0000 to CIO 0079) The setting of the first word can be changed from the default (CIO 0000) so that CIO 0000 to CIO 0999 can be used. I/O bits are allocated to Basic I/O Units. 3,200 (200 words): CIO 10000 to CIO 119915 (words CIO 1000 to CIO 1199) Link bits are used for data links and are allocated to Units in Controller Link Systems. 6,400 (400 words): CIO 150000 to CIO 189915 (words CIO 1500 to CIO 1899) CPU Bus Unit bits store the operating status of CPU Bus Units. (25 words per Unit, 16 Units max.) 15,360 (960 words): CIO 200000 to CIO 295915 (words CIO 2000 to CIO 2959) Special I/O Unit bits are allocated to Special I/O Units. (10 words per Unit, 96 Units max.) Note: Special I/O Units are I/O Units that belong to a special group called "Special I/O Units." Example:CJ1W-AD081 Analog Input Unit 1,440 (90 words): CIO 310000 to CIO 318915 (words CIO 3100 to CIO 3189) 9,600 (600 words): CIO 320000 to CIO 379915 (words CIO 3200 to CIO 3799) DeviceNet bits are allocated to Slaves for DeviceNet Unit remote I/O communications when the Master function is used with fixed allocations. CIO (Core I/O) Area Fixed allocation setting 1 Fixed allocation setting 2 DeviceNet Area Fixed allocation setting 3 Outputs: CIO 3200 to CIO 3263 Inputs: CIO 3300 to CIO 3363 Outputs: CIO 3400 to CIO 3463 Inputs: CIO 3500 to CIO 3563 Outputs: CIO 3600 to CIO 3663 Inputs: CIO 3700 to CIO 3763 The CIO Area can be used as work bits if the bits are not used as shown here. Specifications

Number of tasks

Interrupt types
Calling subroutines from more than one task Function blocks (CPU Unit with unit version 3.0 or later only) I/O Area
Link Area CPU Bus Unit Area
Special I/O Unit Area Serial PLC Link Area
The following words are allocated to the Master function even when the DeviceNet Unit is used as a Slave. Fixed allocation setting 1 Fixed allocation setting 2 Fixed allocation setting 3 Outputs: CIO 3370 (Slave to Master) Inputs: CIO 3270 (Master to Slave) Outputs: CIO 3570 (Slave to Master) Inputs: CIO 3470 (Master to Slave) Outputs: CIO 3770 (Slave to Master) Inputs: CIO 3670 (Master to Slave)

Internal I/O Area

4,800 (300 words): CIO 120000 to CIO 149915 (words CIO 1200 to CIO 1499) 37,504 (2,344 words): CIO 380000 to CIO 614315 (words CIO 3800 to CIO 6143) These bits in the CIO Area are used as work bits in programming to control program execution. They cannot be used for external I/O.

Item Work Area

Specifications 8,192 bits (512 words): W00000 to W51115 (W000 to W511) Controls the programs only. (I/O from external I/O terminals is not possible.) Note: When using work bits in programming, use the bits in the Work Area first before using bits from other areas. 8,192 bits (512 words): H00000 to H51115 (H000 to H511) Holding bits are used to control the execution of the program, and maintain their ON/OFF status when the PLC is turned OFF or theoperating mode is changed. Note: The Function Block Holding Area words are allocated from H512 to H1535. These words can be used only for the function block instance area (internally allocated variable area). Read only: 7,168 bits (448 words): A00000 to A44715 (words A000 to A447) Read/write: 8,192 bits (512 words): A44800 to A95915 (words A448 to A959) Auxiliary bits are allocated specific functions. 16 bits (TR0 to TR15) Temporary bits are used to temporarily store the ON/OFF execution conditions at program branches. 4,096: T0000 to T4095 (used for timers only) 4,096: C0000 to C4095 (used for counters only) 32 Kwords: D00000 to D32767 Used as a general-purpose data area for reading and writing data in word units (16 bits). Words in the DM Area maintain their status when the PLC is turned OFF or the operating mode is changed. Internal Special I/O Unit DM Area: D20000 to D29599 (100 words 96 Units) Used to set parameters for Special I/O Units. CPU Bus Unit DM Area: D30000 to D31599 (100 words 16 Units) Used to set parameters for CPU Bus Units. None IR0 to IR15 Store PLC memory addresses for indirect addressing. Index registers can be used independently in each task. One register is 32 bits (2words). Setting to use index registers either independently in each task or to share them between tasks. 32 (TK0000 to TK0031) Task Flags are read-only flags that are ON when the corresponding cyclic task is executable and OFF when the corresponding task is not executable or in standby status. 4,000 words (trace data: 31 bits, 6 words) Memory Cards: Compact flash memory cards can be used (MS-DOS format). OMRON Memory Cards can be used.

Holding Area

Auxiliary Area Temporary Area Timer Area Counter Area

DM Area

EM Area Index Registers
Task Flag Area Trace Memory File Memory

Function Specifications

Item Constant cycle time Cycle time monitoring I/O refreshing 1 to 32,000 ms (Unit: 1 ms) Possible (Unit stops operating if the cycle is too long): 10 to 40,000 ms (Unit: 10 ms) Cyclic refreshing, immediate refreshing, refreshing by IORF(097). IORF(097) refreshes I/O bits allocated to Basic I/O Units and Special I/O Units. The CPU BUS UNIT I/O REFRESH (DLNK(226)) instruction can be used to refresh bits allocated to CPU Bus Units in the CIO and DM Areas whenever required. Data links for Controller Link Units and SYSMAC LINK Units, remote I/O for DeviceNet Units, and other special refreshing for CPU Bus Units is performed at the following times: I/O refresh period and when the CPU BUS UNIT I/O REFRESH (DLNK(226)) instruction is executed. Depends on the ON/OFF status of the IOM Hold Bit in the Auxiliary Area. All outputs on Output Units can be turned OFF when the CPU Unit is operating in RUN, MONITOR, or PROGRAM mode. BCD or binary (CX-Programmer Ver. 3.0 or higher). Time constants can be set for inputs from Basic I/O Units. The time constant can be increased to reduce the influence of noise and chattering or it can be decreased to detect shorter pulses on the inputs. Possible (By default, the CPU Unit will start in RUN mode if a Programming Console is not connected.) The user program and parameter area data (e.g., PLC Setup) are always backed up automatically in flash memory. (automatic backup and restore.) CPU Units with unit version 3.0 or later only: When downloading projects from CX-Programmer Ver. 5.0 or higher, symbol table files (including CX-Programmer symbol names, I/O comments), comment files (CX-Programmer rung comments, other comments), and program index files (CX-Programmer section names, section comments, or program comments) are stored in comment memory within the flash memory. Automatically reading programs (autoboot) from the Memory Card when the power is turned ON. Program replacement during PLC operation Memory Card functions Format in which data is stored in Memory Card Possible Possible User program: Program file format PLC Setup and other parameters: Data file format I/O memory: Data file format (binary format), text format, or CSV format User program instructions, Programming Devices (including CX-Programmer and Programming Consoles), Host Link computers, AR Area control bits, easy backup operation Specifications
Timing of special refreshing for CPU Bus Units I/O memory holding when changing operating modes Load OFF Timer/Counter PV refresh method Input response time setting Mode setting at power-up

Flash memory

Functions for which Memory Card read/write is supported Filing Debugging

Origin search 1 (Origin Proximity Input Signal)
Note: CJ1M-CPU21 CPU Units have one PWM output only and do not have PWM output 1.
Built-in Input Specifications
Interrupt Inputs and Quick-response Inputs
Item No. of interrupt inputs/ quick-response inputs Direct (Input Interrupt) Mode High-speed Counter Mode 4 total Execution of an interrupt task is started at the interrupt input's rising or falling edge. Interrupt numbers 140 to 143 are used (fixed). Response time from meeting input condition to start of interrupt task execution: 93 s min. Rising or falling edges of the interrupt are counted using either an incrementing or decrementing counter, and an interrupt task is started when the input count reaches the set value. Interrupt numbers 140 to 143 are used (fixed). I/O response frequency: 1 kHz Signals that are shorted than the cycle time (30 s min.) can be read and treated the same as signals that are one for more than one cycle time. Specifications

Input interrupts

Quick-response inputs
High-speed Counter Inputs
Item Number of high-speed counters Pulse input mode (Selected in PLC Setup) Line-driver Response inputs frequency 24-V DC inputs Counting mode 2 (High-speed counters 0 and 1) Differential phase inputs Up/down inputs (up inputs, (phase-A, phase-B, and phasedown inputs, reset inputs) Z input) 50 kHz 30 kHz 100 kHz 60 kHz Pulse + direction inputs (pulse inputs, direction inputs, reset inputs) 100 kHz 60 kHz Increment inputs (increment inputs, reset inputs) 100 kHz 60 kHz Specifications
Linear mode or Ring mode (Select in the PLC Setup.)

Item Count value

Specifications Linear mode: 80000000 to 7FFFFFFF hex Ring mode: 00000000 to Ring SV (The Ring SV is set in the PLC Setup and the setting range is 00000001 to FFFFFFFF hex.) High-speed counter 0: A271 (leftmost 4 digits) and A270 (rightmost 4 digits) High-speed counter 1: A273 (leftmost 4 digits) and A272 (rightmost 4 digits) Target value comparison interrupts or range comparison interrupts can be executed based on these PVs. Note: The PVs are refreshed in the overseeing processes at the beginning of each cycle. Use the PRV(881) instruction to read the most recent PVs. Up to 48 target values and corresponding interrupt task numbers can be registered. Up to 8 ranges can be registered, with an upper limit, lower limit, and interrupt task number for each. Phase-Z + Software reset: Counter is reset when phase-Z input goes ON while Reset Bit is ON. Software reset: Counter is reset when Reset Bit goes ON. Reset Bits: High-speed Counter 0 Reset Bit is A53100, Counter 1 Reset Bit is A53101.
High-speed counter PV storage locations Target value comparison Range comparison

Control method

Counter reset method
Built-in Output Specifications
Position Control and Speed Control
Item Number of pulse outputs Output frequency Frequency acceleration and deceleration rates Changing SVs during instruction execution Pulse output method Number of output pulses Instruction used for origin searches and returns 2 (Pulse output 0 or 1) 1 Hz to 100 kHz (1-Hz units from 1 to 100 Hz, 10-Hz units from 100 Hz to 4 kHz, and 100-Hz units from 4 to 100 kHz) Set in 1 Hz units for acceleration/deceleration rates from 1 Hz to 2 kHz (every 4 ms). The acceleration and deceleration rates can be set separately only with PLS2(887). The target frequency, acceleration/deceleration rate, and target position can be changed. Changes to the target frequency and acceleration/deceleration rate must be made at constant speed. CW/CCW inputs or Pulse + direction inputs Relative coordinates: 00000000 to 7FFFFFFF hex (Each direction accelerating or decelerating: 2,147,483,647) Absolute coordinates: 80000000 to 7FFFFFFF hex (2,147,483,648 to 2,147,483,647) ORIGIN SEARCH (ORG(889)): Origin search and origin return operations according to set parameters PULSE OUTPUT (PLS2(887)): Trapezoidal output control with separate acceleration and deceleration rate SET PULSES (PULS(886)): Setting the number of pulses for pulse output SPEED OUTPUT (SPED(885)): Pulse output without acceleration or deceleration (Number of pulses must be set in advance with PULS(886) for position control.) ACCELERATION CONTROL (ACC(888)): Changes frequency or pulse output with acceleration and deceleration MODE CONTROL (INI(880)): Stopping pulse output The following Auxiliary Area words contain the pulse output PVs: Pulse output 0: A277 (leftmost 4 digits) and A276 (rightmost 4 digits) Pulse output 1: A279 (leftmost 4 digits) and A278 (rightmost 4 digits) The PVs are refreshed during regular I/O refreshing. PVs can be read to user-specified words with the PRV(881) instruction. Specifications

Internal circuits

Low voltage circuit

+V OUT0 to OUT3 COM

+V OUT4 to OUT5 COM
Pulse Output Specifications (OUT0 to OUT3)
Item Max. switching capacity Min. switching capacity Max. output frequency 30 mA, 4.75 to 26.4 V DC 7 mA, 4.75 to 26.4 V DC 100 kHz

90% 10%

Output waveform

2 s min.

4 s min.
CJ1-H-R, CJ1-H, CJ1M, and CJ1 CPU Unit Comparison
Item Basic instructions LD OUT Examples XFER BSET Instruction executions times 240.1 s (for 1,000 words) 140.2 s (for 1,000 words) 7.6 s min. 300.1 s (for 1,000 words) 200.1 s (for 1,000 words) 8.2 s min. 380.1 s (for 1,000 words) 220.1 s (for 1,000 words) 8.4 s min. 650.2 s (for 1,000 words) 400.2 s (for 1,000 words) CPU11/21 21.5 s min. Other CPU Units 18.9 s min. 0.30 s min. CPU11/21 15.7 s min. Other CPU Units 13.3 s min. 3.84 s CPU11/21 0.7 ms Other CPU Units 0.5 ms 633.5 s (for 1,000 words) 278.3 s (for 1,000 words) 14.0 s min. CJ1-H-R CPU Unit CJ1H-CPU6@H-R 0.016 s 0.016 s 0.02 s 0.02 s CJ1-H CPU Unit CJ1H-CPU6@H CJ1G-CPU4@H 0.04 s 0.04 s CJ1M CPU Unit CJ1M-CPU2@/1@ 0.10 s 0.35 s CJ1 CPU Unit CJ1G-CPU4@ 0.08 s 0.21 s

Special instructions

BCD arithmetic Binary arithmetic Floatingpoint math SBS/RET

0.18 s min.

0.20 s min.

0.37 s min.

0.24 s min. 1.33 s Normal mode: 0.13 ms Parallel mode: 0.28 ms
8.0 s min. 2.12 s Normal mode: 0.3 ms Parallel mode: 0.3 ms

9.2 s min. 3.56 s 0.5 ms

10.2 s min. 37.6 s 0.5 ms

Overhead time

CPU execution processing modes
Execution timing Data links CPU Bus Unit special refreshing DeviceNet remote I/O Protocol macro send/ receive data
Any of the following four modes: 1. Normal (instructions and peripheral servicing performed consecutively) 2. Peripheral Servicing Priority Mode (instruction execution interrupted to service peripherals at a specific cycle and time; consecutive refreshing also performed) 3. Parallel Processing Mode with Synchronous Memory Access (instruction executed and peripheral services in parallel while synchronizing access to I/O memory) 4. Parallel Processing Mode with Asynchronous Memory Access (instruction executed and peripheral services in parallel without synchronizing access to I/O memory)

CJ1-H-R CPU Unit CJ1H-CPU6@H-R
CJ1-H CPU Unit CJ1H-CPU6@H CJ1G-CPU4@H
CJ1M CPU Unit CJ1M-CPU2@/1@
CJ1 CPU Unit CJ1G-CPU4@ Only the user program, parameters, and I/O memory in the CPU Unit. Not supported.
Backup to Memory Cards (simple backup function) Debugging Automatic user program and parameter area backup to flash memory Detailed information on I/O table creation errors I/O tables Displaying presence of first rack word setting on Programming Console
In addition to the data listed at the right, data from Units mounted to the CPU Rack or Expansion Racks can also be backed up to the Memory Card (via pushbutton on front panel). This is very effective when replacing Units. Backup data includes scan lists for DeviceNet Units, protocol macros for Serial Communications Units, etc. Supported (enabling battery-free operation without a Memory Card) The user program and parameter area data are automatically backed up the flash memory whenever they are transferred to the CPU Unit from the CX-Programmer, file memory, etc. Detailed I/O table error information is stored in A261 whenever the I/O tables cannot be created for any reason. It's possible to confirm if the first rack word has been specified for the system on the Programming Console display. The first rack word is specified from the CX-Programmer, making it previously impossible to confirm the setting from the Programming Console. Not supported. Not supported. Not supported. CPM2A-BAT01 CJ1M-CPU2@ Supported. Supported. CJ1W-BAT01

Not supported.

Not supported. Not supported. Not supported. Not supported. CPM2A-BAT01
Built-in I/O Serial PLC Link Battery Operation when Unit doesn't complete startup process
Scheduled interrupts set in increments of 0.1 ms Supported.

CPU Unit startup

Starting or not starting (standby) the CPU Unit in MONITOR or RUN mode even if a Unit has not completed startup processing can be specified in the PLC Setup.

CPU Unit standby (fixed)

Sequence instructions
Differentiated LD NOT, AND NOT, and OR NOT instructions

Supported.

Not supported. (The same results can be achieved by combining differentiated LD, AND, and OR instructions with the NOT instruction.) Not supported.
OUTB, SETB, and RSTB instructions to manipulate individual bits in DM and EM Area words TIMU (0.1-ms, BCD), TIMUX (0.1-ms, binary), TMUH (0.01-ms, BCD), TMUHX (0.01-ms, binary) Format for updating PVs for TIM, TIMH, TMHH, TTIM, TIML, MTIM, CNT, CNTR, CNR, TIMW, TMHW, CNTW instructions 32-bit signed data line coordinates and X axis starting point specification for APR instruction High-speed trigonometric functions: SINQ, COSQ, and TANQ instructions Floatingpoint decimal instructions Single-precision calculations and conversions Conversions between single-precision floating point and ASCII Double-precision calculations and conversions Text string and table data processing instruction execution Stack insertions/deletions/ replacements and stack counts with table processing instructions PID with autotuning Global subroutines

User programs that contain functions supported only by CPU Units with unit version 2.0 or later cannot be used on CS/CJ-series Pre-Ver. 2.0 CPU Units. An error message will be displayed if an attempt is made to download programs containing unit version s.0 functions to a Pre-Ver. 2.0 CPU Unit, and the download will not be possible. If an object program file (.OBJ) using these functions is transferred to a Pre- Ver. 2.0 CPU Unit, a program error will occur when operation is started or when the unit version 2.0 function is executed, and CPU Unit operation will stop.
Unit Versions and Programming Devices
The following tables show the relationship between unit versions and CX-Programmer versions.
CX-Programmer CPU Unit Functions (See note 1.) Ver. 3.3 OK OK OK OK OK OK OK Ver. 4.0 OK OK OK OK OK Ver. 5.0 Ver. 6.0 Ver. 7.0 or higher OK (See note 2 and 3.) OK OK OK OK OK No restrictions Programming Console
CS/CJ-series unit Ver. 4.0
Functions added for unit version 4.0
Using new functions Not using new functions Using new functions Not using new functions Using new functions Not using new functions
CS/CJ-series unit Ver. 3.0
Functions added for unit version 3.0
CS/CJ-series unit Ver. 2.0
Functions added for unit version 2.0
Note: 1. As shown above, there is no need to upgrade to CX-Programmer version as long as the functions added for unit versions are not used. 2. CX-Programmer version 7.1 or higher is required to use the new functionality of CJ1-H-R CPU Units. When using CJ1-H-R CPU unit Ver.4.1, use CX-Programmer Ver.7.2 or later (Check the CX-Programmer version in "Version Information"). 3. CX-Programmer version 7.0 or higher is required to use the functional improvements made for unit version 4.0 of the CS/CJ-series CPU Units. With CX-Programmer version 7.2 or higher, you can use even more expanded functionality.

Device Type Setting

The unit version does not affect the setting made for the device type on the CX-Programmer. Select the device type as shown in the following table regardless of the unit version of the CPU Unit.
Series CJ Series CPU Unit group CJ1M CPU Units CPU Unit model CJ1M-CPU@@ CJ1M Device type setting on CX-Programmer Ver. 4.0 or higher

External Interface

A CJ-series CJ1M CPU Unit (with Built-in I/O) provides two communications ports (a peripheral port and an RS-232C port) and one built-in I/O port (40-pin MIL Connector).
LED Indicators DIP Switch (Inside the battery compartment) Used for initial settings. I/O Indicator Indicates ON/OFF status of signals to actual built-in inputs and outputs. Memory Card Indicators MCPWR (green): Lit when power is supplied to Memory Card. BUSY (orange): Lit when Memory Card is being accessed. Built-in I/O MIL connector (40 pins) Peripheral Port Connected to Programming Devices, such as a Programming Console or host computers. Memory Card Connector Connects the Memory Card to the CPU Unit.

General-purpose input 2 Interrupt input 2 Quick-response input 2 High-speed counter 1 (Phase-Z/Reset input) Origin search 1 (Origin Input Signal) General-purpose input 4 Origin search 0 (Positioning Completed Signal) General-purpose input 6 High-speed counter 1 (Phase-A, Increment, or Count input) General-purpose input 8 High-speed counter 0 (Phase-A, Increment, or Count input) General-purpose output 0 In CW/CCW mode: Pulse output 0 (CW) In Pulse + Direction mode: Pulse output 0 (pulse) General-purpose output 2 In CW/CCW mode: Pulse output 1 (CW) In Pulse + Direction mode: Pulse output 0 (direction) General-purpose output 4 Origin search 0 (Error Counter Reset Output) PWM(891) output 0 Power supply input (+V) for the output Output COM
General-purpose input 3 Interrupt input 3 Quick-response input 3 High-speed counter 0 (Phase-Z/Reset input) Origin search 1 (Origin Proximity Input Signal) General-purpose input 5 Origin search 1 (Positioning Completed Signal) General-purpose input 7 High-speed counter 1 (Phase-B, Decrement, or Direction input) General-purpose input 9 High-speed counter 0 (Phase-B, Decrement, or Direction input) General-purpose output 1 In CW/CCW mode: Pulse output 0 (CCW) In Pulse + Direction mode: Pulse output 1 (pulse) General-purpose output 3 In CW/CCW mode: Pulse output 1 (CCW) In Pulse + Direction mode: Pulse output 1 (direction) General-purpose output 5 Origin search 1 (Error Counter Reset Output) PWM(891) output 1 *2 Not used Output COM

A19 A20

B19 B20
*1. These are the pins on the XW2D-@@G@ Terminal Block. *2. PWM(891) output 1 can be used only with the CJ1M-CPU22/CPU23.
Built-in I/O MIL connector Wiring Methods
To connect to a Terminal Block, use an OMRON Cable preassembled with the special connector or attach the special connector (sold separately) to a cable yourself.
Using User-made Cables with Connector
Connector Models Compatible Connector Specifications
MIL Flat Cable Connectors (40-pin Pressure-fitted Connectors)

Socket

Stain relief
Name Socket Stain Relief Set model number Recommended Flat Cable
OMRON model number XG4M-4030 XG4M-4004 XG4M-4030-T XY3A-200@
Daiichi Electronics model number FRC5-AO40-3TON FRC5-AO40-3TOS
MIL Loose Wire Crimp Connectors (40-pin Pressure-fitted Connectors)

Hood Cover

Partial Cover
Name Socket Spare Contacts (See note 1.) Hood Cover (See note 2.) Partial Cover (See note 2.) (2 required for each socket) AWG24 AWG26 to AWG28 AWG24 AWG26 to AWG28 OMRON model number XG5M-4032-N XG5M-4035-N XG5W-0031-N XG5W-0034-N XG5S-4022 XG5S-2001
Note: 1. Contacts are included with the Socket. 2. Select either the Hood Cover or the Partial Cover.

Wiring

We recommend using a cable with wires sized between 28 and 24 AWG (0.2 to 0.08 mm2). Use a wire with an outer diameter of 1.61 mm max.
Compatible Terminal Blocks
Recommended Cable XW2Z-@@@K Compatible Terminal Block XW2D-40G6 XW2B-40G5 XW2B-40GNumber of pins Size Small Standard Temperature (C) 0 to to 80
Using an OMRON Cable preassembled with the special connector
Connection to Connector-Terminal Block Conversion Unit with Built-in I/O
CJ1M-CPU2@ (with Built-in I/O) Built-in I/O Connector Special Connecting Cable XW2Z-@@@K Connector-Terminal Block Conversion Unit XW2@-40G@

Terminal Block

Connection to Servo Driver with Built-in I/O
CJ1M-CPU2@ (with Built-in I/O) Built-in I/O Connector Connecting Cables for CJ1M CPU Units For OMNUC G Series: XW2Z-@@@J-A33 For SMARTSTEP2: XW2Z-@@@J-A33 Servo Relay Unit for 1 axis XW2B-20J6-8A Servo Driver Connecting Cables For OMNUC G Series: XW2Z-@@@J-B31 For SMARTSTEP2: XW2Z-@@@J-B32 Servo Driver OMNUC G Series: R88D-GT SMARTSTEP2: R7D-BP
When two axes are used, two Connecting Cables are required at the Servo Driver for each Servo Relay Unit.

Dimensions

CJ1M CPU Units (with Built-in I/O) CJ1M-CPU21/22/23

(Unit : mm)

65 48.75 83.6

About Manuals

Name SYSMAC CJ/NSJ Series CJ1H-CPU@@H-R, CJ1G-CPU@@, CJ1M-CPU@@, CJ1G-CPU@@P, CJ1G/H-CPU@@H Programmable Controllers Operation Manual SYSMAC CS/CJ/NSJ Series CS1G/H-CPU@@-EV1, CS1G/H-CPU@@H, CS1D-CPU@@H, CS1D-CPU@@S, CJ1H-CPU@@H-R, CJ1G-CPU@@, CJ1M-CPU@@, CJ1G-CPU@@P, CJ1G/H-CPU@@H, NSJ@-@@@@(B)-G5D, NSJ@-@@@@(B)-M3D Programmable Controllers Programming Manual SYSMAC CJ Series CJ1M-CPU21/22/23 Built-in I/O Operation Manual SYSMAC CS/CJ/NSJ Series CS1G/H-CPU@@-EV1, CS1G/H-CPU@@H, CS1D-CPU@@H, CS1D-CPU@@S, CJ1H-CPU@@H-R, CJ1G-CPU@@, CJ1M-CPU@@, CJ1G-CPU@@P, CJ1G/H-CPU@@H, NSJ@-@@@@(B)-G5D, NSJ@-@@@@(B)-M3D Programmable Controllers Instructions Reference Manual SYSMAC CS/CJ Series CQM1H-PRO01-E, C200H-PRO27-E, CQM1-PRO01-E Programming Consoles Operation Manual SYSMAC CS/CJ/NSJ Series CS1G/H-CPU@@-EV1, CS1G/H-CPU@@H, CS1D-CPU@@H, CS1D-CPU@@S, CJ1G-CPU@@, CJ1M-CPU@@, CJ1G-CPU@@P, CJ1G/H-CPU@@H, CS1W-SCB@@-V1, CS1W-SCU@@-V1, CJ1W-SCU@@-V1, CP1H-X@@@@-@, CP1H-XA@@@@-@, CP1H-Y@@@@-@, NSJ@-@@@@(B)-G5D, NSJ@-@@@@(B)-M3D Communications Commands Reference Manual SYSMAC WS02-CX@@-V@ CX-Programmer Operation Manual SYSMAC WS02-CX@@-V@ CX-Programmer Operation Manual Function Blocks (CS1G-CPU@@H, CS1H-CPU@@H, CJ1G-CPU@@H, CJ1H-CPU@@H, CJ1M-CPU@@, CP1H-X@@@@-@, CP1H-XA@@@@-@, CP1H-Y@@@@-@ CPU Units) CXONE-AL@@C-V@/ CXONE-AL@@D-V@ CX-Integrator Operation Manual CXONE-AL@@C-V@/AL@@D-V@ CX-One FA Integrated Tool Package Setup Manual Cat. No. W393 Contents Provides an outlines of and describes the design, installation, maintenance, and other basic operations for the CJ-series PLCs.

This manual describes programming and other methods to use the functions of the CS/CJ-series and NSJ-series PLCs.
Describes the functions of the built-in I/O for CJ1M CPU Units.
Describes the ladder diagram programming instructions supported by CS/CJseries and NSJ-series PLCs
Provides information on how to program and operate CS/CJ-series PLCs using a Programming Console.
Describes the C-series (Host Link) and FINS communications commands used with CS/CJ-series PLCs.
Provides information on how to use the CX-Programmer for all functionality except for function blocks.
Describes the functionality unique to the CX-Programmer Ver. 7.0 and CPseries CPU Units or CS/CJ-series CPU Units with unit version 3.0 or later based on function blocks. Functionality that is the same as that of the CX-Programmer is described in W446 (enclosed).

W464 W463

Describes operating procedures for the CX-Integrator Network Configuration Tool for CS-, CJ-, CP-, and NSJ-series Controllers. Installation and overview of CX-One FA Integrated Tool Package.
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OMRON SHALL NOT BE RESPONSIBLE FOR SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES, LOSS OF PROFITS OR COMMERCIAL LOSS IN ANY WAY CONNECTED WITH THE PRODUCTS, WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT LIABILITY. In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which liability is asserted. IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS REGARDING THE PRODUCTS UNLESS OMRON'S ANALYSIS CONFIRMS THAT THE PRODUCTS WERE PROPERLY HANDLED, STORED, INSTALLED, AND MAINTAINED AND NOT SUBJECT TO CONTAMINATION, ABUSE, MISUSE, OR INAPPROPRIATE MODIFICATION OR REPAIR.
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SUITABILITY FOR USE

ERRORS AND OMISSIONS

The information in this document has been carefully checked and is believed to be accurate; however, no responsibility is assumed for clerical, typographical, or proofreading errors, or omissions.
2009.4 In the interest of product improvement, specifications are subject to change without notice.
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