Philips 104E
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104(e) Recipient List
0-Burgard Equities LLC 528 Investors LLC A Abex Corp (American Brake Shoe Co) ACF Industries, Inc. / ACF Industries, LLC Advanced American Construction Properties LLC A.G.G. Enterprises, Inc. Air Liquide America Corporation Albers Mill Building Partnership Alder Creek Lumber Company, Inc. Alcatel Submarine Networks, Inc. Aleris International American Seafoods Company American Ship Dismantlers American Tokyo Kasei, Inc. Anchor Park LLC Anderson Brothers Property Anderson Portland Properties LLC ANRFS Holdings, Inc. Arkema Inc. (Formerly Atofina Chemicals, Inc.) Armstrong Disposal Company Ash Grove Cement Co. Ashland, Inc. ATC Leasing Co. LLC ATKN Company Automotive Electric Distributors Inc. Automatic Vending B B D C Properties LLC Babcock Land Company, LLC BAE Systems San Diego Ship Repair, Inc. Barton, Richard M. (c/o Metro Presort, Inc.) Basin Street Assoc Bay Valley Foods BBD&R, Inc. (Fred Devine Diving and Salvage) Beazer East, Inc./Beazer Materials & Services, Inc. Bell Oil Terminal Co. Berry Transport, Inc. Bird Incorporated Borden Chemical, Inc. Borden Packaging and Industial Products Boydstun Metal Works, inc. BP West Coast Products LLC (aka: Atlantic Richfield Company (ARCO) Brand-S Corporation Brenntag Pacific Brazil & Co. (a.k.a. Brazil Electric) Brazil Motor & Controls, Inc. Brix Dearmond, LLC Brix Maritime Co. (DBA: Foss Maritime Co.) Burgard 789 Burlington Northern and Santa Fe Railway Company
Page 1 of 7
C C&T Quincy Foods Calbag Metals Company CanAm Minerals, Inc. Cargrill Inc. Carson Oil Co. Inc. Cascade Brake Products Cascade General, Inc. Cenex Ag Inc. CENVEO Corporation Certain Teed Corporation Chapel Steel Chase Bag Chevron U.S.A., Inc. Chipman Chemical Co. Christenson Oil (aka: Haj, Inc.) City of Portland CHS, Inc. Columbia Forge and Machine Works Columbia Grain, Inc. Columbia River Sand & Gravel ConocoPhillips Co. consolidated Metco Inc. Container Recovery, Inc. Container Management Services, LLC Cornerstone Property Investments LLC Crosby & Overton Crawford Street Corporation Crowly Marine Services, Inc. Crown Beverage Packaging Inc D D.S.U.-Peterbilt & GMC, Inc. Dasic International Corp. DIL Trust Douglas Oil Co. of California Dulien Steel Dura Industries E East Side Plating, Inc. Eastman Chemical Company EC Company (Marine Electric Co.) Edward Hostmann, Inc. Elkem Metals Equilon Enterprises, LLC ESCO Corporation Estey, John R. Evergreen Chemical and Soap Company Evraz Oregon Steel Mills, Inc. ExxonMobil Oil Corporation F Fletcher Construction Company North America Flint Ink Corp.
Page 2 of 7
FLRF LLC FMC Corp Fort James Corp. Fort James NW LLC Foster Poultry Farms Frank Fink Company Freightliner Corporation Front Avenue Corporation Front Avenue III Limited Partnership Front Avenue Limited Partnership Front Avenue MP, LLC G G A C Acquisition Corp Galvanizers Company GATX Tank Storage Terminals Corporation GATX Terminals Corporation General Electric Co. General Services AdministrationGeneral Construction Company (subsidiary of: Peter Kiewit Sons, Inc.) Georgia-Pacific West, Inc. G.I. Trucking Company a Corporation Of California Glacier Northwest, Inc. Greenway Properties LLC Goldendale Aluminum Co. Golden Northwest Aluminum Holding Co. Gould Electronics, Inc. (fka: GA-TEK, Inc.) Great Western Chemical Co. (aka: GWC Front LLC) Grundfos Pumps Corporation GS Roofing---Guilds Lake Properties LLC Gunderson Brothers Engineering Corporation Gunderson, Inc. H HAL North America, Inc. (Pacific Northern Oil Co.) Harsch Investment Properties LLC Hendren Tow-Boat Co., Inc. Henry P Oseran & Associates Hercules Inc. Herman, Stan Hexion Specialty Chemicals, Inc. Hill Investment Co. Howard S. Wright Construction Co. I Ifco Systems Inc. Industrial Battery Company, Inc. Industry 30 LLC International Raw Materials LTD Island Holdings Inc. J Jefferson Smurfit Corporation John Day Logging Company Jones Stevedoring
Page 3 of 7
Joseph T. Ryerson & Son, Inc. JR Simplot Company K Kaiser---K F Jacobsen & Co Kinder Morgan Kinder Morgan Liquids Terminals LLC Kinder Morgan Bulk Terminals, Inc. King-Ries LLC Kingsley Lumber Co. KLIX Corp. Koppers Company, Inc. Koppers Inc. KSC Recovery Inc. L L&S Marine Lakea Corporation (ABN: Columbia American Plating) Lakeside Industries Lampros Properties LLC / Camrose Pipe Corporation Langley - St. Johns Partnership Linde Gas LLC Linnton Plywood Association Lockheed Martin Corp. Lone Star NW Longview City Laundry & Cleaners Inc. Lynden Farms M M&F Worldwide Macro Manufacturing Madden Family LLC Mar Com Holding, LLC Mar Com Marine Mar Com, Inc. Marine Finance Corporation Marine Propulsion Services Inc. Marine Salvage Consortium, Inc. Maritime Administration Martin Marietta Materials Inc.McCall Oil and Chemical Corporation (and affiliated) McCall Oil Real Estate Co. LLC McCloskey Corp (Oregon) McCown de Leeuw & Co (aka: BMC Northwest Holdings inc.) McEachern Corp. McMorgan Institutional Real Estate Fund I LLC McWhorter, Inc. Medite Corporation (fka Medford Corporation) Mept Rivergate LLC Metco Inc. Metra Steel "Metro Regional Government" MFI Inc (MetroFueling Inc) Morse Bros., Inc.
Page 4 of 7
Mt. Hood Chemical Corp. Multnomah Land and Equipment Myers Container LLC N Niblick, Inc. Nichols Marine Ways Nikko Materials USA, Inc. NL Industries, Inc. NMT Diesel, Inc. North Basin Watumull LLC North Pacific Group, Inc. (dba North Pacific Lumber) Northern Pacific Railway Co. Northwest Container Services Northwest Industrial and Foundry Supply Co. Northwest Marine, Inc. Northwest Marine Iron Works Northwest Natural Gas Company (a.k.a. NW Natural/Gasco) Northwest Oil Northwest Pipe Company NRC Environmental Services Nudelman & Sons, Inc. O Olympic Pipe Line Company Oregon Power Lending Institution Inc. Oregon Sustainable Agriculture Land Trust Oregon Terminal Co. Oregon Washington Railroad Oregon Woodworking Limited Owens Corning (Corp.) P Pacific Terminal Services, Inc. PacifiCorp (Pacific Power) Paco Pumps (f/k/a Pacific Pumping Company) Paramount of Oregon LLC PCC Flow Technologies LP Peanut Butter Properties LLC Petrina Properties V LLC PetroCard Systems Inc. Phillips Oil Co. Pope & Talbot, Inc. Port of Portland Portland Bulk Terminals, LLC Portland Container Repair Corp. Portland General Electric Company Portland Shipyard LLC Portland Terminal Railroad Co. Premier Edible Oils Pride of Oregon Holdings Inc (Pacific Pride Services Inc) Q Quadra Chemicals Inc. R R. E. McElroy LLC
Page 5 of 7
R K Storage and Warehousing, Inc. Riedel (Zidell - Triangle Park) Riedel Environmental Technologies Riverside Industrial Lumber Ro-Mar Realty of Oregon, Inc. RoMar Transportation Systems Rose City Moving & Storage Rudie Wilhelm Warehouse Co. S S N Properties Partnership (aka N. Warehousing, Inc.) Sakrete of Pacific Northwest Inc. Samuelson Properties LP Sause Bros., Inc. Schnitzer Steel Industries Inc (Metra Steel) Schnitzer Investment Corp. Schnitzer Steel Industries, Inc. Shaver Transportation Company Shell Oil Co. Shipyard Commerce Center LLC Shore Terminals LLC SIC Processing USA Management Corp. Siltronic Corporation Simpson Lumber Company Smith Environmental Technologies Southern Pacific Pipelines PA SPC Properties LLC Special Asphalt Products Specialty Truck Parts, Inc. Standard Oil Co. Standard Steel Property LLC StarLink Logistics, Inc. (fka: Bayer Cropscience Limited Partnership/ Rhone Poulenc) State of Oregon (ODOT) State of Oregon (ODSL)-Steel Hammer Properties, LLC Steelmill Warehouse, Inc. Sulzer Pumps (US) Inc. Summit Properties Inc. Sutter, David (owner property of KLIX) Swan Island Watamull LLC Swift Transportation T Taiwan Navigation Co., Ltd. Tanker Basin LLC Tenex Management Limited The Marine Group, LLC The Marine Salvage Consortium, Inc. Texaco Inc. Tice Properties Tidewater Oil Co. Time Oil Co. Tosco Corporation Toyota Logistics Services, Inc.
Page 6 of 7
Toyota Motor Sales USA Transloader International Co LLC Tri-County Metropolitan (Tri-Met) Tube Forgings of America, Inc. U U. S. Army Corps of Engineers (USACE) U. S. Navy Union Carbide Corporation Union Pacific Corp Union Pacific Railroad Company United States (BPA) United States Coast Guard Univar (Van Waters & Rogers) Unocal Corporation V V&K Service, Inc. Valero LP (aka Shore Terminals LLC) Valspar Corp., The VWR International, Inc. W Watamull Properties Corp. West Coast Adhesives Co. Western Homes Incorporated Western Pacific Piledriving Westinghouse Electric Wilhelm Trucking Co. (dba Wilhelm Trucking Acquisition) Willamette-Western Corporation Willamette Hi Grade Concrete (Riedel) Wirfs, Don WMR LLC Work Zone LLC XYZ Young Mechanical Services, Inc. YRC, Inc. Z Exploration Inc. Zehrung Corp. Zidell Marine Corporation Zidell, Emery N. ZRZ Realty Co.
Page 7 of 7

Parameters Resistor Terminal Input Voltage Range (Terminals A, B and W) Maximum current through A, W or B (Note 6)
100
2.5 2.5 2.5 1.38 0.688 0.138 0.069
mA mA mA mA mA mA mA nA nA nA
Terminal A Terminal B Terminal W
IAW, W = Full Scale (FS) IBW, W = Zero Scale (ZS) IAW (W = FS) or IBW (W = ZS)
Maximum RAB current (IAB) (Note 6)
VB = 0V, VA = 5.5V, RAB(MIN) = 4000 VB = 0V, VA = 5.5V, RAB(MIN) = 8000 VB = 0V, VA = 5.5V, RAB(MIN) = 40000 VB = 0V, VA = 5.5V, RAB(MIN) = 80000 Leakage current IWL MCP44X1 PxA = PxW = PxB = VSS into A, W or B MCP44X2 PxB = PxW = VSS Terminals Disconnected (R0A = R0W = R0B = 0; R1A = R1W = R1B = 0; R2A = R2W = R2B = 0; R3A = R3W = R3B = 0) Note 1: Resistance is defined as the resistance between terminal A to terminal B. 2: INL and DNL are measured at VW with VA = VDD and VB = VSS. 3: MCP44X1 only. 4: MCP44X2 only, includes VWZSE and VWFSE. 5: Resistor terminals A, W and Bs polarity with respect to each other is not restricted. 6: This specification by design. 7: Non-linearity is affected by wiper resistance (RW), which changes significantly over voltage and temperature. 8: The MCP44X1 is externally connected to match the configurations of the MCP44X2, and then tested. 9: POR/BOR is not rate dependent. 10: Supply current is independent of current through the resistor network. 11: When HVC/A0 = VIHH, the IDD current is less due to current into the HVC/A0 pin. See IPU specification.
DS22265A-page 6
Standard Operating Conditions (unless otherwise specified) Operating Temperature 40C TA +125C (extended) DC Characteristics All parameters apply across the specified operating ranges unless noted. VDD = +2.7V to 5.5V, 5 k, 10 k, 50 k, 100 k devices. Typical specifications represent values for VDD = 5.5V, TA = +25C. Sym VWFSE Min -6.0 -4.0 -3.5 -2.0 -0.8 -0.5 -0.5 -0.5 -1 -0.5 Typ -0.1 -0.1 -0.1 -0.1 -0.1 -0.1 -0.1 -0.1 +0.1 +0.1 +0.1 +0.1 +0.1 +0.1 +0.1 +0.1 0.5 0.25 Max +6.0 +3.0 +3.5 +2.0 +0.8 +0.5 +0.5 +0.5 +1 +0.5 Units LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb LSb 5 k Conditions
Parameters Full Scale Error (MCP44X1 only) (8-bit code = 100h, 7-bit code = 80h)
8-bit 3.0V VDD 5.5V 7-bit 3.0V VDD 5.5V 10 k 8-bit 3.0V VDD 5.5V 7-bit 3.0V VDD 5.5V 50 k 8-bit 3.0V VDD 5.5V 7-bit 3.0V VDD 5.5V 100 k 8-bit 3.0V VDD 5.5V 7-bit 3.0V VDD 5.5V Zero Scale Error VWZSE 5 k 8-bit 3.0V VDD 5.5V (MCP44X1 only) 7-bit 3.0V VDD 5.5V (8-bit code = 00h, 10 k 8-bit 3.0V VDD 5.5V 7-bit code = 00h) 7-bit 3.0V VDD 5.5V 50 k 8-bit 3.0V VDD 5.5V 7-bit 3.0V VDD 5.5V 100 k 8-bit 3.0V VDD 5.5V 7-bit 3.0V VDD 5.5V Potentiometer INL 8-bit 3.0V VDD 5.5V Integral MCP44X1 devices only 7-bit Non-linearity (Note 2) Potentiometer DNL -0.5 0.25 +0.5 LSb 8-bit 3.0V VDD 5.5V Differential NonMCP44X1 devices only -0.25 0.125 +0.25 LSb 7-bit linearity (Note 2) Bandwidth -3 dB BW 2 MHz 5 k 8-bit Code = 80h (See Figure 2-72, 2 MHz 7-bit Code = 40h load = 30 pF) 1 MHz 10 k 8-bit Code = 80h 1 MHz 7-bit Code = 40h 200 kHz 50 k 8-bit Code = 80h 200 kHz 7-bit Code = 40h 100 kHz 100 k 8-bit Code = 80h 100 kHz 7-bit Code = 40h Note 1: Resistance is defined as the resistance between terminal A to terminal B. 2: INL and DNL are measured at VW with VA = VDD and VB = VSS. 3: MCP44X1 only. 4: MCP44X2 only, includes VWZSE and VWFSE. 5: Resistor terminals A, W and Bs polarity with respect to each other is not restricted. 6: This specification by design. 7: Non-linearity is affected by wiper resistance (RW), which changes significantly over voltage and temperature. 8: The MCP44X1 is externally connected to match the configurations of the MCP44X2, and then tested. 9: POR/BOR is not rate dependent. 10: Supply current is independent of current through the resistor network. 11: When HVC/A0 = VIHH, the IDD current is less due to current into the HVC/A0 pin. See IPU specification.
FIGURE 1-3: TABLE 1-3:
I2C Bus Data Timing. I2C BUS DATA REQUIREMENTS (SLAVE MODE)
Standard Operating Conditions (unless otherwise specified) Operating Temperature 40C TA +125C (Extended) Operating Voltage VDD range is described in AC/DC characteristics Min 100 kHz mode 400 kHz mode 1.7 MHz mode 3.4 MHz mode Max Units ns ns ns ns ns ns ns ns Conditions 1.8V-5.5V 2.7V-5.5V 4.5V-5.5V 4.5V-5.5V 1.8V-5.5V 2.7V-5.5V 4.5V-5.5V 4.5V-5.5V
Param. No. 100
Sym THIGH
Characteristic Clock high time
Clock low time
100 kHz mode 400 kHz mode 1.7 MHz mode 3.4 MHz mode
Note 1: 2:
4: 5: 6: 7:
As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions. A fast-mode (400 kHz) I2C-bus device can be used in a standard-mode (100 kHz) I2C-bus system, but the requirement tSU;DAT 250 ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line TR max.+tSU;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I2C bus specification) before the SCL line is released. The MCP44X1/MCP44X2 device must provide a data hold time to bridge the undefined part between VIH and VIL of the falling edge of the SCL signal. This specification is not a part of the I2C specification, but must be tested in order to ensure that the output data will meet the setup and hold specifications for the receiving device. Use Cb in pF for the calculations. Not Tested. A Master Transmitter must provide a delay to ensure that difference between SDA and SCL fall times do not unintentionally create a Start or Stop condition. Ensured by the TAA 3.4 MHz specification test.
DS22265A-page 14
TABLE 1-3: I2C BUS DATA REQUIREMENTS (SLAVE MODE) (CONTINUED)
Standard Operating Conditions (unless otherwise specified) Operating Temperature 40C TA +125C (Extended) Operating Voltage VDD range is described in AC/DC characteristics Min 100 kHz mode 400 kHz mode 1.7 MHz mode 1.7 MHz mode 20 + 0.1Cb Max Units ns ns ns ns Conditions Cb is specified to be from 10 to 400 pF (100 pF maximum for 3.4 MHz mode) After a Repeated Start condition or an Acknowledge bit After a Repeated Start condition or an Acknowledge bit Cb is specified to be from 10 to 400 pF (100 pF max for 3.4 MHz mode) I2C AC Characteristics
Param. No. 102A (5)
Sym TRSCL
Characteristic SCL rise time
3.4 MHz mode 3.4 MHz mode
102B (5)
SDA rise time
20 + 0.1Cb 20 + 0.1Cb 20 + 0.1Cb (4) 0 0
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
SCL fall time
Cb is specified to be from 10 to 400 pF (100 pF max for 3.4 MHz mode)
SDA fall time
THD:DAT
Data input hold time
1.8V-5.5V, Note 6 2.7V-5.5V, Note 6 4.5V-5.5V, Note 6 4.5V-5.5V, Note 6
DS22265A-page 15
Standard Operating Conditions (unless otherwise specified) Operating Temperature 40C TA +125C (Extended) Operating Voltage VDD range is described in AC/DC characteristics Min 100 kHz mode 400 kHz mode 1.7 MHz mode 3.4 MHz mode 109 TAA Output valid from clock 100 kHz mode 400 kHz mode 1.7 MHz mode 3.4 MHz mode 110 TBUF Bus free time 100 kHz mode 400 kHz mode 1.7 MHz mode 3.4 MHz mode TSP Input filter spike suppression (SDA and SCL) 100 kHz mode 400 kHz mode 1.7 MHz mode 3.4 MHz mode Note 1: 2: N.A. N.A. Max 150 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Spike suppression Spike suppression Philips Spec states N.A. Cb = 100 pF, Note 1, Note 7 Cb = 400 pF, Note 1, Note 5 Cb = 100 pF, Note 1 Time the bus must be free before a new transmission can start Note 1 Note 2 Conditions I2C AC Characteristics
Param. No. 107
Characteristic
TSU:DAT Data input setup time
DS22265A-page 16
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +2.7V to +5.5V, VSS = GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 14L-TSSOP Thermal Resistance, 20L-QFN Thermal Resistance, 20L-TSSOP JA JA JA 90 C/W C/W C/W TA TA TA -40 -40 -65 +125 +125 +150 C C C Sym Min Typ Max Units Conditions
DS22265A-page 17
NOTES:
DS22265A-page 18
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25C, VDD = 5V, VSS = 0V.
-40 250
3.4MHz, 5.5V
3.4MHz, 4.5V
IDD (A)
1.7MHz, 5.5V 1.7MHz, 4.5V 400kHz, 5.5V 100kHz, 5.5V 100kHz, 2.7V
100 50
400kHz, 2.7V
Temperature (C) 7 VHVC (V) 10
FIGURE 2-1: Device Current (IDD) vs. I2C Frequency (fSCL) and Ambient Temperature (VDD = 2.7V and 5.5V).
3.0 Standby Current (ISHDN) (A)
FIGURE 2-4: HVC/A0 Pull-up/Pull-down Resistance (RHVC) and Current (IHVC) vs. HVC/ A0 Input Voltage (VHVC) (VDD = 5.5V).
HVC/A0 Threshold (V)
2.5 2.0 1.5
5.5V Entry
8.0 6.0 4.0 2.0 0.0
5.5V Exit
2.7V Entry
2.7V Exit
1.0 0.5 0.0 -Ambient Temperature (C) 120
80 Ambient Temperature (C)
FIGURE 2-2: Device Current (ISHDN) and VDD. (HVC/A0 = VDD) vs. Ambient Temperature.
500 EE Write Current (IWRITE) (A) 400
FIGURE 2-5: HVC/A0 High Input Entry/ Exit Threshold vs. Ambient Temperature and VDD.
300 200
-Ambient Temperature (C) 120
FIGURE 2-3: Write Current (IWRITE) vs. Ambient Temperature and VDD.
DS22265A-page 19
IHVC (A)
-200 -400 -600 -800 -1000
RHVC (kOhms)
120 Wiper Resistance (RW) (ohms) -0.1 40
125C 85C -40C 25C
Wiper Resistance (RW) (ohms)
-40C Rw -40C INL -40C DNL
25C Rw 25C INL 25C DNL
85C Rw 85C INL 85C DNL
125C Rw 125C INL 125C DNL
0.3 0.2 Error (LSb) 0.1
1.25 0.75 0.25 -0.25 Error (LSb) Error (LSb)
85C 25C
DNL RW
-0.75 -1.25
-0.Wiper Setting (decimal)
Wiper Setting (decimal)
FIGURE 2-6: 5 k Pot Mode RW (), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (VDD = 5.5V).
300 Wiper Resistance (RW) (ohms) 60
-40C 25C RW 125C 85C
FIGURE 2-8: 5 k Rheo Mode RW (), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (VDD = 5.5V).
300 Wiper Resistance (RW) (ohms) 180 140
-40C Rw -40C INL -40C DNL 25C Rw 25C INL 25C DNL 85C Rw 85C INL 85C DNL 125C Rw 125C INL 125C DNL
INL DNL
-0.1 -0.2 -0.3
100 60
-Wiper Setting (decimal)
FIGURE 2-7: 5 k Pot Mode RW (), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (VDD = 3.0V).
FIGURE 2-9: 5 k Rheo Mode RW (), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (VDD = 3.0V).
DS22265A-page 20
5300 Nominal Resistance (RAB) (Ohms) 5250
Resistance () 0 -40C +25C +85C +125C Wiper Code 256
5050 -Ambient Temperature (C) 120
DS22265A-page 48
5.0 RESISTOR NETWORK
5.1 Resistor Ladder Module
The Resistor Network has either 7-bit or 8-bit resolution. Each Resistor Network allows zero scale to full scale connections. Figure 5-1 shows a block diagram for the resistive network of a device. The Resistor Network is made up of several parts. These include: Resistor Ladder Wiper Shutdown (Terminal Connections) Devices have four resistor networks. These are referred to as Pot 0, Pot 1 Pot 2, and Pot 3. The resistor ladder is a series of equal value resistors (RS) with a connection point (tap) between the two resistors. The total number of resistors in the series (ladder) determines the RAB resistance (see Figure 51). The end points of the resistor ladder are connected to analog switches which are connected to the device Terminal A and Terminal B pins. The RAB (and RS) resistance has small variations over voltage and temperature. For an 8-bit device, there are 256 resistors in a string between terminal A and terminal B. The wiper can be set to tap onto any of these 256 resistors, thus providing 257 possible settings (including terminal A and terminal B). For a 7-bit device, there are 128 resistors in a string between terminal A and terminal B. The wiper can be set to tap onto any of these 128 resistors, thus providing 129 possible settings (including terminal A and terminal B). Equation 5-1 shows the calculation for the step resistance.
8-Bit N= 257 (1) (100h) 256 (1) (FFh) 255 (FEh) 7-Bit N= 128 (80h) 127 (7Fh) 126 (7Eh)
EQUATION 5-1:
RAB RS = ------------( 256 )
RS CALCULATION
8-bit Device
R RAB S
RW 1 (1) (01h) 0 (00h) 1 (01h) 0 (00h)
R AB R S = ------------( 128 )
7-bit Device
Analog Mux
Note 1: The wiper resistance is dependent on several factors including, wiper code, device VDD, Terminal voltages (on A, B, and W), and temperature. Also for the same conditions, each tap selection resistance has a small variation. This RW variation has greater effects on some specifications (such as INL) for the smaller resistance devices (5.0 k) compared to larger resistance devices (100.0 k).
Device Address MCP44XX 0101 1b + A1:A0 Note 1:
Comment Supports up to 4 devices. (Note 1) A0 is used for High-Voltage commands (HVC/A0) and the value is latched at POR/BOR.
SLOPE CONTROL
The MCP44XX implements slope control on the SDA output. As the device transitions from HS mode to FS mode, the slope control parameter will change from the HS specification to the FS specification. For Fast (FS) and High-Speed (HS) modes, the device has a spike suppression and a Schmidt trigger at SDA and SCL inputs.
DS22265A-page 56
HS MODE
The I C specification requires that a high-speed mode device must be activated to operate in high-speed (3.4 Mbit/s) mode. This is done by the Master sending a special address byte following the START bit. This byte is referred to as the high-speed Master Mode Code (HSMMC). The MCP44XX device does not acknowledge this byte. However, upon receiving this command, the device switches to HS mode. The device can now communicate at up to 3.4 Mbit/s on SDA and SCL lines. The device will switch out of the HS mode on the next STOP condition. The master code is sent as follows: 1. 2. START condition (S) High-Speed Master Mode Code (0000 1XXX), The XXX bits are unique to the high-speed (HS) mode Master. No Acknowledge (A)
After switching to the High-Speed mode, the next transferred byte is the I2C control byte, which specifies the device to communicate with, and any number of data bytes plus acknowledgements. The Master Device can then either issue a Repeated Start bit to address a different device (at High-Speed) or a Stop bit to return to Fast/Standard bus speed. After the Stop bit, any other Master Device (in a Multi-Master system) can arbitrate for the I2C bus. See Figure 6-10 for illustration of HS mode command sequence. For more information on the HS mode, or other I2C modes, please refer to the Phillips I2C specification.
6.2.6.1
Slope Control
The slope control on the SDA output is different between the Fast/Standard Speed and the High-Speed clock modes of the interface.
6.2.6.2
Pulse Gobbler
The pulse gobbler on the SCL pin is automatically adjusted to suppress spikes < 10 ns during HS mode. F/S-mode S 1 X X Xb HS-mode A Sr Slave Address R/W A Data A/A
F/S-mode HS-mode continues
HS Select Byte
Control Byte
Command/Data Byte(s)
Sr Slave Address R/W A Control Byte
S = Start bit Sr = Repeated Start bit A = Acknowledge bit A = Not Acknowledge bit R/W = Read/Write bit P = Stop bit (Stop condition terminates HS Mode)
TABLE 7-1:
I2C COMMANDS
# of Bit Clocks (1) 29 18n + 48 18n + 9n + 9n + 11 Operates on Volatile/ Nonvolatile memory Both Volatile Only Both Both Both (2) Volatile Only Volatile Only Volatile Only Volatile Only
Command Operation Write Data Read Data Mode Single Continuous Single Random Continuous Increment
Single Continuous Single Continuous
Decrement
n indicates the number of times the command operation is to be repeated. This command is useful to determine if a nonvolatile memory write cycle has completed. High Voltage Increment and Decrement commands on select nonvolatile memory locations enable/disable WiperLock Technology and the software Write Protect feature.
FIGURE 7-1:
Command Byte Format.
DS22265A-page 61
TABLE 7-2:
Value 00h
Command
Write Data Read Data (3) Increment Wiper Decrement Wiper
Address Function Volatile Wiper 0
Data (10-bits) (1)
nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn nn nnnn nnnn
Volatile Wiper 1
NV Wiper 0
Write Data Read Data (3) High Voltage Increment High Voltage Decrement
Wiper Lock 0 Disable (4) Wiper Lock 0 Enable (5)
NV Wiper 1
Wiper Lock 1 Disable (4) Wiper Lock 1 Enable (5)
04h (2) Volatile TCON 0 Register 05h (2) 06h Status Register Volatile Wiper 2
Write Data Read Data (3) Read Data (3) Write Data Read Data (3) Increment Wiper Decrement Wiper
Volatile Wiper 3
NV Wiper 2
Wiper Lock 2 Disable (4) Wiper Lock 2 Enable (5)
NV Wiper 3
Wiper Lock 3 Disable (4) Wiper Lock 3 Enable (5)
0Ah (2)
Volatile TCON 1 Register
Write Data Read Data (3) Write Data Read Data (3) Write Data Read Data (3) Write Data Read Data (3) Write Data Read Data (3) Write Data Read Data (3) High Voltage Increment High Voltage Decrement
0Bh (2) Data EEPROM 0Ch (2) Data EEPROM 0Dh (2) Data EEPROM 0Eh (2) Data EEPROM 0Fh Data EEPROM
DS22265A-page 75
8.5 Implementing Log Steps with a Linear Digital Potentiometer
EQUATION 8-1: dB CALCULATIONS (VOLTAGE)
In audio volume control applications, the use of logarithmic steps is desirable since the human ear hears in a logarithmic manner. The use of a linear potentiometer can approximate a log potentiometer, but with fewer steps. An 8-bit potentiometer can achieve fourteen 3 dB log steps plus a 100% (0 dB) and a mute setting. Figure 8-7 shows a block diagram of one of the MCP44x1 resistor networks being used to attenuate an input signal. In this case, the attenuation will be ground referenced. Terminal B can be connected to a common mode voltage, but the voltages on the A, B and Wiper terminals must not exceed the MCP44x1s VDD/VSS voltage limits.
L = 20 * log10 (VOUT / VIN) dB -3 -2 -1 VOUT / VIN Ratio 0.70795 0.79433 0.89125
EQUATION 8-2:
dB CALCULATIONS (RESISTANCE) - CASE 1
Terminal B connected to Ground (see Figure 8-7) L = 20 * log10 (RBW / RAB)
MCP44X1 P0A P0W P0B
EQUATION 8-3:
dB CALCULATIONS (RESISTANCE) - CASE 2
Terminal B through RB2GND to Ground L = 20 * log10 ( (RBW + RB2GND) / (RAB + RB2GND) ) Table 8-1 shows the codes that can be used for 8-bit digital potentiometers to implement the log attenuation. The table shows the wiper codes for -3 dB, -2 dB, and -1 dB attenuation steps. This table also shows the calculated attenuation based on the wiper codes linear step. Calculated attenuation values less than the desired attenuation are shown with red text. At lower wiper code values, the attenuation may skip a step, if this occurs the next attenuation value is colored magenta to highlight that a skip occurred. For example, in the -3 dB column the -48 dB value is highlighted since the -45 dB step could not be implemented (there are no wiper codes between 2 and 1).
FIGURE 8-7: Signal Attenuation Block Diagram - Ground Referenced.
Equation 8-1 shows the equation to calculate voltage dB gain ratios for the digital potentiometer, while Equation 8-2 shows the equation to calculate resistance dB gain ratios. These two equations assume that the B terminal is connected to ground. If terminal B is not directly resistively connected to ground, then this terminal B to ground resistance (RB2GND) must be included into the calculation. Equation 8-3 shows this equation.
DS22265A-page 76
TABLE 8-1:
# of Steps
LINEAR TO LOG ATTENUATION FOR 8-BIT DIGITAL POTENTIOMETERS
14-Lead TSSOP Example
XXXXXXXX YYWW NNN
4462502E 1035 256
20-Lead QFN (4x4) XXXXX XXXXXX XXXXXX YYWWNNN
Example 4461 502EML e^^ 256
20-Lead TSSOP
Example
XXXXXXXX XXXXX NNN YYWW
4461502 EST ^^ 256 e3 1035
Legend: XX.X Y YY WW NNN
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week 01) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
DS22265A-page 81
For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
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APPENDIX A: REVISION HISTORY
Revision A (September 2010)
Original Release of this Document.
DS22265A-page 89
DS22265A-page 90
APPENDIX B: CHARACTERIZATION DATA ANALYSIS
B.1 Low-Voltage Operation
This appendix gives an overview of CMOS semiconductor characteristics at lower voltages. This is important so that the 1.8V resistor network characterization graphs of the MCP444X/446X devices can be better understood. For this discussion, we will use the 5 k device data. This data was chosen since the variations of wiper resistance have much greater implications for devices with smaller RAB resistances. Figure B-1 shows the worst case RBW error from the average RBW as a percentage, while Figure B-2 shows the RBW resistance versus the wiper code graph. Non-linear behavior occurs at approximately wiper code 160. This is better shown in Figure B-2, where the RBW resistance changes from a linear slope. This change is due to the change in the wiper resistance.
2.00% 1.00% 0.00% -1.00%
Some designers may want to understand the device operational characteristics outside of the specified operating conditions of the device. Applications where the knowledge of the resistor network characteristics could be useful include battery powered devices and applications that experience brown-out conditions. In battery applications, the application voltage decays over time until new batteries are installed. As the voltage decays, the system will continue to operate. At some voltage level, the application will be below its specified operating voltage range. This is dependent on the individual components used in the design. It is still useful to understand the device characteristics to expect when this low-voltage range is encountered. Unlike a microcontroller, which can use an external supervisor device to force the controller into the Reset state, a digital potentiometers resistance characteristic is not specified. But understanding the operational characteristics can be important in the design of the applications circuit for this low-voltage condition. Other application system scenarios where understanding the low-voltage characteristics of the resistor network could be important is for system brown out conditions. For the MCP444X/446X devices, the analog operation is specified at a minimum of 2.7V. Device testing has Terminal A connected to the device VDD (for the potentiometer configuration only) and Terminal B connected to VSS.
-40C @ 1.8V +25C @ 1.8V +85C @ 1.8V +125C @ 1.8V
Resistance ()
128 Wiper Code
FIGURE B-4: Wiper Resistance (RW) vs. Wiper Code and Temperature (VDD = 1.8V, IW = 260 A).
DS22265A-page 92
Nn RS Nn-1 RS Nn-2 RAB Nn-3 RS RW (1)
NMOS PMOS
RW (1)
So looking at the wiper voltage (VW) for the 3.0V and 1.8V data gives the graphs in Figure B-8 and Figure B-9. In the 1.8V graph, as the VW approaches 0.8V, the voltage increases nonlinearly. Since V = I * R, and the current (IW) is constant, it means that the device resistance increased nonlinearly at around wiper code 160.
Wiper Voltage (V)
1.2 1.0 0.8 0.6 0.4 0.2 0.0
VWC(n-2)
N1 RS N0 RW RW
FIGURE B-8: Wiper Voltage (VW) vs. Wiper Code (VDD = 3.0V, IW = 190 A).
1.4 1.2 Wiper Voltage (V)
The wiper resistance is dependent on several factors including, wiper code, device VDD, Terminal voltages (on A, B and W), and temperature.
1.0 0.8 0.6 0.4 0.2 0.160 Wiper Code 192
FIGURE B-6: Diagram.
Resistor Network Block
The characteristics of the wiper are determined by the characteristics of the wiper switch at each of the resistor networks tap points. Figure B-7 shows an example of a wiper switch. As the device operational voltage becomes lower, the characteristics of the wiper switch change due to a lower voltage on the VG signal. Figure B-7 shows an implementation of a wiper switch. When the transistor is turned off, the switch resistance is in the Giga s. When the transistor is turned on, the switch resistance is dependent on the VG, VW and VWCn voltages. This resistance is referred to as RW. RW (1) gate NWC VWCn gate Note 1: Wiper Resistance (RW) depends on the voltages at the wiper switch nodes (VG, VW and VWCn).
FIGURE B-9: Wiper Voltage (VW) vs. Wiper Code (VDD = 1.8V, IW = 190 A).
VG (VDD/VSS)
Wiper VW
FIGURE B-7:
Wiper Switch.
DS22265A-page 93
Using the simulation models of the NMOS and PMOS devices for the MCP44XX analog switch (Figure B-10), we plot the device resistance when the devices are turned on. Figure B-11 and Figure B-12 show the resistances of the NMOS and PMOS devices as the VIN voltage is increased. The wiper resistance (RW) is simply the parallel resistance on the NMOS and PMOS devices (RW = RNMOS || RPMOS). Below the threshold voltage for the NMOS ad PMOS devices, the resistance becomes very large (Gigaohms). In the transistors active region, the resistance is much lower. For these graphs, the resistances are on different scales. Figure B-13 and Figure B-14 only plot the NMOS and PMOS device resistance for their active region and the resulting wiper resistance. For these graphs, all resistances are on the same scale. RW gate VIN gate
Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-60932-533-6
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Companys quality system processes and procedures are for its PIC MCUs and dsPIC DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchips quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
DS22265A-page 99
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