2-4 2-5 2-6 2-8 2-9 2-10 2-12 2-12 2-17 2-23 2-30 2-33 2-33 2-34 2-34 5-1 5-2 5-2 5-3 5-4 5-5 5-6 5-6 5-6 5-7 6-2 6-3 6-3 6-4 6-4 6-5 6-5 6-5 6-6 6-8 6-10 6-14 6-15 6-15 7-1 7-2 7-4 7-6 7-8 7-9 7-10 8-6 A-1 A-1

About This Guide

This guide provides technical information on the Stylistic 1200 pen tablet system hardware and software.

Revision History

This manual is updated when possible to document changes to hardware and software products. The following revision history shows revisions of this manual and briefly describes the product changes documented in the revision.
Revision Revision A Document part number: 58-0593-00A Changes Revision A is a compilation of the following three previously released documents. All information in these three documents relating to the Stylistic 1200 pen tablet system is reproduced in this guide. Stylistic 1200 System Software and Configuration Utilities Guide (FMW25TRG1) Stylistic 1200 Hardware Technical Reference Guide (FMW25TRG2) Stylistic 1200 Software Developers Reference Guide (FMW25TRG3) Revision B Document part number: 58-0593-00B Revision B (this revision) has been updated for the release of the Windows 98 and Windows NT operating systems as supported on the Stylistic 1200 system. New information relating to these operating systems has been added to the following chapters of this guide: Chapter 1 System Software This chapter has been updated to include details on pen support for Windows NT including DLLs for Graphical Identification and Authorization (GINA) and Secure Attention Sequence (SAS). Chapter 2 Configuring the Stylistic 1200 Pen Tablet System This chapter has been updated with information relating to Utilities supported for use with the Windows 98 and Windows NT operating systems. Chapter 8 BIOS Configuration APIs This chapter has been updated to include information on BIOS configuration functions in DLLs which are supported for use with the Windows 98 and Windows NT operating systems.

Organization

This guide is organized as follows: Chapter 1 System Software This chapter gives an overview of system software and utilities preinstalled on the Stylistic 1200 pen tablet.

Windows NT PC Card Support
Phoenix/Softex Card Executive 2.0 for Windows NT is preinstalled on Windows NT systems to provide PC Card support. Note:
At the time of this writing, a limited number of PC Cards are supported for use with Windows NT. Refer to the documentation provided with Phoenix/Softex Card Executive for details on supported PC Cards. A list of supported cards is also available from the Phoenix Technologies web site at <http://www.phoenix.com/notebook/cardlist.pdf>.
Overview of System Configuration Tools and Utilities
The following system configuration tools and utilities are preinstalled on the Stylistic 1200 pen tablet. Unless otherwise noted, details on using these programs are given later in this manual. These utilities run on all operating systems supported for use with the Stylistic 1200 system. PenSetup A BIOS configuration utility stored in the systems BIOS ROM. Stylistic 1200 Setup A Windows control panel application that allows you to configure BIOS options. PM Setup A power management application for Windows. Gray Shade Editor (runs on monochrome systems only) A Windows control panel application that allows you to manually select and adjust individual shades of gray on your monochrome display screen (Stylistic 1200 transmissive and transflective LCD models). PENSET12 (Not available for Windows NT systems.) A configuration utility that runs under MS-DOS as either a command line interpreter or with its own pen-aware user interface. TranXit (Not available for Windows NT systems.) A data transfer utility from Puma Technology provided primarily for transferring data over the systems IrDA, serial, and parallel ports. For details on using TranXit, refer to the TranXit Quick Reference Guide included with the Stylistic 1200 pen tablet, TranXit Help, and the TranXit Readme file C:\TRANXIT\RI\README.TXT. Note that the systems IrDA port supports Standard IR (SIR) and Fast IR (FIR) protocols. Intelisync 97 (Windows NT systems only) This utility, from Puma Technology, provides IrDA file transfer support for Windows NT systems. The following configuration utilities for the Stylistic 1200 pen tablet are distributed with Stylistic 1200 Developer Utilities software and are not preinstalled on the pen tablet system: MFG1200 A configuration utility that runs under MS-DOS as a command line interpreter. This utility is often run as part of a batch file to configure the system automatically using preselected parameters. PHDISK This utility is used to prepare your hard disk for using save-to-disk suspend mode.

Idle Mode CPU Speed

30, 45, 60, 75, 90 (default) MHz

Standby Mode Timeout

Off 1, 2, 4, 6, 8, 12, 16, Minutes 5, 10, 15, 20, 30 (default), 40, 60 Minutes Off 30, 45, 60, 120 (default) MHz

Suspend Mode Timeout

Low Battery CPU Speed
Table 2-6 Power Savings Options (Continued)
Option Suspend Mode Settings Suspend To RAM Suspend To Disk Description Determines the suspend mode used when you press the Suspend/Resume button or the Suspend Mode Timeout expires. Selecting Suspend To RAM also allows you to configure the Auto Suspend-to-Disk Timeout option. Note: If the Resume On Modem Ring and Resume On Time options are used, the system is forced to use Suspend To RAM suspend mode. Determines whether the system automatically performs a suspend-to-disk operation after 1 hour in suspend-to-RAM mode. To use this feature, the Suspend Mode BIOS Option must be set to Suspend To RAM. Select On to configure the system to resume operation when an incoming call is detected on your modem. Note that the system will use Suspend-to-RAM suspend mode when this option is set to On regardless of the Suspend Mode setting. Select On to configure your system to resume operation at the time of day specified in the Resume Time field. Note that the system will use Suspend-to-RAM suspend mode when this option is set to On regardless of the Suspend Mode setting. Determines time of day system will resume when the Resume On Time option is On. Enter the time of day in HH:MM:SS format. Note that the system uses a 24-hour clock. Selecting Normal allows the Suspend/Resume button to be used to suspend or resume system operation. Selecting Resume Only allows the Suspend/Resume button to be used only to resume system operation. Determines how clocks are managed in Idle mode when APM software is running. Determines whether the display backlight level can be changed using Brightness hotpads. Choose Adjustable to allow backlight level to be changed. Choose Minimum Only to disable Brightness hotpads and set backlight level to minimum at all times. Determines whether video system resumes when activity is detected on Serial Port A. Select Enabled to resume video system operation when a device (such as a serial mouse) connected to Serial Port A is active.
Auto Suspend-to-Disk Timeout

Off After 1 Hour

Resume On Modem Ring

Off On

Resume On Time

Resume Time

Video timeout Note: The power savings mode BIOS option (PSM) must be set to Customize before this option can be changed.
Idle mode timeout Note: The power savings mode BIOS option (PSM) must be set to Customize before this option can be changed. Idle mode CPU speed Note: The power savings mode BIOS option (PSM) must be set to Customize before this option can be changed. Standby mode timeout Note: The power savings mode BIOS option (PSM) must be set to Customize before this option can be changed.

90 N 16

30 MHz 45 MHz 60 MHz 75 MHz 90 MHz Off (No standby timeout set.) 1 minute 2 minutes 4 minutes 6 minutes 8 minutes 12 minutes 16 minutes
Option SUST Setting N 60 Function Off (No suspend mode timeout set.) 5 minutes 10 minutes 15 minutes 20 minutes 30 minutes 40 minutes 60 minutes 120 MHz 30 MHz 45 MHz 60 MHz Description Suspend mode timeout Note: The power savings mode BIOS option (PSM) must be set to Customize before this option can be changed.
Low battery CPU speed Note: The power savings mode BIOS option (PSM) must be set to Customize before this option can be changed. Resume on time Resume time

OFF HH:MM:SS

Resume on time disabled. Specify resume time in hours, minutes, and seconds. (Note: System uses a 24 hour clock.) Disabled Enabled
Resume on modem ring Note that the system will use Suspend-to-RAM suspend mode when this option is enabled regardless of the Suspend Mode setting. Video resume on serial activity PC Card controller

N Y OFF PC CB N Y N W

Disabled Enabled Disabled PCIC compatible Card bus Off On Normal Write Protect

Keyboard hot plug

Hard disk boot sector

Running MFG1200

MFG1200 is a BIOS configuration program for the Stylistic 1200 pen tablet that runs from the MS-DOS command line. You can run MFG1200 by executing commands at the MS-DOS prompt, or from a batch file. Note that MFG1200 is not preinstalled on the pen tablet system and is distributed with Stylistic 1200 Developer Utilities software. MFG1200 can only be used to change permanent BIOS settings. To run MFG1200, 1. Start your system in MS-DOS mode. (In most cases, you should run MFG1200 from an MS-DOS bootable diskette.) 2. Type the command MFG1200 followed by the desired parameters using the following syntax,

MFG1200 [option=setting]

where option and setting are the mnemonic symbols for the desired MFG1200 parameters listed in Table 2-10. (Brackets indicate that the parameter is optional.) You can specify several parameters on the same command line. To do so, place a comma between each parameter. (Do not exceed the maximum MS-DOS command line length of 127 characters, including spaces.) For example, the following command sets the display device to LCD and turns the speaker off.

MFG1200 DISP=L, SPK=N

3. When all desired options and settings are typed on the command line, press Enter to run MFG1200. When the MFG1200 command is complete, the following message is displayed.

Configuration complete.

Table 2-10 lists MFG1200 parameters and the BIOS settings that they configure. These BIOS options are the same as those described earlier for PenSetup. Refer to PenSetup earlier in this chapter for detailed descriptions of corresponding BIOS options listed in this table. (You may notice that, with the exception of a few options such as enabling or disabling page edits for PenSetup screens, these parameters are the same as those for PenSet12.)
Table 2-10 MFG1200 Parameters
Option IMOD Setting S F1 F3 P I O B E1 E3 Function SIR (Standard IR) FIR (Fast IR) DMA channel 1 FIR (Fast IR) DMA channel 3 Port replicator IrDA port Output only Bidirectional ECP (extended capabilities port) DMA channel 1 ECP (extended capabilities port) DMA channel 3 Description IrDA mode

LPT mode

Table 2-10 MFG1200 Parameters (Continued)
Option BOOT Setting AC CA C N Y Function A: then C: C: then A: C: only Off (Mute) On Description Boot sequence
Speaker (This parameter determines the speaker setting at start up. Using the Speaker hotpads will change this setting.) External level 2 cache
Display select (Video) Using the Display Select hotpad will change this setting. Graphics video mode Using the Normal/ Reverse Video hotpad will change this setting. Text video mode Using the Normal/ Reverse Video hotpad will change this setting. Suspend mode
R D N Y RO N A M N A N Y N Y
Suspend-to-RAM Suspend-to-disk Disabled Enabled Resume only Normal Adjustable Minimum only Disabled Auto detect Do not display Display Do not display Display
Hard disk drive configuration POST errors
Option SUM Setting N Y A N Y OFF 144 Y N Function Do not display Display Auto Off On Disabled 1.44MB, 3.5 disk drive enabled Allow edits Do not allow edits Description Summary screen
Main page edits: This option allows you to write protect the Main menu screen in PenSetup. Advanced page edits: This option allows you to write protect the Advanced menu screen in PenSetup Security page edits: This option allows you to write protect the Security menu in PenSetup. Power page edits: This option allows you to write protect the Power menu in PenSetup. Boot page edits: This option allows you to write protect the Boot menu in PenSetup. Serial port A I/O address and interrupt request (IRQ) setting.
Allow edits Do not allow edits
OFF 3F4 2F3 3E4 2E3 3F11 2F10 3E11 2E10
Disabled 3F8, IRQ4 2F8, IRQ3 3E8, IRQ4 2E8, IRQ3 3F8, IRQ11 2F8, IRQ10 3E8, IRQ11 2E8, IRQ10
Option SEB Setting OFF 3F4 2F3 3E4 2E3 3F11 2F10 3E11 2E10 Function Disabled 3F8, IRQ4 2F8, IRQ3 3E8, IRQ4 2E8, IRQ3 3F8, IRQ11 2F8, IRQ10 3E8, IRQ11 2E8, IRQ10 Description Serial port B I/O address and interrupt request (IRQ) setting. Note that if the serial port B device is set to IrDA and the IrDA mode is set to FIR (Fast IR), serial port B will use an additional I/O address which is assigned automatically. LPT port (Parallel port) I/O address and interrupt request (IRQ) setting.

The hard disk drive boot sector BIOS configuration option must be set to normal to create a save-to-disk partition. 2
/FILE or /F The /FILE parameter creates a file in the hard disks MS-DOS partition that is used to store only save-to-disk data. When a save-to-disk partition already exists, a file large enough to supplement the save-to-disk partition is created by default. When the system and video memory outgrows the [SIZE] of the save-to-disk partition, the /FILE option can be used to re-allocate disk space. Using /FILE eliminates the user's need to create a new save-to-disk partition, and also eliminates the time consuming task of backing up the entire hard disk drive before running PHDISK /CREATE /PARTITION. If you want to use a save-to-disk file exclusively to store save-to-disk data, you must first delete any existing save-to-disk partition before creating a save-to-disk file.
/CREATE Option Syntax The syntax of the PHDISK /CREATE option is: PHDISK /CREATE [SIZE][/FILE][/PARTITION] Table 2-12 lists valid examples of the PHDISK /CREATE option.
Table 2-12 PHDISK /CREATE Option
Command PHDISK /CREATE /FILE (or PHDISK /C /F) Description If no save-to-disk partition exists, PHDISK creates a save-to-disk file large enough for the current system configuration. If a save-to-disk partition exists, PHDISK creates a save-to-disk file large enough to supplement the existing save-to-disk partition space. (The file created provides additional disk space required for save-to-disk operation.) PHDISK /CREATE /PARTITION (or PHDISK /C /P) Creates a save-to-disk partition using the amount of memory required as calculated by PHDISK. Caution Creating a save-to-disk partition will reformat the hard disk drive, erasing all data on the disk. You must back up your hard disk before using PHDISK to create a save-to-disk partition. To avoid reformatting your hard disk, use the /FILE parameter instead of the /PARTITION parameter. PHDISK /CREATE 10240 /FILE (or PHDISK /C 10240 /F) Creates a 10 MB save-to-disk file. The [SIZE] variable is 10240.

REFORMAT Option

The /REFORMAT option resets the pointers in a save-to-disk partition. Use this option after a save-to-disk operation is terminated by a read or write error. Note:
Only save-to-disk partitions can be reformatted; save-to-disk files cannot. If a hard disk error occurs while writing to a save-to-disk file, use PHDISK /DELETE /FILE to delete the save-to-disk file. Then, use PHDISK /CREATE /FILE to create a new save-to-disk file. 2
/REFORMAT Option Syntax Table 2-13 lists an example of the PHDISK /REFORMAT option.
Table 2-13 PHDISK /REFORMAT Option
Command PHDISK /REFORMAT /PARTITION (or PHDISK /R /P) Description Reformats the save-to-disk partition.

DELETE Option

In the case of Zoomed Video play-back, MPEG compressed data is transferred from the hard disk to the Zoomed Video card (via the system bus and the PC Card controller). The MPEG data is then decompressed by the PC Card and sent to the display and audio controller via the ZV bus.
Pen Tablet Hardware Features
Note the following with respect to using Zoomed Video features on the Stylistic 1200 pen tablet: Video functions such as video capture and MPEG decompression/playback are performed by the Zoomed Video card. Your Zoomed Video card may not perform all of these video functions. Refer to the documentation for your PC Card to determine its video capabilities. All Stylistic 1200 pen tablets are equipped with ZV Port technology, however full motion video is best displayed on a system with a TFT color display. Other displays will produce a blurred effect because the display cannot react fast enough to display full-motion video in real time. Other PC Cards (besides Zoomed Video cards) can be used in PC Card slot 1. Both PC Card slots in the Stylistic 1200 pen tablet fully support the PC Card Standard release 3.0. Also, note that performing MPEG decompression and playback without a Zoomed Video card is possible on the Stylistic 1200 pen tablet using software compression and decompression (Codec); however, doing so may produce unsmooth (jerky) video playback and will task the majority of the CPU instructions to performing video functions.
Software Considerations for Zoomed Video
Card and Socket Services software to support Zoomed Video is built into the Windows 95 operating system. (Zoomed Video is not currently supported on Stylistic 1200 pen tablets running Windows for Workgroups or Windows NT.)
About the Universal Serial Bus (USB)
The Universal Serial Bus (USB) is a peripheral bus standard for connecting external devices. The Stylistic 1200 port replicator provides two USB ports that are designed to the Universal Serial Bus Specification Revision 1.0. The USB can support concurrent operation of up to 127 devices. See Chapter 6 of this manual for more specific details on USB implementation on the Stylistic 1200 port replicator.

Replacing the IDE Hard Disk Drive
The built-in IDE hard disk drive in the Stylistic 1200 pen tablet can be removed and replaced if necessary. Caution
Observe the following guidelines when handling the hard disk drive: Do not attempt to disassemble or modify the hard disk drive. Do not remove any labels from the hard disk drive. Handle the hard disk drive only by the sides. Avoid touching connector pins and circuit boards on the drive or pen tablet. Electrostatic discharge caused by doing so can damage sensitive components.
Removing the Hard Disk Drive
To remove the hard disk drive from the pen tablet, 1. Shut down and turn off the pen tablet. (Slide the Power switch to the Off position.)
2. Using a Phillips screw driver (size #1), remove the two screws from the hard disk drive cover plate on the Stylistic 1200 pen tablet as indicated in Figure 4-3 and remove the hard disk drive cover plate.
Screws Hard Disk Drive Cover Plate
Pry carefully here if necessary.
Figure 4-3 IDE Hard Disk Drive Cover Plate
Note that shock mount pads on the inside of the cover may stick to the drive making it necessary to pry the cover plate up using a small flat blade screw driver. When doing so, pry gently, applying steady pressure, and be careful not to gouge the hard disk drive under the cover plate.
3. Locate the pull tab on the hard disk drive flex cable indicated in Figure 4-4.
Figure 4-4 Locating IDE Hard Disk Drive Flex Cable Tab
4. Disconnect the flex cable from the pen tablet by carefully pulling up on the tab as shown in Figure 4-5.
Figure 4-5 Disconnecting IDE Hard Disk Drive Flex Cable
5. Gently remove the hard disk drive from the pen tablet. Caution
Do not damage the hard disk drives printed circuit board when removing the drive. Handle the drive by the edges and avoid touching the printed circuit board with your hands or tools.
Note that it may be necessary to pry the drive out of the pen tablet as the shock mount pads tend to stick to the drive. To do so, place a small screwdriver inside the mounting holes on the side of the drive, indicated in Figure 4-6, and gently pry the drive up until the drive is loose.
Mounting holes on side of hard disk drive.
Figure 4-6 Removing IDE Hard Disk Drive
Once the hard disk drive is removed from the pen tablet, you can install a new hard disk drive. If you are returning the hard disk drive for factory service, it is recommended that you do not remove the flex cable from the drive and instead return the hard disk drive and flex cable as an assembly. Note: If you are returning the hard disk drive ensure that the packaging material will protect the drive sufficiently during shipment.

Installing the Hard Disk Drive
To install the hard disk drive in the pen tablet, attach a new flex cable to the hard disk drive if necessary, then perform the previous procedure in reverse. Note:
A new hard disk drive (without preinstalled operating system) can be purchased as an assembly with the flex cable already attached (recommended), or you can attach a flex cable to the drive.
Attaching the Flex Cable to the Hard Disk Drive
Note that the cable connector that attaches to the hard disk drive is keyed. When you attach the cable to the drive, the flex cable must be oriented toward the drives printed circuit board. (The four left-most pins on the drive are not used.) Figure 4-7 shows the orientation of the flex cable when it is attached to the drive.

Not Used (4 Pins)

Figure 4-7 IDE Flex Cable Orientation
Removing the Flex Cable from the Hard Disk Drive
If adequate care is taken, you can remove the flex cable from the hard disk drive in order to reuse the flex cable. Note, however, that because of the fragile nature of the components, removing the flex cable from the drive is not recommended. Instead, obtaining a hard disk drive assembly with the flex cable already attached is recommended. If you are installing a new hard disk drive, you are advised to install a new flex cable rather than reuse the old one. To obtain a new flex cable, order Fujitsu part number CA20281-B00X. Caution
Do not attempt to remove the flex cable from the drive by pulling the flex cable directly. Doing so will damage the flex cable and may bend the pins on the hard disk drive. This procedure should only be performed by an experienced technician. Damage to components caused by improper handling when removing the cable is not covered under warranty. Follow ESD handling precautions.
To remove the flex cable from the hard disk drive, 1. Use a small flat-blade screwdriver to begin prying the flex cable connector off of the drive at the end of the connector. 2. Working at each end of the connector, use the screw driver to gently push the connector off of the pins on the drive a little at a time. To avoid bending the pins, ensure that the connector remains as parallel with the drive as possible as you remove the connector.

Chapter 5 Specifications

Specifications for the Stylistic 1200 pen tablet and port replicator are given in this chapter. Note that several of the features listed in this chapter are further described elsewhere in this manual.
Core System Logic Specifications

Position 119

Position 1 Position 3
The pin assignments for the system interface port connector on the pen tablet are given in Table 6-11. Signals designated with the pound (#) symbol are active low. Note: Signal names listed in the second column of this table are not industry standard signal names. They are provided to assist in cross-referencing these signal names when they appear elsewhere.
The port replicator connector is not a hot pluggable connector. You must power down the pen tablet or put it in suspend mode before connecting the port replicator. The system interface port is disabled (all signals de-asserted) when system operation is suspended.
Table 6-11 System Interface Port Connector Pin Assignments
Pin 27 Signal Name GNDPR GNDPR LOUTLG GNDPR LOUTL GNDPR LOUTRG 5VMAIN LOUTR 5VMAIN LINLG 5VMAIN LINL 5VMAIN LINRG PRHPLG LINR PRHPL MICAMPRG PRHPRG MICAMPR PRHPR MICAMPLG GND AUD MICAMPL PSTB# PAFD# Level GND GND GND GND Analog GND GND +5 V Analog +5 V GND +5 V Analog +5 V GND GND Analog Analog GND GND GND GND GND GND GND +5 V +5 V Ground Ground Ground Left Ground Signal Left Ground Ground Right +5 Volt Power Output* Signal Right +5 Volt Power Output* Ground Left +5 Volt Power Output* Signal Left +5 Volt Power Output* Ground Right Ground Left Signal Right Signal Left Ground Right Ground Right Signal Right Signal Right Ground Left Ground Signal Left Strobe Auto Feed Description Port or Connector Port Replicator Port Replicator Line Output Audio Jack Port Replicator Line Output Audio Jack Port Replicator Line Output Audio Jack Port Replicator Line Output Audio Jack Port Replicator Line Input Audio Jack Keyboard Port Line Input Audio Jack Mouse Port Line Input Audio Jack Headphone Audio Jack Line Input Audio Jack Headphone Audio Jack Mic Input Audio Jack Headphone Audio Jack Mic Input Audio Jack Headphone Audio Jack Mic Input Audio Jack Port Replicator (Audio Amp) Mic Input Audio Jack Parallel Port Parallel Port
Table 6-11 System Interface Port Connector Pin Assignments (Continued)
Pin Signal Name PRD0 PPERR# PRD1 PINIT# PRD2 PSLIN# PRD3 PRD4 PRD5 PRD6 PRD7 PRSMI# PRACK# USBVCC0 PBUSY USB0+ PPE USB0PSLCT USBG FWP# USBVCC1 FTRK0# USB1+ FSIDE# USB1+ FRDDT# USBG PRHP/IN PRMICIN GNDPR GNDPR Level +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V +5 V GND GND Data Bit 0 Error Data Bit 1 Initialize Data Bit 2 Select Input Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 Data Bit 7 Port Replicator Detect Acknowledge Power (Connector A) Busy + Data Signal (Connector A) Paper Out - Data Signal (Connector A) Select Ground Write Protected Power (Connector B) Track 00 + Data Signal (Connector B) Head Select + Data Signal (Connector B) Read Disk Data Ground Headphone Detect (goes high when headphone is plugged into port replicator) Microphone Detect (goes high when mic is plugged into port replicator) Ground Ground Description Port or Connector Parallel Port Parallel Port Parallel Port Parallel Port Parallel Port Parallel Port Parallel Port Parallel Port Parallel Port Parallel Port Parallel Port Port Replicator Parallel Port USB Port Parallel Port USB Port Parallel Port USB Port Parallel Port USB Port Floppy Port USB Port Floppy Port USB Port Floppy Port USB Port Floppy Port USB Port Audio Control Audio Control Port Replicator Port Replicator

Suspend-to-Disk State

In the Suspend-to-Disk state, data in RAM and video memory are written to the hard disk drive and, with the exception of resume logic circuitsconnected to the Suspend/Resume button switch, the system is completely powered down. This suspend state uses the least amount of battery power. Before you configure your system to use the Suspend-to-Disk state, consider the following factors: More time is required to resume system operation as the hard disk drive must spin up and data must be read from the hard disk drive. You must first create a save to disk partition or file before you can use the Suspend-to-Disk state. System operation can only be resumed if the Suspend/Resume button is pressed. If your application uses the resume on modem ring feature, you must configure the Resume On Modem Ring option in BIOS setup. Suspend Events Under typical use, system operation is suspended when the Suspend Timeout expires, the Suspend/ Resume button is pressed, or a suspend request is generated by a software application. A critically low battery will also force the system to suspend operation. Note, however, that this event will force the system into Suspend-to-RAM mode regardless of the Suspend Mode setting in the BIOS. 7

Fully Off State

In the Fully Off state, the system is fully powered off. Note however, that some circuits connected to the battery will continue to draw a very small amount of current when the system is off. For this reason, the pen tablet should be stored with a fully charged battery pack if the system will not be in use for more than a few days.

Burst Mode

In addition to the power management modes mentioned earlier, the Stylistic 1200 pen tablet also functions in Burst mode. Burst mode is a short (2 ms) period during which the CPU runs at full speed. Burst mode is entered when the system is in Idle or Standby mode and one of the following burst events occurs: System management interrupt (SMI#) signal active IRQs 1 through 15 set IRQ 0 set (system timer) This event only generates a burst event if Max Battery Life is selected for the Power Savings BIOS option.
Windows Advanced Power Management Support
If Advanced Power Management (APM) is enabled in Windows (which is the default setting), power management timeouts for most power-managed devices are controlled by Windows. (Power-managed devices that are not controlled by Windows are controlled by the BIOS.) When APM is enabled, CPU activity in Idle mode differs compared to the BIOS controlled Idle mode. Although the BIOS no longer controls these state transitions, the APM CPU Idle Mode BIOS option setting does determine whether the external clock signal is generated in Idle mode. As shown in Table 7-5, the external clock signal is not generated if Normal is selected for the APM CPU Idle Mode BIOS option.

PC Card Controller Mode (permanent only)

BIOS_KEYBOARD_HOTPLUG

Keyboard Hot Plug (permanent only)

BIOS_AUDIO

SETUP_AUDIO_DISABLE SETUP_AUDIO_ENABLE
Audio Features (permanent only)

BIOS_AUDIO_ADDRESS

SETUP_AUDIO_220 SETUP_AUDIO_240 SETUP_AUDIO_260 SETUP_AUDIO_280
I/O Address 220 I/O Address 240 I/O Address 260 I/O Address 280 I/O Address 388 I/O Address 38C I/O Address 390 I/O Address 394 IRQ 5 IRQ 7 IRQ 9 IRQ 10 IRQ 11 DMA Channel 0 DMA Channel 1 DMA Channel 3 Normal Write protect
Audio Base Address (permanent only)

BIOS_AUDIO_FM_ADDRESS

SETUP_AUDIO_FM_388 SETUP_AUDIO_FM_38C SETUP_AUDIO_FM_390 SETUP_AUDIO_FM_394
Audio FM Base Address (permanent only)

BIOS_AUDIO_IRQ

SETUP_AUDIO_IRQ5 SETUP_AUDIO_IRQ7 SETUP_AUDIO_IRQ9 SETUP_AUDIO_IRQ10 SETUP_AUDIO_IRQ11
Audio IRQ Channel (permanent only)

BIOS_AUDIO_DMA

SETUP_AUDIO_DMA0 SETUP_AUDIO_DMA1 SETUP_AUDIO_DMA3 SETUP_FDISK_NORMAL SETUP_FDISK_WRITEPROTECT
Audio DMA Channel (permanent only)

BIOS_FDISK_BOOT_SECTOR

Fixed Disk Boot Sector (permanent only)

BIOS_BOOT_SEQUENCE

SETUP_BOOT_A_THEN_C SETUP_BOOT_C_THEN_A SETUP_BOOT_C_ONLY SETUP_BOOTDIAG_DISABLE SETUP_BOOTDIAG_ENABLE
A: then C: C: then A: C: only Disabled Enabled
Boot Sequence (permanent only)

BIOS_BOOTDIAG_SCREEN

POST Diagnostic Messages (permanent only)

BIOS_SETUP_PROMPT

SETUP_SETUPPROMPT_DISABLE SETUP_SETUPPROMPT_ENABLE
Setup Prompt (permanent only)

BIOS_SUMMARY_SCREEN

SETUP_SUMMSCREEN_DISABLE SETUP_SUMMSCREEN_ENABLE
Summary Screen (permanent only)

BIOS_NUMLOCK

SETUP_NUMLOCK_AUTO SETUP_NUMLOCK_ON SETUP_NUMLOCK_OFF SETUP_SPEAKER_MUTE SETUP_SPEAKER_ON

Auto On Off Mute On

Numlock (permanent only)

BIOS_SPEAKER

Speaker (permanent only)
BIOS_SERIALMOUSE_ACTIVITY
SETUP_MOUSEACTIVITY_DISABLE SETUP_MOUSEACTIVITY_ENABLE
Video Resume on Serial Activity (permanent only)

BIOS_LOWBAT_CPUSPEED

120 MHz 30 MHz 45 MHz 60 MHz
Low Battery CPU Speed (permanent only)
Note: You must pass an integer value for the Setting parameter for this option. (No symbols are defined for these settings.) BIOS_DISPLAY_TYPE
SETUP_DISPTYPE_LCD SETUP_DISPTYPE_EXTMONITOR SETUP_DISPTYPE_BOTH
LCD External Monitor LCD and External Monitor Normal Reverse
Display (permanent or current)

BIOS_GRAPHICS_MODE

SETUP_GRAPHVIDEO_NORMAL SETUP_GRAPHVIDEO_REVERSE
Graphics Video Mode (permanent or current)

BIOS_TEXT_MODE

SETUP_TEXTVIDEO_NORMAL SETUP_TEXTVIDEO_REVERSE
Text Video Mode (permanent or current)

BIOS_POWER_SAVINGS

SETUP_POWERSAVINGS_OFF SETUP_POWERSAVINGS_CUSTOMIZE SETUP_POWERSAVINGS_MAXPERFORM SETUP_POWERSAVINGS_MAXBATTERY

Resume On Modem Ring (permanent or current)

BIOS_RESUME_ONTIME

SETUP_RESUMEONTIME_OFF SETUP_RESUMEONTIME_ON
Resume On Time (permanent or current)
See Resume Time later in this chapter for details on setting the resume time. BIOS_SUSPEND_BUTTON
SETUP_SUSPENDBUTTON_RESUMEONLY SETUP_SUSPENDBUTTON_NORMAL

Resume Only Normal

Suspend Button (permanent or current)

BIOS_IDLEMODE_CPU

SETUP_CPUIDLE_STANDARD

Normal

APM CPU Idle Mode (permanent or current)
SETUP_CPUIDLE_LOWPOWER BIOS_BACKLIGHT_MODE SETUP_BACKLIGHT_STANDARD SETUP_BACKLIGHT_LOWPOWER Diagnostic Adjustable Minimum Only
LCD Backlight Level (permanent or current)
This section describes functions which allow you to set or retrieve settings for the Resume On Time BIOS option.

BiosSetupSetResumeTime

This function sets the resume time and enables (or disables) the Resume On Time BIOS option. A prototype of this function is shown below:
int BiosSetupSetResumeTime ( BYTE cBCDHour, BYTE cBCDMin, BYTE cBCDSec, BOOL bPermanent, BOOL bEnableIt )
This function accepts three byte values that determine the resume time in hours, minutes, and seconds and also accepts two Boolean values which specify whether the permanent or current setting is to be set and whether the Resume On Time option is enabled. Details on these parameters are given in the following: Parameter
cBCDHour cBCDMin cBCDSec bPermanent bEnableIt
Byte value that specifies hour setting in BCD format. Acceptable values: 0 to 23 (must be in BCD format) Byte value that specifies minutes setting in BCD format. Acceptable values: 0 to 59 (must be in BCD format) Byte value that specifies seconds setting in BCD format. Acceptable values: 0 to 59 (must be in BCD format) TRUE = Permanent setting FALSE = Current setting TRUE = Enable Resume On Time option. FALSE = Disable Resume On Time option.
Note that you must specify all parameters when calling this function. You cannot use this function to enable or disable the Resume On Time option without passing the other parameters this function accepts.

BiosSetupGetResumeTime

This function retrieves settings for the Resume On Time option. A prototype of this function is given below:
DWORD BiosSetupGetResumeTime ( BOOL bPermanent )
This function accepts a Boolean value which determines whether the permanent or current settings are retrieved. This function returns a double word (32-bit value) which contains the Resume On Time option settings as follows. Return Value
Byte 3 (bits 31-24) Byte 2 (bits 23-16) Byte 1 (bits 15-8) Byte 0 (bits 7-0)
Hour setting in BCD format. Minutes setting in BCD format. Seconds setting in BCD format. = Resume On Time option disabled. = Resume On Time option enabled.

Definition of Terms 23

2.5 Processor Power State Definitions
Processor power states (Cx states) are processor power consumption and thermal management states within the global working state, G0. The Cx states possess specific entry and exist semantics and are briefly defined below. For a more detailed definition of each Cx state, see section 8.1, Processor Power States. C0 Processor Power State While the processor is in this state, it executes instructions. C1 Processor Power State This processor power state has the lowest latency. The hardware latency in this state must be low enough that the operating software does not consider the latency aspect of the state when deciding whether to use it. Aside from putting the processor in a non-executing power state, this state has no other software-visible effects. C2 Processor Power State The C2 state offers improved power savings over the C1 state. The worst-case hardware latency for this state is provided via the ACPI system firmware and the operating software can use this information to determine when the C1 state should be used instead of the C2 state. Aside from putting the processor in a non-executing power state, this state has no other software-visible effects. C3 Processor Power State The C3 state offers improved power savings over the C1 and C2 states. The worst-case hardware latency for this state is provided via the ACPI system firmware and the operating software can use this information to determine when the C2 state should be used instead of the C3 state. While in the C3 state, the processors caches maintain state but ignore any snoops. The operating software is responsible for ensuring that the caches maintain coherency.
2.6 Device and Processor Performance State Definitions
Device and Processor performance states (Px states) are power consumption and capability states within the active/executing states, C0 for processors and D0 for devices. The Px states are briefly defined below. For a more detailed definition of each Px state from a processor perspective, see section 8.3.3, Declaring a Processor Object. For a more detailed definition of each Px state from a device perspective see section 3.6, Device and Processor Performance States, and the device class specifications in Appendix A. P0 Performance State While a device or processor is in this state, it uses its maximum performance capability and may consume maximum power. P1 Performance State In this performance power state, the performance capability of a device or processor is limited below its maximum and consumes less than maximum power. Pn Performance State In this performance state, the performance capability of a device or processor is at its minimum level and consumes minimal power while remaining in an active state. State n is a maximum number and is processor or device dependent. Processors and devices may define support for an arbitrary number of performance states not to exceed 16.

3.6 Device and Processor Performance States
This section describes the concept of device and processor performance states. Device and processor performance states (Px states) are power consumption and capability states within the active/executing states, C0 for processors and D0 for devices. Performance states allow OSPM to make tradeoffs between performance and energy conservation. Device and processor performance states have the greatest impact when the states invoke different device and processor efficiency levels as opposed to a linear scaling of performance and energy consumption. Since performance state transitions occur in the active/executing device states, care must be taken to ensure that performance state transitions do not adversely impact the system. Examples of device performance states include: A hard drive that provides levels of maximum throughput that correspond to levels of power consumption. An LCD panel that supports multiple brightness levels that correspond to levels of power consumption. A graphics component that scales performance between 2D and 3D drawing modes that corresponds to levels of power consumption. An audio subsystem that provides multiple levels of maximum volume that correspond to levels of maximum power consumption. A Direct-RDRAMTM controller that provides multiple levels of memory throughput performance, corresponding to multiple levels of power consumption, by adjusting the maximum bandwidth throttles. Processor performance states are described in Section 8, Processor Control.

3.7 Plug and Play

In addition to power management, ACPI provides controls and information so that the OS can direct Plug and Play on the motherboard. The Differentiated Description Table describes the motherboard devices. The OS enumerates motherboard devices simply by reading through the Differentiated Description Table looking for devices with hardware IDs. Each device enumerated by ACPI includes control methods that report the hardware resources the device could occupy and those that are currently used, and a control method for configuring those resources. The information is used by the Plug and Play system to configure the devices.

Overview 37

ACPI is used only to enumerate and configure motherboard devices that do not have other hardware standards for enumeration and configuration. For example, PCI devices on the motherboard must not be enumerated by ACPI; therefore Plug and Play information for these devices is not included in the Differentiated Description Table. However, power management information for these devices can still appear in the table if the devices power management is to be controlled through ACPI. Note: When preparing to boot a computer, the BIOS only needs to configure boot devices. This includes boot devices described in the ACPI system description tables as well as devices that are controlled through other standards.

4.7.3.1.2 PM1 Enable Registers
Register Location: Default Value: Attribute: Size: <PM1a_EVT_BLK/PM1b_EVT_BLK>+PM1_EVT_LEN/2 System I/O or Memory Space 00h Read/Write PM1_EVT_LEN/2
The PM1 enable registers contain the fixed hardware feature enable bits. The bits can be split between two registers: PM1a_EN or PM1b_EN. Each register grouping can be at a different 32-bit aligned address and is pointed to by the PM1a_EVT_BLK or PM1b_EVT_BLK. The values for these pointers to the register space are found in the FADT. Accesses to the PM1 Enable registers are done through byte or word accesses. For ACPI/legacy systems, when transitioning from the legacy to the G0 working state the enables are cleared by BIOS prior to setting the SCI_EN bit (and thus passing control to OSPM). For ACPI-only platforms (where SCI_EN is always set), when transitioning from either the mechanical off (G3) or soft-off state to the G0 working state this register is cleared prior to entering the G0 working state. This register contains optional features enabled or disabled within the FADT. If the FADT indicates that the feature is not supported as a fixed hardware feature, then software treats the enable bits as write as zero.
74 Advanced Configuration and Power Interface Specification Table 4-12 PM1 Enable Registers Fixed Hardware Feature Enable Bits Bit 0 Name TMR_EN Description This is the timer carry interrupt enable bit. When this bit is set then an SCI event is generated anytime the TMR_STS bit is set. When this bit is reset then no interrupt is generated when the TMR_STS bit is set. Reserved. These bits always return a value of zero. The global enable bit. When both the GBL_EN bit and the GBL_STS bit are set, an SCI is raised. Reserved This optional bit is used to enable the setting of the PWRBTN_STS bit to generate a power management event (SCI or wake). The PWRBTN_STS bit is set anytime the power button is asserted. The enable bit does not have to be set to enable the setting of the PWRBTN_STS bit by the assertion of the power button (see description of the power button hardware). Support for the power button is indicated by the PWR_BUTTON flag in the FADT being reset (zero). If the PWR_BUTTON flag is set or a power button device object is present in the ACPI Namespace, then this bit field is ignored by OSPM. 9 SLPBTN_EN This optional bit is used to enable the setting of the SLPBTN_STS bit to generate a power management event (SCI or wake). The SLPBTN_STS bit is set anytime the sleep button is asserted. The enable bit does not have to be set to enable the setting of the SLPBTN_STS bit by the active assertion of the sleep button (see description of the sleep button hardware). Support for the sleep button is indicated by the SLP_BUTTON flag in the FADT being reset (zero). If the SLP_BUTTON flag is set or a sleep button device object is present in the ACPI Namespace, then this bit field is ignored by OSPM. 10 RTC_EN This optional bit is used to enable the setting of the RTC_STS bit to generate a wake event. The RTC_STS bit is set any time the RTC generates an alarm. Reserved. These bits always return a value of zero.

5 ACPI Software Programming Model
ACPI defines a hardware register interface that an ACPI-compatible OS uses to control core power management features of a machine, as described in section 4, ACPI Hardware Specification. ACPI also provides an abstract interface for controlling the power management and configuration of an ACPI system. Finally, ACPI defines an interface between an ACPI-compatible OS and the system BIOS. To give hardware vendors flexibility in choosing their implementation, ACPI uses tables to describe system information, features, and methods for controlling those features. These tables list devices on the system board or devices that cannot be detected or power managed using some other hardware standard, plus their capabilities as described in section 3, Overview. They also list system capabilities such as the sleeping power states supported, a description of the power planes and clock sources available in the system, batteries, system indicator lights, and so on. This enables OSPM to control system devices without needing to know how the system controls are implemented. Topics covered in this section are: The ACPI system description table architecture is defined, and the role of OEM-provided definition blocks in that architecture is discussed. The concept of the ACPI Namespace is discussed.
5.1 Overview of the System Description Table Architecture
The Root System Description Pointer (RSDP) structure is located in the systems memory address space and is setup by the BIOS. This structure contains the address of the Root System Description Table (RSDT), which references other description tables that provide data to OSPM, supplying it with knowledge of the base systems implementation and configuration (see Figure 5-1).
Located in system's memory address space
Root System Description Pointer
Extended System Description Table

RSD PTR Pointer Pointer

Header
Entry Entry Entry. contents contents
Figure 5-1 Root System Description Pointer and Table All system description tables start with identical headers. The primary purpose of the system description tables is to define for OSPM various industry-standard implementation details. Such definitions enable various portions of these implementations to be flexible in hardware requirements and design, yet still provide OSPM with the knowledge it needs to control hardware directly.

Corrected Platform Error Polling Table

Debug Port Table

Event Timer Description Table
IA-PC High Precision Event Timer Table
System Locality Information Table
Serial Port Console Redirection Table
Static Resource Affinity Table
Server Platform Management Interface Table
Trusted Computing Platform Alliance Capabilities Table
5.2.6 Root System Description Table (RSDT)
OSPM locates that Root System Description Table by following the pointer in the RSDP structure. The RSDT, shown in Table 5-6, starts with the signature RSDT followed by an array of physical pointers to other system description tables that provide various information on other standards defined on the current system. OSPM examines each table for a known signature. Based on the signature, OSPM can then interpret the implementation-specific data within the table. Systems provide the RSDT to enable compatibility with ACPI 1.0 operating systems. The XSDT, described in the next section, supersedes RSDT functionality for ACPI 2.0.
ACPI Software Programming Model 97
Table 5-6 Root System Description Table Fields (RSDT) Field Header Signature Length Revision Checksum OEMID OEM Table ID OEM Revision Creator ID RSDT. Signature for the Root System Description Table. Length, in bytes, of the entire RSDT. The length implies the number of Entry fields (n) at the end of the table. 1 Entire table must sum to zero. OEM ID For the RSDT, the table ID is the manufacture model ID. This field must match the OEM Table ID in the FADT. OEM revision of RSDT table for supplied OEM Table ID. Vendor ID of utility that created the table. For tables containing Definition Blocks, this is the ID for the ASL Compiler. Revision of utility that created the table. For tables containing Definition Blocks, this is the revision for the ASL Compiler. An array of 32-bit physical addresses that point to other DESCRIPTION_HEADERs. OSPM assumes at least the DESCRIPTION_HEADER is addressable, and then can further address the table based upon its Length field. Byte Length Byte Offset Description

Creator Revision

98 Advanced Configuration and Power Interface Specification
5.2.7 Extended System Description Table (XSDT)
The XSDT provides identical functionality to the RSDT but accommodates physical addresses of DESCRIPTION HEADERs that are larger than 32-bits. Notice that both the XSDT and the RSDT can be pointed to by the RSDP structure. An ACPI 2.0-compatible OS must use the XSDT if present. Table 5-7 Extended System Description Table Fields (XSDT) Field Header Signature Length Revision Checksum OEMID OEM Table ID OEM Revision Creator ID XSDT. Signature for the Extended System Description Table. Length, in bytes, of the entire table. The length implies the number of Entry fields (n) at the end of the table. 1 Entire table must sum to zero. OEM ID For the RSDTle, the table ID is the manufacture model ID. This field must match the OEM Table ID in the FADT. OEM revision of RSDT table for supplied OEM Table ID. Vendor ID of utility that created the table. For tables containing Definition Blocks, this is the ID for the ASL Compiler. Revision of utility that created the table. For tables containing Definition Blocks, this is the revision for the ASL Compiler. An array of 64-bit physical addresses that point to other DESCRIPTION_HEADERs. OSPM assumes at least the DESCRIPTION_HEADER is addressable, and then can further address the table based upon its Length field. Byte Length Byte Offset Description

The _CRS, _PRS, and _SRS control methods use packages of resource descriptors to describe the resource requirements of devices.
6.4.1 ASL Macros for Resource Descriptors
ASL includes some macros for creating resource descriptors. The ASL syntax for these macros is defined in section 16.2.4, ASL Macros for Resource Descriptors.
6.4.2 Small Resource Data Type
A small resource data type may be 2 to 8 bytes in size and adheres to the following format: Table 6-7 Small Resource Data Type Tag Bit Definitions Offset Byte 0 Field Tag Bit[7] Type0 Bytes 1 to n Data bytes Tag Bits[6:3] Small item name Tag Bits [2:0] Lengthn bytes

Configuration 173

The following small information items are currently defined for Plug and Play devices: Table 6-8 Small Resource Items Small Item Name Reserved Reserved Reserved IRQ format DMA format Start dependent Function End dependent Function I/O port descriptor Fixed location I/O port descriptor Reserved Vendor defined End tag Value 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA0xD 0xE 0xF
6.4.2.1 IRQ Format (Type 0, Small Item Name 0x4, Length=2 or 3)
The IRQ data structure indicates that the device uses an interrupt level and supplies a mask with bits set indicating the levels implemented in this device. For standard PC-AT implementation there are 15 possible interrupts so a two-byte field is used. This structure is repeated for each separate interrupt required. Table 6-9 IRQ Descriptor Definition Offset Byte 0 Byte 1 Field Name Value = 0010001nB (Type = 0, small item name = 0x4, length = (2 or 3)) IRQ mask bits[7:0], _INT Bit[0] represents IRQ0, bit[1] is IRQ1, and so on. Byte 2 IRQ mask bits[15:8], _INT Bit[0] represents IRQ8, bit[1] is IRQ9, and so on.
174 Advanced Configuration and Power Interface Specification Table 6-9 IRQ Descriptor Definition (continued) Offset Byte 3 Field Name IRQ Information. Each bit, when set, indicates this device is capable of driving a certain type of interrupt. (Optionalif not included then assume edge sensitive, high true interrupts) Note: These bits can be used both for reporting and setting IRQ resources. Note: This descriptor is meant for describing interrupts that are connected to PICcompatible interrupt controllers, which can only be programmed for Active-HighEdge-Triggered or Active-Low-Level-Triggered interrupts. Any other combination is illegal. The Extended Interrupt Descriptor can be used to describe other combinations. Bit[7:5] Reserved (must be 0) Bit[4] Interrupt is sharable, _SHR Bit[3] Interrupt Polarity, _LL 0: Active-HighThis interrupt is sampled when the signal is high, or true. 1: Active-LowThis interrupt is sampled when the signal is low, or false. Bit[2:1] Ignored Bit[0] Interrupt Mode, _HE 0: Level-TriggeredThis interrupt is triggered in response to the signal being in a low state. 1: Edge-TriggeredThis interrupt is triggered in response to a change in signal state from low to high. Note: Low true, level sensitive interrupts may be electrically shared, but the process of how this might work is beyond the scope of this specification. Note: If byte 3 is not included, High true, edge sensitive, non-shareable is assumed. See section 16.2.4.1, ASL Macro for IRQ Descriptor, for a description of the ASL macro that creates an IRQ descriptor.

_PRW _PSW _IRC _S1D _S2D _S3D _S4D
Power and Performance Management 209
7.2.1 _PS0 (Power State 0)
This Control Method is used to put the specific device into its D0 state. This Control Method can only access Operation Regions that are either always available while in a system working state or that are available when the Power Resources references by the _PR0 object are all ON. Arguments: None Result Code: None
7.2.2 _PS1 (Power State 1)
This control method is used to put the specific device into its D1 state. This control method can only access Operation Regions that are either always available while in a system working state or that are available when the Power Resources references by the _PR1 object are all ON. Arguments: None Result Code: None
7.2.3 _PS2 (Power State 2)
This control method is used to put the specific device into its D2 state. This control method can only access Operation Regions that are either always available while in a system working state or that are available when the Power Resources references by the _PR2 object are all ON. Arguments: None Result Code: None
7.2.4 _PS3 (Power State 3)
This control method is used to put the specific device into its D3 state. This control method can only access Operation Regions that are always available while in a system working state. A device in the D3 state must no longer be using its resources (for example, its memory space and I/O ports are available to other devices). Arguments: None Result Code: None
210 Advanced Configuration and Power Interface Specification
7.2.5 _PSC (Power State Current)
This control method evaluates to the current device state. This control method is not required if the device state can be inferred by the Power Resource settings. This would be the case when the device does not require a _PS0, _PS1, _PS2, or _PS3 control method. Arguments: None Result Code: The result codes are shown in Table 7-3. Table 7-3 _PSC Control Method Result Codes Result Device State D0 D1 D2 D3
7.2.6 _PR0 (Power Resources for D0)
This object evaluates to a package of the following definition: Table 7-4 Power Resource Requirements Package Object 1 N object reference object reference Description Reference to required Power Resource #0 Reference to required Power Resource #N

For OSPM to put the device in the D0 device state, the following must occur: 1. All Power Resources referenced by elements 1 through N must be in the ON state. 2. All Power Resources no longer referenced by any device in the system must be in the OFF state. 3. If present, the _PS0 control method is executed to set the device into the D0 device state. _PR0 must return the same data each time it is evaluated. All power resources referenced must exist in the namespace.
7.2.7 _PR1 (Power Resources for D1)
This object evaluates to a package as defined in Table 7-3. For OSPM to put the device in the D1 device state, the following must occur: 1. All Power Resources referenced by elements 1 through N must be in the ON state. 2. All Power Resources no longer referenced by any device in the system must be in the OFF state. 3. If present, the _PS1 control method is executed to set the device into the D1 device state. _PR1 must return the same data each time it is evaluated. All power resources referenced must exist in the namespace.
Power and Performance Management 211
7.2.8 _PR2 (Power Resources for D2)
This object evaluates to a package as defined in Table 7-3. For OSPM to put the device in the D2 device state, the following must occur: 1. All Power Resources referenced by elements 1 through N must be in the ON state. 2. All Power Resources no longer referenced by any device in the system must be in the OFF state. 3. If present, the _PS2 control method is executed to set the device into the D2 device state. _PR2 must return the same data each time it is evaluated. All power resources referenced must exist in the namespace.
7.2.9 _PRW (Power Resources for Wake)
This object is only required for devices that have the ability to wake the system from a system sleeping state. This object evaluates to a package of the following definition: Table 7-5 Wake Power Requirements Package Object Type 0 Numeric or package Description If the data type of this package element is numeric, then this _PRW package element is the bit index in the GPEx_EN, in the GPE blocks described in the FADT, of the enable bit that is enabled for the wake event. If the data type of this package element is a package, then this _PRW package element is itself a package containing two elements. The first is an object reference to the GPE Block device that contains the GPE that will be triggered by the wake event. The second element is numeric and it contains the bit index in the GPEx_EN, in the GPE Block referenced by the first element in the package, of the enable bit that is enabled for the wake event. For example, if this field is a package then it is of the form: Package() {\_SB.PCI0.ISA.GPE, 2}
numeric object reference object reference
The lowest power system sleeping state that can be entered while still providing wake functionality. Reference to required Power Resource #0 Reference to required Power Resource #N

11.1.1.4 Smart Battery Selector
The requirements for the Smart Battery Selector are the same as the requirements for the Smart Battery System Manager, with the exception that the contents of the SelectorState() command register (0x01) are used instead of BatterySystemState(). The Smart Battery Selector is a subset of the Smart Battery System Manager and does not have the added support for simultaneous charge/discharge of multiple batteries. The System Manager is the preferred implementation.
Notice that the 1.0 SMBus protocol specification is ambiguous about the definition of the slave address written into the command field of the host controller. In this case, the slave address is actually the combination of the 7-bit slave address and the Write protocol bit. Therefore, bit 0 of the initiating devices slave address is aligned to bit 1 of the host controllers slave command register, bit 1 of the slave address is aligned to bit 2 of the controllers slave command register, and so on.

Power Source Devices 267

11.1.2 Smart Battery Objects
The Smart Battery subsystem requires a number of objects to define its interface. These are summarized below: Table 11-2 Smart Battery Objects Object _HID Description This is the hardware ID named object that contains a string. For Smart Battery subsystems, this object returns the value of ACPI0002. This identifies the Smart Battery subsystem to the Smart Battery driver. This is the Smart Battery named object that contains a DWORD. This named object returns the configuration of the Smart Battery subsystem and is encoded as follows: 0 Maximum of one Smart Battery and no Smart Battery System Manager or Smart Battery Selector. 1 Maximum of one Smart Battery and a Smart Battery System Manager or Smart Battery Selector. 2 Maximum of two Smart Batteries and a Smart Battery System Manager or Smart Battery Selector. 3 Maximum of three Smart Batteries and a Smart Battery System Manager or Smart Battery Selector. 4 Maximum of four Smart Batteries and a Smart Battery System Manager or Smart Battery Selector. The maximum number of batteries is for the system. Therefore, if the platform is capable of supporting four batteries, but only two are normally present in the system, then this field should return 4. Notice that a value of 0 indicates a maximum support of one battery and there is no Smart Battery System Manager or Smart Battery Selector present in the system.
268 Advanced Configuration and Power Interface Specification

ACPI Embedded Controller Interface Specification 309

13.9.2.6 Read Byte

Data Sent: SMB_ADDR: SMB_CMD: SMB_PRTCL: Data Returned: SMB_DATA[0]: SMB_STS: SMB_PRTCL: Data byte received. Status code for transaction. 0x00 to indicate command completion. Address of SMBus device. Command byte to be sent. Write 0x07 to initiate the read byte protocol, or 0x87 to initiate the read byte protocol with PEC.

13.9.2.7 Write Word

Data Sent: SMB_ADDR: SMB_CMD: SMB_DATA[0]: SMB_DATA[1]: SMB_PRTCL: Data Returned: SMB_STS: SMB_PRTCL: Status code for transaction. 0x00 to indicate command completion. Address of SMBus device. Command byte to be sent. Low data byte to be sent. High data byte to be sent. Write 0x08 to initiate the write word protocol, or 0x88 to initiate the write word protocol with PEC.

13.9.2.8 Read Word

Data Sent: SMB_ADDR: SMB_CMD: SMB_PRTCL: Data Returned: SMB_DATA[0]: SMB_DATA[1]: SMB_STS: SMB_PRTCL: Low data byte received. High data byte received. Status code for transaction. 0x00 to indicate command completion. Address of SMBus device. Command byte to be sent. Write 0x09 to initiate the read word protocol, or 0x89 to initiate the read word protocol with PEC.
310 Advanced Configuration and Power Interface Specification

13.9.2.9 Write Block

Data Sent: SMB_ADDR: SMB_CMD: SMB_DATA[0-31]: SMB_BCNT: SMB_PRTCL: Data Returned: SMB_PRTCL: SMB_STS: 0x00 to indicate command completion. Status code for transaction. Address of SMBus device. Command byte to be sent. Data bytes to write (1-32). Number of data bytes (1-32) to be sent. Write 0x0A to initiate the write block protocol, or 0x8A to initiate the write block protocol with PEC.

13.9.2.10 Read Block

Data Sent: SMB_ADDR: SMB_CMD: SMB_PRTCL: Data Returned: SMB_BCNT: SMB_DATA[0-31]: SMB_STS: SMB_PRTCL: Number of data bytes (1-32) received. Data bytes received (1-32). Status code for transaction. 0x00 to indicate command completion. Address of SMBus device. Command byte to be sent. Write 0x0B to initiate the read block protocol, or 0x8B to initiate the read block protocol with PEC.

13.9.2.11 Process Call

Data Sent: SMB_ADDR: SMB_CMD: SMB_DATA[0]: SMB_DATA[1]: SMB_PRTCL: Data Returned: SMB_DATA[0]: SMB_DATA[1]: SMB_STS: SMB_PRTCL: Low data byte received. High data byte received. Status code for transaction. 0x00 to indicate command completion. Address of SMBus device. Command byte to be sent. Low data byte to be sent. High data byte to be sent. Write 0x0C to initiate the process call protocol, or 0x8C to initiate the process call protocol with PEC.

A.7.4 Minimum Power Capabilities
An input device conforming to this specification must support the D0 and D3 states. Support for the D1 state is optional.
A Device Class PM Specifications 441

A.8 Modem Device Class

The requirements expressed in this section apply to modems and similar devices, such as USB controlled ISDN Terminal Adapters (digital modems) and computer-connected telephone devices ("CT phones"). This specification will refer to these devices as modems; the same considerations apply to digital modems and CT phones unless explicitly stated otherwise. The scope of this section is further restricted to modems that support power management using methods defined by the relevant PC-modem connection bus. These include PCI, USB, PCCARD (PCMCIA), CardBus, and modems on the system motherboard described by ACPI BIOS control methods. The scope does not include bus-specific means for devices to alert the host PC (for example, how to deliver a ringing message), nor does it address how those alerting operations are controlled.
A.8.1 Technology Overview
Modems are traditionally serial devices, but today modems may be attached to a PC by many different means. Further, many new modems expose a software serial interface, where the modem controller function is implemented in software. This specification addresses three different connection types: Traditional connections without power-managed connections (for example, COM, LPT, ISA) Power managed connections (for example, PCCARD, CardBus, PCI, USB) Motherboard modems For some of the above modem connection types mentioned, there are three different modem architectures possible: Traditional modem (DAA, DSP, and controller in hardware) Controller-less design (DAA and DSP in hardware) "Soft modem" design (DAA and CODEC only in hardware) The hardware components of the modem shall be controlled by the relevant bus commands, where applicable (USB, PCI, CardBus). The software components are dependent on the power state of the CPU.
A.8.1.1 Traditional Connections
In older methods (COM, LPT, ISA) the modem is controlled primarily by serialized ASCII command strings (for example, V.25ter) and traditional V.24 (RS-232) out-of-band leads. In these legacy devices, there are no common means for power management other than the power switch for the device, or the entire system unit. An external modem connected to a COM port or LPT port typically has its own power supply. An LPT port modem might run from the current on the LPT port +5V supply. For COM or LPT port modems, power is typically controlled by a user switch. The most common modem type is an ISA card with an embedded COM port. From a software standpoint, they are logically identical to external modems, but the modems are powered by the PC system unit. Power is drawn from the ISA bus without independent power switching.

_FDE (Floppy Disk Enumerate) 256 _FDI (Floppy DIsk Information) 257 _FIX (Fixed Register Resource Provider) 159 _GLK (Global Lock) 204 _HID (hardware ID) 156, 267 _HOT (Hot Temperature) 285 _HPP (Hot Plug Parameters) 161 _INI (Init) 199 _IRC (In Rush Current) 212 _LCK (Lock) 171 _MAT (Multiple APIC Table Entry) 163 _PCL (Power Consumer List) 275 _PCT (Performance Control) 229 _PPC (Performance Present Capabilities) 231 _PR0 (Power Resources for D0) 210 _PR1 (Power Resources for D1) 210 _PR2 (Power Resources for D2) 211 _PRS (Possible Resource Settings) 164 _PRT (PCI Routing Table) 165 _PRW (Power Resources for Wake) 142, 211 _PSL (Passive List) 285 _PSR (Power Source) 275 _PSS (Performance Supported States) 230 _PSV (Passive) 277, 286 _PTC (Processor Throttling Control) 225 _PXM (Proximity) 167 _RMV (Remove) 171 _S1D 212 _S2D 212 _S3D 212 _S4D 213 _SBS (Smart Battery Subsystem) 267 _SEG (Segment) 203 _SRS (Set Resource Settings) 167 _STA (Status) 172, 207 _STR (String) 156 _SUN (Slot User Number) 156 _TC1 (Thermal Constant 1) 286 _TC2 (Thermal Constant 2) 286 _TSP (Thermal Sampling Period) 287 _TZD (Thermal Zone Devices) 287 _TZP (Thermal Zone Polling) 287 _UID (Unique ID) 156 ASL encoding 351 ASL statements 335 ASL, declaring 135 control methods 136 data 397 definition 16 device configuration 157 device identification 153 device insertion and removal 167 device power resource 210 device-specific 249 dynamic 137 EC-SMB-HC 314
476 Advanced Configuration and Power Interface Specification
embedded controller interface 313 floppy controller 256 generic 146 global scope 133 initialization 199 Module Device 259 names, reserved 352 Notify operator 143 OS-defined 152 Power Resource 205 processor 225 revision data 152 Smart Battery 267 SMBus host controller 319 static 137 thermal management 284 unnamed 134 ObjectType 335, 394 OEM implementation 3 OEM-supplied control methods 213 off See Mechanical Off; Soft-Off OFF 206 ON 207 One (Constant One Object) 400 Ones (Constant Ones Object) 400 opcodes Type 1, AML 417 Type 1, ASL 375 Type 2, AML 418 Type 2, ASL 382 Operating System See OS Operating System-directed Power Management See OSPM Operation Region data type, ASL 352, 356 Operation Region Field Unit data type, ASL 352, 355 operation regions SMBus 317, 320 OperationRegion term access types 366 Declare Operation Region 371 operators, ASL 352 OpRegion 136 Or (Bit-wise Or) 394 organization, document 10 original equipment manufacturer See OEM OS AML support, required 335 boot flags 108 compatibility requirements 10 defined object names 152 DefinitionBlock compiling 360 device power management 31 drivers, embedded controller interface 293 functional fixed hardware implementation 46 independent generic hardware 47

legacy hardware interaction 3 loading 246 name object 152 policy owner, device power management 431 power management 2 Query System Address Map 334 S4 Sleeping state transition 238 transparent events 52 OSPM caches, flushing 240 cooling policy changes 278 cooling preferences 43 definition 17 device insertion and removal 167 event handlers 53 exclusive controls 26 fixed hardware access 45 fixed hardware registers 71 functions 25 general-event register access 80 generic hardware model 48 Get Power Status 32 goals 1 hardware model 50 implementation requirements 9 passive cooling 280 performance states 36 power management vs. performance 205 power state control 26 Real Time Clock Alarm (RTC) 68 resetting system 78 Set Power State operation 31 SMBus registration 319 thermal management 42, 277 transitioning to sleeping states 235 transitioning working to sleeping states 239 transitioning working to soft-off state 239 Output Buffer Full (OBF) flag 297, 302 output devices control methods 459 definition 452 switching 461 types of 454 override, power button 64 P_BLK 77 P_LVLP_LVLP0 performance state, definition 23 P1 performance state, definition 23 Package (Declare Package Object) 397 Package data type, ASL 352, 356 packages definition 17 length 133 length encoding, AML 414 nested 388
B ACPI Extensions for Display Adapters 477
packet error checking (PEC) 318 parameters, ASL 354 parent bits 53, 78 parent objects, ASL statements 335 parentheses, AML notation 412 Passive (_PSV) object 277, 286 passive cooling definition 43, 277 preferences 43, 282 processor clock throttling 280 threshold values 282 Passive List (_PSL) object 285 PC Card controllers, power management 433, 444 PC keyboard controllers 293 PCCARD 432 PCI BAR target operations 368 bus number 202 buses, address space translation 89 Device Objects code 364 device power management 432 interrupt pins 165 IRQ routing 166 power management 432 PCI configuration space 45, 53 PCI Interrupt Link device 146 PCI Routing Table (_PRT) object 165 PCISIG 432 PCMCIA 432 PEC (packet error checking) 304, 318 Performance Control (_PCT) object 229 Performance Present Capabilities (_PPC) object 231 performance states definitions 23 device 36 Performance Supported States (_PSS) object 230 performance, energy conservation vs. 43, 205 Persistent System Description Table (PSDT) 115 phones, answering modem example 33 power management 2 waking computer 35 PIC method 152 pins general event model 38 GPE 80 platform implementation 5 independence 3 Platform Interrupt Source structure 123 Platform Management Interrupts (PMIs) 123 Plug and Play devices