DUMPING AND COUNTERVAILING DUTIES ACT 1988 DUMPING APPLICATION NON-CONFIDENTIAL
INITIATION REPORT REFRIGERATOR-FREEZERS AND REFRIGERATORS FROM KOREA

PROCEEDINGS

1.1 1.2 1.3 PROCEEDINGS INTERESTED PARTIES IMPORTED GOODS

NEW ZEALAND INDUS TRY

2.1 2.2 2.3 2.4 LIKE GOODS NEW ZEALAND INDUSTRY IMPORTS OF REFRIGERATORS NEW ZEALAND MARKET

EVIDENCE OF DUMPING

3.1 3.2 3.3 EXPORT PRICES NORMAL VALUES COMPARISON OF EXPORT PRICE AND NORMAL VALUE

EVIDENCE OF INJURY

4.1 4.2 4.3 4.4 4.5 IMPORT VOLUMES PRICE EFFECTS ECONOMIC IMPACT OTHER CAUSES OF INJURY CONCLUSIONS RELA TING TO INJURY
CONCLUSIONS RECOMMENDATIONS
Trade Remedies Group Ministry of Economic Development December 2000
ABBREVIATIONS The following abbreviations are used in this Report: Act (the) Amendment Act (the) Anti-Dumping Agreement Chief Executive CIF EBIT F&P FOB LDC LG LLDC Ministry (the) NZCS Pac Samsung VFD WTO YEM _______ Dumping and Countervailing Duties Act 1988 Dumping and Countervailing Duties Amendment Act 1994 WTO Agreement on Implementation of Article VI of the GATT 1994 Chief Executive of the Ministry of Economic Development Cost, Insurance and Freight Earnings Before Interest and Tax Fisher & Paykel Ltd Free on Board Less Developed Countries LG Electronics Least Developed Countries Ministry of Economic Development New Zealand Customs Service Forum Island Members of the South Pacific Regional Trade and Economic Cooperation Agreement Samsung Electronics Value for Duty World Trade Organisation Year Ended March Indicates Confidential Information

1.1 1.1.1

PROCEEDINGS On 7 November 2000, the Ministry of Economic Development accepted a properly documented application from Fisher & Paykel Ltd (F&P), alleging that imports of household type refrigerators and refrigerator-freezers from Korea were being dumped and by reason thereof causing and threatening to cause material injury to the New Zealand industry. In accordance with section 10 of the Dumping and Countervailing Duties Act 1988 (hereinafter also referred to as the Act), the Chief Executive of the Ministry of Economic Development (Chief Executive) may, on receipt of an application from the industry, initiate an investigation to determine both the existence and effect of any alleged dumping of any goods on being satisfied that sufficient evidence has been provided that: (a) (b) the goods imported or intended to be imported into New Zealand are being dumped; and by reason thereof material injury to an industry has been or is being caused or is threatened or the establishment of an industry has been or is being materially retarded.
In considering an application, the Chief Executive is required to be satisfied that there is evidence going beyond mere assertion and of a nature and extent that indicates a likelihood of dumping and resultant material injury, and requiring investigation. The evidence is to be scrutinised with due scepticism, bearing in mind the commercial context, and the Chief Executive is to be satisfied of the sufficiency of the evidence, not of dumping or material injury. Basis for the Application
F&P claims that as a result of the alleged dumping, material injury is resulting from: increased volume of the allegedly dumped imports; price undercutting, price depression, and price suppression,
and is resulting in: 1.1.5 decline in sales; decline in market share; decline in profits; decline in return on investments.

1.3 1.3.1

Household type combined refrigerator-freezers fitted with separate top and bottom external doors or drawers up to and including a total gross volume of 500 litres and single door refrigerators with a total gross volume of not less than 60 litres, the capacities determined by standard AS/NZS4474.1997 1.3.2 The New Zealand Customs Service (NZCS) has stated that the subject goods enter under the following tariff classifications: 8418 Refrigerators, freezers and other refrigerating or freezing equipment, electric or other: heat pumps other than air conditioning machines of heading No. 84.15 Combined refrigerator-freezers, fitted with separate external doors

8418.10.00

02C 05H 07D 11B 14G 8418.21.00 01C 03K 05F 07B 12J 1.3.3
. Compression type:. Less than 200 litres gross internal capacity. 200 litres and over but less than 300 litres gross internal capacity. 300 litres and over but less than 400 litres gross internal capacity. 400 litres and over but less than 500 litres gross internal capacity. 500 litres and over gross internal capacity Refrigerators, household type:. Compression type:. Less than 200 litres gross internal capacity. 200 litres and over but less than 300 litres gross internal capacity. 300 litres and over but less than 400 litres gross internal capacity. 400 litres and over but less than 500 litres gross internal capacity. 500 litres and over gross internal capacity
Applicable duty rates are: Normal Australia Canada LDC LLDC Pac 7% Free 3% 5.5% Free Free
In this report, unless otherwise stated, years are March years and dollars values are NZ$. In tables, column totals may differ from individual figures because of rounding. The period for considering claims of dumping is 1 November 1999 to 31 October 2000. This was the period for which NZCS data as close as practicable to the date of initiation was available.
The applicant claims that material injury commenced in the year ended March 2000 and that injury is threatened. The period over which injury will be considered is 1 April 1997 to 30 September 2000, but may include more recent information if available. The application also refers to a threat of injury and threat will be evaluated if actual injury is not established. In evaluating threat of material injury the investigating team will consider information relating to the likely effect of the allegedly dumped imports in addition to historical information. It should be noted that the inclusion of any information in this report does not indicate that the Ministry necessarily accepts that information or any conclusions arising from it. Any final determination of whether or not goods are dumped and causing injury can be made only after a full investigation carried out in accordance with the Act.

Type Fridge-freezer with top mounted refrigerator Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Single door refrigerator Single door refrigerator Fridge-freezer with bottom mounted refrigerator

Capacity (litres) 115

Significant Features Automatic defrost, stainless steel option Frost free, wider door shelves Frost free, wider door shelves, stainless steel option Automatic cyclic defrost, wider door shelves, stainless steel option Push button defrost, wider door shelves, stainless steel option Frost free, intelligent electronics, butter conditioner (not all models) Frost free, intelligent electronics, butter conditioner (not all models) Automatic defrost, roll out fruit and vegetable drawer Automatic defrost, humidity controlled fruit and vegetable bin Frost free, humidity controlled fruit and vegetable bin

329, 380, 411, 404, 411

Fridge-freezer with top mounted refrigerator Fridge-freezer with top mounted refrigerator Single door refrigerator Single door refrigerator

373, 403, 442, 367 450

Imported Goods 2.1.4 F&P has also provided catalogues produced for the New Zealand market showing details of LG and Samsung refrigerator-freezers and refrigerators. These catalogues list the following models: LG Models Model Type Number GR293 Fridge-freezer with TBF bottom mount refrigerator
Capacity Significant Features (litres) 303 No frost, soft touch drawers in freezer
GR 349SQF GR 389SQF GR 403S
GR 432S GR 372S GR 282S GR 242S

GR 182S GR 131S GR 151S

Fridge-freezer with bottom mount refrigerator Fridge-freezer with bottom mount refrigerator 3 door fridge-freezer with top mount refrigerator Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Single door refrigerator Single door refrigerator

245 215

No frost, neuro fuzzy control system, bottle holder No frost, neuro fuzzy control system, bottle holder No frost, automatic defrost, 4 in 1 compartment No frost, automatic defrost, quick freezing compartment No frost, automatic defrost, quick freezing compartment No frost, automatic defrost No frost, automatic defrost No frost, automatic defrost Separate freezer compartment Separate freezer compartment Fuzzy logic climate control, 2 fans & evaporators, frost free, chilled water dispenser Frost free, large vegetable drawer with moisture control Frost free, large vegetable drawer with moisture control Frost free, large vegetable drawer with moisture control Frost free, large vegetable drawer with moisture control Separate freezer compartment

Samsung Models SRFridge-freezer with top L628EV mounted refrigerator Cool tech SRG V43 Cool tech SRG V33 Cool tech SRG V39 Cool tech SRG V29 SRG 118 2.1.5 Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Fridge-freezer with bottom mounted refrigerator Single door refrigerator

Not shown 390

260 96
It is unclear if the LG and Samsung models represent the entire range imported into New Zealand, but for the purposes of initiation the models listed above give a reasonable picture of the types of product available.
Like Goods Considerations 2.1.6 In deciding like goods issues the Ministry takes into account the following considerations: a. Physical characteristics, which covers appearance, size and dimensions, components, production methods and technology. b. Function/usage. This covers consumer perceptions/expectations, end uses, and will lead to any conclusions on the issue of substitutability where relevant. c. Pricing structures. d. Marketing issues such as distribution channels and customers advertising. e. Other. This can include tariff classification if applicable, and any other matters which could be applicable in the circumstances. 2.1.7 This framework will be used to consider what goods produced in New Zealand are like goods to the allegedly dumped imports. Physical Characteristics 2.1.8 The models detailed in the catalogues have the same general appearance as those produced by F&P. The capacity of the imported models range from 95 to 400 litres. The capacity of the F&P models range from 115 to 450 litres. F&P has not provided any detailed information on the production methods of either the subject goods or its own goods, but is considered unlikely, given the physical similarities, that there are any significant differences in production methods. Any investigation should examine whether there are any significant differences in production methods. Technology features such as frost free, automatic defrost, humidity controlled fruit and vegetable bins and computer climate control appear to be present in both the subject goods and the F&P models. Any investigation should, however, examine whether there are any significant differences in the technology used in the subject goods and the F&P models. Function and Usage 2.1.10 No information is available on consumer perceptions or expectations. The end use of the subject goods and the F&P models is obviously the same and it is clear that the F&P models are readily substitutable for the subject goods. Pricing Structures 2.1.11 While F&P are claiming that the subject goods are undercutting its product (see below), the difference in prices is not such as to indicate that the subject goods are a distinctly different product.

2.1.9.1

Marketing Issues 2.1.12 Both the subject goods and the F&P models are distributed through dealers that sell directly to consumers. F&P advises that it has three warehouses from which it supplies its dealers. No information is available on whether importers use a warehousing system or supply direct to dealers, but any difference in the use of warehouses is unlikely to be significant in considering like goods. F&P dealers operate on an exclusive basis, i.e. they stock only F&P product. Media comment by importers of the subject goods indicates that they do not operate on an exclusive basis, but on its own such a difference is not considered to be a significant determinant in deciding a like goods issue in this case. Other Relevant Matters 2.1.13 It is likely that the refrigerator-freezers and refrigerators produced by F&P would be classified under the same tariff item as the subject goods. Conclusions Relating to Like Goods 2.1.14 On the basis of the information available, the Ministry considers that the refrigerator-freezers and refrigerators produced by F&P, while not identical to the subject goods, have characteristics closely resembling the subject goods and are therefore like goods to the subject goods. NEW ZEALAND INDUSTRY An investigation may not be initiated unless the Chief Executive is satisfied that the requirements of section 10(3) of the Act are met. These requirements are that the collective output of those New Zealand producers who have, in writing, expressed support for the application constitutes: (a) Twenty-five percent or more of the total New Zealand production of like goods produced for domestic consumption (assessed during the most recent representative period, being not less than six months); and More than 50 percent of the total production of like goods produced for domestic consumption (as so assessed) by those New Zealand producers who have, in writing, expressed support for or opposition to the application.

2.2 2.2.1

The application was submitted by Fisher & Paykel Ltd. The Ministry is aware that there is only one manufacturer of household type refrigerator-freezers and refrigerators in New Zealand and research supports this fact. The Ministry is therefore satisfied that F&P has the standing to make an application by or on behalf of the domestic industry. IMPORTS OF REFRIGERATORS F&P has provided Statistics New Zealand import volume figures for the March years 1998 to 2000, and the 4 months to-July 1999 and 2000. Statistical keys for imports were amended in 1998 and comparative statistical keys are not

2.3 2.3.1

available for 1997. F&P imports small bar type (single door) refrigerators from Daewoo in Korea. F&P advises that the refrigerators it imports from Korea have capacities of 47 litres and 74 litres. The 74 litre refrigerators fall within the definition of subject goods. Based on an analysis of F&Ps sales of the refrigerators it imports from Korea, the volume of the subject goods imported by F&P has been estimated at __ percent of its imports from Korea. The remaining __ percent of its imports have been deducted from the Korean import figures. These figures are shown in the table below. Table 2.1: Import Volumes of Subject Goods (March Years) 2000 Apr-Jul 2000 12,459 11,645 15,416 6,910
Imports from Korea - F&P Korea imports Net subject goods Other imports Total imports 2.3.2

26,593

32,899

33,251

Section 11(1) of the Act provides that where the Minister is satisfied in respect of some or all of the goods under investigation, that there is insufficient evidence of dumping or injury to justify proceeding with the investigation then the investigation shall be terminated. Section 11(2) of the Act provides that evidence of dumping shall be regarded as insufficient if the volume of imports of dumped goods, expressed as a percentage of total imports of like goods into New Zealand, is negligible, having regard to New Zealands obligations as a party to the Anti-Dumping Agreement. The Code deals with the negligibility of dumped imports under Article 5:8 as follows:

3.1 3.1.1 3.1.2

EXPORT PRICES Export prices are determined in accordance with section 4 of the Act. The applicant advises it does not have access to actual export prices and has therefore constructed export prices by starting with retail prices in New Zealand and making deductions to obtain estimated Korean ex-factory prices. The applicant further states that it has extensive knowledge of the costs of distributing imported product in New Zealand. F&P has provided a constructed export price for four Samsung refrigeratorfreezers, one Samsung single door refrigerator, three LG refrigerator-freezers and one LG single door refrigerator. F&P states that it has not endeavoured to calculate export prices for all models imported from Korea as this information is not reasonably available to it. Retail Prices
F&P obtained the retail prices for Samsung models from a Noel Leeming catalogue, a copy of which was supplied with the application. F&P states that no promotional material was available for LG refrigerators, the prices being obtained from store visits. Retailers margin
A retailers margin of ___ percent has been allowed for both Samsung and LG. F&P advises that this margin is based on an analysis of the margins taken by ___________________________________________, on a sample of models sold by _______ in June and October 2000. F&P provided details of this margin analysis in its application. Distributors Warranty
An amount of __ percent for distributors warranty costs has been allowed for both Samsung and LG. F&P states that this is the accepted figure for warranty provision in the whiteware business. Freight from Distributor to Retailer
Amounts of ___ percent and ____ percent have been allowed for Samsung and LG respectively. F&P states that a nominal amount has been allowed for Samsung as the Samsung distributors, Noel Leeming, warehouse and ship to
their own stores and the cost of freight is therefore covered by the retailers margin. F&P states that the freight cost for LG is based on its freight costs in Australia, ______________________________________________________ ___________________________ Distributors Advertising 3.1.8 An amount of ___ percent has been allowed for advertising for both Samsung and LG. F&P states that it is an industry norm for distributors to contribute _______ percent towards retail advertising. In addition F&P states that the distributor also advertises the brand generally and supports retail promotions which makes up the remainder. F&P considers the amount allowed is probably conservative given the low volume and the need for a certain dollar spend to have any impact. Distributors Selling and Administration Overhead 3.1.9 Amounts of _____ percent and ____ percent have been allowed for Samsung and LG respectively. F&P states that this cost is to cover local sales representation and administration costs. F&P states that this cost has been set lower for Samsung because the product is received directly by the retailer. F&P states that the figures are based on a conservative view of their own costs. Distributors Net Profit 3.1.10 An amount of _____ percent has been allowed for both Samsung and LG. F&P states that This is a conservative estimate of the net profit that a distributor would expect to make for their role in the transaction. In support of this estimate F&P has provided a copy of report _____________________ _______________________________________________ Sea Freight Korea to New Zealand 3.1.11 F&P has based the cost of sea freight on its costs of shipping a 40 foot, high cube container from Korea to New Zealand of US$_____ F&P provided a copy of freight invoice relating to its own imports of whiteware from Korea to substantiate this amount. F&P has calculated the cost per refrigerator on the number able to fitted into this type of container, based on its own shipments of equivalent models. Port Service and Customs Charges 3.1.12 F&P states that this amount is based on known costs for a shipment of refrigerators from Korea and provided an invoice to substantiate the amount allowed. F&P further states that the costs are allocated on the basis of one container per shipment, the costs varying for each model depending on the number of refrigerators of each model able to be fitted into a container. Insurance 3.1.13 An amount for insurance has been allowed at ____ percent for both Samsung and LG. F&P states this is based on known costs for a shipment of refrigerators from Korea.

Import Duty 3.1.14 An amount for import duty has been allowed at the current rate for imports of the subject goods from Korea of 5.5 percent. Freight from Factory to Wharf in Korea 3.1.15 An amount of ___ percent has been allowed for both Samsung and LG. Exchange Rates 3.1.16 In its application F&P converted the NZ dollar FOB price to Korean won at the Customs exchange rate effective on 18 September 2000 of 1NZ$ = 470.07 Korean won. Since then the won has appreciated against the NZ dollar which would have the effect of further reducing the export price in won. For the purposes of initiation the exchange rate at 18 September has been used. Calculation of Constructed Export Prices 3.1.17 The calculation of constructed export prices on the basis set out above is shown in the tables below.
Table 3.1: Constructed Export Prices Samsung Refrigerator-Freezer Models Capacity Range (litres) Actual Capacity (litres) Korean Model No. Equivalent NZ Model No. Advertised discounted price Less: GST (12.5%) Less: Retailer's margin (___%) Invoice price ex-distributor to retailer Less: Warranty (_%) Less: Freight (__%) Less: Advertising (_%) Less: Selling & admin. Overhead (_%) Less: Profit (_%) Landed cost Less: Freight to NZ Less: Port Service Charges Less: Customs charges Less: Insurance (___%) Less: Import duty (5.5%) Less: Freight to wharf (__%) Ex-Factory Export Price (NZ$) Convert @ NZ$ = 470.07 won (Customs rate @ 18/9/00) 446.28 209,781 437.14 205,487 484.65 227,819 537.03 252,444 563.88 265,063 200-300 200-300 300-400 300-400 300-400
401 SR-2316D SR-2719D SR-3219D SR-3619D SR-3619D SRGV29 SR30RMC SR37RMC SRGV43 SR44RMB 899.95 99.99 799.96 899.95 99.99 799.96 999.95 111.11 888.84 1099.95 122.22 977.73 1149.95 127.77 1022.18
Table 3.2: Constructed Export Price Samsung Single Door Refrigerator Capacity (litres) 88 Korean Model No. Equivalent SR-A0909 NZ Model No. SRG118 Advertised discounted price 399.95 Less: GST (12.5%) 44.44 355.51 Less: Retailer's margin (___%) Invoice price ex-distributor to retailer Less: Warranty (_%) Less: Freight (__%) Less: Advertising (_%) Less: Selling & admin. Overhead (_%) Less: Profit (_%) Landed cost Less: Freight to NZ Less: Port Service Charges Less: Customs charges Less: Insurance (__%) Less: Import duty (5.5%) Less: Freight to wharf (__%) Ex-Factory Export Price (NZ$) Convert @ NZ$ = 470.07 won (Customs rate @ 18/9/00)

179.95 84,588

Table 3.3: Constructed Export Prices LG Refrigerator-Freezer Models Capacity Range (litres) 200-300 300-400 300-400 Actual Capacity (litres) 392 Korean Model No. Equivalent R-B23DD R-B31DD R-B36DD NZ Model No. GR242MF GR372S GR432S Advertised discounted price 799.00 1099.00 1199.00 Less: GST (12.5%) 88.78 122.11 133.22 710.22 976.89 1065.78 Less: Retailer's margin (__%) Invoice price ex-distributor to retailer Less: Warranty (_%) Less: Freight (_%) Less: Advertising (_%) Less: Selling & admin. Overhead (_%) Less: Profit (_%) Landed cost

96L R-A10DD GR131S 218,000 187,480

121,760

3.2.15
The Ministry considers that the information on normal values provided by F&P is sufficient for the purposes of initiation. COMPARISON OF EXPORT PRICE AND NORMAL VALUE The following table summarises the information provided on export prices and normal values and shows the margins of dumping.

3.3 3.3.1

Table 3.9: Dumping Margins (won) NZ Model Capacity Normal Export Dumping DM as % (litres) Value Price Margin EP Samsung SRG118 <200 118,850 84,588 34,262 41% SRGV29 200-300 207,825 209,781 Not Not Dumped Dumped SR30RMC 200-300 240,298 205,487 34,811 17% SR37RMC 300-400 285,760 227,819 57,941 25% SRGV43 300-400 332,521 252,444 80,077 32% SR44RMB 400-500 332,521 265,063 67,457 25% LG GR-131S <200 121,760 87,244 34,516 40% GR242MF 200-300 204,578 166,818 37,760 23% GR372S 300-400 282,513 231,673 50,840 22% GR432S 300-400 331,222 251,205 80,017 32% 3.3.2 The evidence provided shows that the alleged margins of dumping, except for Samsung model SRGV29, are not de minimis in terms of Article 5.8 of the Agreement as set out above. The Ministry is satisfied on the basis of the information provided that the comparison of export prices and normal values provides sufficient evidence of dumping for the purposes of initiation in respect of the importation of the subject goods from Korea. Any investigation will need to give consideration to the provisions of section 4 (export price) and section 5 (normal value) of the Act as they should apply, and in particular to the application of the appropriate adjustments required by section 4(1)(a)(i) and (ii) and section 5(3).
The basis for considering material injury is set out in section 8(1) of the Act:
8. Material injury to industry(1) In determining for the purposes of this Act whether or not any material injury to an industry has been or is being caused or is threatened or whether or not the establishment of an industry has been or is being materially retarded by means of the dumping or subsidisation of goods imported or intended to be imported into New Zealand from another country, the [Chief Executive] shall examine (a) The volume of imports of the dumped or subsidised goods; and (b) The effect of the dumped or subsidised goods on prices in New Zealand for like goods; and (c) The consequent impact of the dumped or subsidised goods on the relevant New Zealand industry.
IMPORT VOLUMES Section 8(2)(a) of the Act provides that the Chief Executive shall have regard to the extent to which there has been or is likely to be a significant increase in the volume of imports of dumped or subsidised goods either in absolute terms or in relation to production or consumption in New Zealand.
F&P has provided Statistics New Zealand import volume figures for the March years 1998 to 2000, and the 4 months to July 1999 and 2000. F&P has estimated import volumes from Korea for the year ending March 2001. Statistical keys for imports were amended in 1998 and comparative statistical keys are not available for 1997. F&P states that some of its model range is manufactured in Australia and it therefore imports those models from Australia. F&P also states that it imports small bar type (single door) refrigerators from Daewoo in Korea and General Electric side by side models from the USA. F&P also advise that it has imported a small number of other models from other countries generally for the purpose of evaluating samples. F&P provided the volume of refrigerators imported from each country from 1998 and a forecast of the volume it intends to import in the year ended 2001. To estimate the total market for the year ended March 2001, F&P states that it has calculated a total estimated market figure taking into account historical trends, estimated housing starts and demographics. F&P states that the growth in Korean imports has been estimated by annualising the first 4 months of the year ended March 2001. F&P notes that annualising on this basis may understate imports from Korea as in the last two years imports from Korea (and all other countries) in the second 6 months of years ended March have been significantly greater than the first six months. F&P comments that this pattern is driven by seasonal factors and has provided the relevant import volume data to demonstrate this pattern. The following table shows the volume of imports of the subject goods into New Zealand over the period 1998 to 2000, and for the 4 months to July 2000

4.2.1.3

4.2.1.4
Samsung Model Capacity (litres) Price to Dealer F&P Model Capacity (litres) Price to Dealer Undercutting % F&P Price 4.2.1.5
F&P considers that the extent of price undercutting has been understated because it has substantially reduced the selling price of some models since the subject goods began taking market share. F&P gives as an example the drop in price to ________ from September 1999 to June 2000 of its C250T model from ______ to ______ LG

4.2.1.6

F&P states it has taken the same approach as that taken with the Samsung models, and notes that the same comments above relating to its model C250T also apply to its price comparison with LG. Details of the price comparison with LG models are shown in the table below.
Table 4.3: Price Undercutting LG LG Model GR242MF GR242MF GR372S GR432S Capacity (litres) Price to Dealer F&P Model N249T C250T E331T E381T Capacity (litres) Price to Dealer Undercutting % F&P Price 4.2.1.7 There is evidence that the prices of the allegedly dumped Samsung imports in the _____ sizes (______ litres) are significantly undercutting the prices of the New Zealand industry. In the ______ sizes (_______ litres), there is either no evidence of price undercutting or evidence of only negligible price undercutting by the allegedly dumped Samsung imports. There is evidence that the prices of the allegedly dumped LG imports are significantly undercutting the prices of the New Zealand industry. The Ministry notes the comment by F&P that it has significantly reduced its prices for some models in response to the allegedly dumped imports and therefore price undercutting is understated. Any investigation will need to consider the extent to which F&Ps selling prices have been suppressed by the allegedly dumped imports and if so, consider whether a price comparison should be made using F&Ps unsuppressed selling prices. Any investigation will also need to consider obtaining information on F&Ps overall average selling prices (rather than prices to one customer) either on a per model or group of similar models basis. Price Depression Section 8(2)(c) of the Act provides that the Chief Executive shall have regard to the extent to which the effect of the dumped or subsidised goods is or is likely significantly to depress prices for like goods of New Zealand producers. 4.2.2.1 4.2.2.2 Price depression occurs when prices are lower than those in a market unaffected by dumping, usually in a previous period. F&P states that imports of the allegedly dumped goods increased substantially in the four months to July 2000 compared with the same period in the previous year. F&P estimates that in the year ended March 2001, imports of the allegedly dumped goods will be more than 20,000 units, which it states will be an increase of nearly 34 percent. F&P states that to offset the loss of volume arising from price undercutting it has reduced its prices to ensure that sufficient volumes are manufactured in its Auckland plant. F&P has provided its average selling prices per unit, excluding stainless steel models, for the four months ended July 1999 and July 2000 to illustrate the depression of its prices which it attributes to the allegedly dumped imports. These prices are shown in the table below.

4.2.2.9

more than offset by increases in prices in other models. When the overall results are considered, i.e., including both white and stainless models, there is no evidence of price depression, whether whole year March figures or four month to July figures are considered. The Ministry notes that F&P claim that there has a recent decline in the average price of stainless models, but it appears from the statement made by F&P that this results from ___________ ________________________________________ Any investigation should examine whether changes in product mix have affected the average per unit selling price. 4.2.3 Price Suppression Section 8(2)(c) of the Act also provides that the Chief Executive shall have regard to the extent to which the effect of the dumped or subsidised goods is or is likely significantly to prevent price increases for those goods that otherwise would have been likely to have occurred. 4.2.3.1 The Ministry generally bases its assessment of price suppression on positive evidence, in particular the extent to which cost increases have not been recovered in prices. Cost increases not able to be recovered by price increases will be reflected by an increased ratio of costs to sales revenue. Where cost savings have been made, the lack of any price increase will not normally be regarded as price suppression. While the inability to recover cost increases in prices is the main indicator of price suppression, the Ministry will consider any other factors raised as positive evidence of price suppression. F&P states that prior to the October 2000 price increase it had lowered its prices in order to remain competitive and to ensure that volumes were maintained in the factory. F&P has provided a table comparing prices and costs for the four months ended July 2000 with the same period in 1999. F&P states the figures exclude stainless steel models because these models were not in the market in the April July 1999 period. The figures are shown in the table below. Table 4.7: Price Supression (Excluding Stainless Steel Models) April - July 1999 April - July 2000 Average selling price Cost of production Gross margin Other costs Total costs As a % of sales - cost of production - other costs - total costs 4.2.3.3

4.2.3.2

Change

F&P provided the following table showing actual and forecast prices and costs showing separate data when stainless models are included and excluded.
1998 Actual Average selling price Cost of production Gross margin Other costs Total costs As a % of sales: - cost of production - other costs - total costs
Table 4.8: Price Suppression (Years Ended March) Actual 2001 Forecast No Price Increase Actual Excluding Including S/S S/S Excluding S/S
2001 Forecast With Price Increase
Including Excluding Including S/S S/S S/S

4.2.3.4

F&P states that in 1999 its refrigeration business incurred some difficulties with the new door styling and manufacturing problems associated with its active smart refrigerators. F&P states that this resulted in a fall in gross margin of ________ meaning the cost of production increased significantly between 1998 and 1999. F&P provided an extract from its 1999 annual report to substantiate this point, although the annual report refers to an adverse impact of $8 million before tax resulting from lost sales and additional costs. Because of this F&P considers that costs in 2000 should be compared with those in 1998 to give a true indication of the impact of dumping. ______________________________________________________________ ______________________________________________________________ ________________________ F&P further states that ___________________ ____ there will still be a significant increase in total costs relative to sales especially when compared with 1998. Total sales in 1999 were ______ The ___________ fall in gross margin amounts to ______ per unit. Assuming that the average selling price was not affected by the production problems, the impact of the production problems would be to increase the cost of production by ______ If the cost of production for 1999 is adjusted by _____, cost of production falls to __ percent of sales, and total costs fall to __ percent of sales. On this basis there has been only a small increase in costs of production as a percentage of sales from 1999 to 2000, when stainless steel models are considered. On the same basis, when total costs are considered as a percentage of sales, there has been no change from 1999 to 2000. Any investigation will need to consider whether 1999 costs figures, adjusted for the impact of the new door production problems, can be used as a base year to assess the impact of dumping, and if so, how the 1999 figures should be adjusted. When the 2000 costs in relation to sales are compared with the 1998 figures, as F&P consider they should, then there is evidence that prices have been suppressed. The forecast figures, even with the price increase staying in place, indicate there will be a significant increase in costs as a percentage of sales.

Change from prior period:

4.3.2.3

12,459 26,593

11,645 32,899

15,416 33,251

4,036 9,627

6,910 6,383
NZ Market - Excluding s/s - Including s/s Domestic Production - Excluding s/s - Stainless Total Domestic Production Imports - Net imports Korea - Other countries Total net imports
% market share (ex-s/s) held by:
Imports - Net imports Korea - Other countries Total imports Domestic Production - Excluding s/s
% market share (inc-s/s) held by:
- Net imports Korea - Other countries Total imports Total Domestic Production

4.3.2.4

As noted variously above, the Ministry considers that injury must be assessed in relation to data covering all like goods. When total domestic production is considered, the table shows that while the allegedly dumped imports have increased their market share, this has largely been at the expense of imports from other countries. The market share held by the New Zealand industry declined from 1998 to 1999. From 1999 the market share held by the New Zealand industry has been at about the same level when total production figures are considered. There is no evidence of a significant decline in the market share held by the New Zealand industry over the period since injury is claimed to have commenced. F&P has provided a market share forecast for the year ended March 2001. This forecast shows a decline in F&Ps market share, taking account of total production, to __ percent, but this decline is not apparent in the first 4 months of that year (i.e., from April to July 2000). There is not sufficient evidence that an actual decline in the New Zealand industrys market share has occurred. F&P has forecast a decline in market share for the year ended March 2001 but this forecast decline is not apparent in the first four months of that year. Profits Changes in net profits reflect changes in prices, sales volumes or costs. Dumped or subsidised imports can impact on any or all of these. If possible, the extent of any decline in profit will be measured against the level achieved in the period immediately preceding the commencement of the dumping. In an investigation, the Ministrys assessment of the impact of dumped imports is based on an examination of trends in actual profits in order to establish whether or not there is an actual or potential decline in profits. In some circumstances it may be possible to determine that injury is being caused where profits are not declining, but that would depend on the circumstances of the case, and would need to be based on positive evidence. Such an impact would also need to be attributable to the dumping of imports. F&P states that imports of the allegedly dumped goods in the four months to July 2000 have increased by more than 70 percent compared with the same four months in 1999 and this has had a dramatic effect on the profitability of its refrigeration business __________________________________________ ________ The table below shows an analysis of the actual earnings before interest and tax, showing both white and stainless steel figures separately and in total. Table 4.12: Earnings Before Interest and Tax ($000) (Years Ended March) Apr-Jul AprJul 00 EBIT ($000') - Excl s/s - Incl s/s As a % of revenue: - Excl s/s

4.3.2.5

4.3.2.6

4.3.3 4.3.3.1

4.3.3.2

4.3.3.3

4.3.3.4
- Incl s/s Per Unit: - Excl s/s - Incl s/s Change from prior period: - EBIT excl s/s - EBIT incl s/s Change from 1998 EBIT: - Excl s/s - Incl s/s 4.3.3.5
F&P states that the fall in EBIT in 1999 resulted from the production problems referred to previously (see paragraph 4.2.3.4 above under price suppression). There is evidence that profits have declined significantly in total, relative to sales revenue and per unit, in 2000 (compared to 1998) and in the 4 months ended July 2000 (compared to the same period the previous year). This decline in EBIT coincides with a significant increase in import volumes of the subject goods. F&P has forecast EBIT for the year ended March 2001, on the basis of ___ _________________________________________________ Without a price increase _________________ With a price increase a profit is forecast but is significantly lower than the profit for 2000 and 1998. There is sufficient evidence of a significant decline in profits. The Ministry also notes that in the 4 months ended July 2000, there was a ______________________________________________________________ ______________________________The forecasts for the year ended March 2001, _________________________________________________________ ______________________________________________________________ ______________________________________________________________ ______________ F&P has commented that its stainless steel models have, ________________________________ indicating that factors other than the allegedly dumped goods may be affecting F&Ps results ________________ _______, and this should be considered in any investigation. Productivity F&P states that it has not addressed the relationship between the output of goods and the inputs of resources used to produce them, as it considers it has already provided sufficient evidence for initiation of actual material injury and threat of material injury. Return on Investments A decline in return on investments will result from a decline in returns with or without a relative increase in the investment factor being used. Movements in the return on investments affect the ability of the industry to retain and attract investment.

4.3.3.6

4.3.3.7 4.3.3.8

4.3.4 4.3.4.1

4.3.5 4.3.5.1

4.3.5.2

F&P comments that it has not yet completed the apportionment of fixed assets to the refrigerator business to allow a meaningful comment at this stage. F&P states that It is evident, however, that the rapid reduction in EBIT will result in the return on investment being substantially less. Utilisation of Production Capacity The utilisation of production capacity reflects changes in the level of production, although in some cases it will arise from an increase or decrease in production capacity. In either case, a decline in the utilisation of production capacity will lead to an increase in the unit cost of production, and a consequent loss of profit. F&P states that This is not expected to change given F&Ps move to protect volume market share. Other Adverse Effects In considering other adverse effects, the Ministry considers actual and potential effects on cash flow, inventory, employment, wages, growth, ability to raise capital, and investment. F&P states that it recognises that dumped imports can have a measurable impact on the factors listed above. F&P considers for the purpose of initiation, however, there is sufficient evidence of injury for initiation without addressing all the factors referred to above. F&P comments that it employs _____________________________________ ______________________________________________________________ ______________________________________________________________ ___________________________________________ OTHER CAUSES OF INJURY Sections 8(2)(e) and (f) of the Act provide that the Chief Executive shall have regard to factors other than the dumped goods which have injured, or are injuring, the industry, including (i) The volume and prices of goods that are not sold at dumped prices; and (ii) Contraction in demand or changes in the patterns of consumption; and (iii) Restrictive trade practices of, and competition between, overseas and New Zealand producers; and (iv) Developments in technology; and (v) Export performance and productivity of the New Zealand producers; and the nature and extent of importations of dumped or subsidised goods by New Zealand producers of like goods, including the value, quantity, frequency and purpose of any such importations. Non-dumped Imports

P9.3 P9.2 P9.1 P9.0 P8.7 P8.6 P8.5 P8.4 P8.3 P8.2 P8.1 P8.0 P7.7/TxD P7.6/RxD P7.5/SO3 P7.4/SI3 P7.3/SCK3 P7.2/SO2 P7.1/SI2 P7.0/SCK2
P9.4 P9.5 P9.6 P9.7 P10.0/INT8 P10.1/INT9 P10.2/INT10 P10.3/INT11 P10.4/INT12 P10.5/INT13 P10.6/INT14 P10.7/INT15 P11.0 P11.1 VDD VSS1 XOUT XIN TEST XTIN XTOUT nRESET P0.0/INT0 P0.1/INT1 P0.2/INT2 P0.3/INT3 P0.4/INT4 P0.5/INT5 P0.6/INT6 P0.7/INT7

S3CC34D/ S3FC34D

(100-QFP-1420C)
P6.7/SO1 P6.6/SI1 P6.5/SCK1 P6.4/SO0 P6.3/SI0 P6.2/SCK0 P6.1 P6.0 P5.7/AD15 P5.6/AD14 P5.5/AD13 P5.4/AD12 P5.3/AD11 P5.2/AD10 IVCREF VSS2 P5.1/AD9 P5.0/AD8 P4.7/AD7 P4.6/AD6 P4.5/AD5 P4.4/AD4 P4.3/AD3 P4.2/AD2 P4.1/AD1 P4.0/AD0 P3.7 P3.6 P3.5 P3.4
Figure 1-2. S3CC34D/FC34D Pin Assignments (100-QFP-1420C)
P1.0/T0CLK P1.1/T0CAP P1.2/T0OUT/T0PWM P1.3/T1CLK P1.4/T1CAP P1.5/T1OUT/T1PWM P1.6/T2CLK P1.7/T2CAP P2.0/T2OUT/T2PWM P2.1/T3CLK P2.2/T3CAP P2.3/T3OUT/T3PWM P2.4/T4CLK P2.5/T4CAP P2.6/T4OUT/T4PWM P2.7/T5CLK P3.0/T5CAP P3.1/T5OUT/T5PWM P3.2/BUZ P3.3
P9.5 P9.4 P9.3 P9.2 P9.1 P9.0 P8.7 P8.6 P8.5 P8.4 P8.3 P8.2 P8.1 P8.0 P7.7/TxD P7.6/RxD P7.5/SO3 P7.4/SI3 P7.3/SCK3 P7.2/SO2 P7.1/SI2 P7.0/SCK2 P6.7/SO1 P6.6/SI1 P6.5/SCK1
P9.6 P9.7 P10.0/INT8 P10.1/INT9 P10.2/INT10 P10.3/INT11 P10.4/INT12 P10.5/INT13 P10.6/INT14 P10.7/INT15 P11.0 P11.1 VDD VSS1 XOUT XIN TEST XTIN XTOUT nRESET P0.0/INT0 P0.1/INT1 P0.2/INT2 P0.3/INT3 P0.4/INT4

(100-TQFP-1414)

P6.4/SO0 P6.3/SI0 P6.2/SCK0 P6.1 P6.0 P5.7/AD15 P5.6/AD14 P5.5/AD13 P5.4/AD12 P5.3/AD11 P5.2/AD10 IVCREF VSS2 P5.1/AD9 P5.0/AD8 P4.7/AD7 P4.6/AD6 P4.5/AD5 P4.4/AD4 P4.3/AD3 P4.2/AD2 P4.1/AD1 P4.0/AD0 P3.7 P3.6
Figure 1-3. S3CC34D/FC34D Pin Assignments (100-TQFP-1414)
P0.5/INT5 P0.6/INT6 P0.7/INT7 P1.0/T0CLK P1.1/T0CAP P1.2/T0OUT/T0PWM P1.3/T1CLK P1.4/T1CAP P1.5/T1OUT/T1PWM P1.6/T2CLK P1.7/T2CAP P2.0/T2OUT/T2PWM P2.1/T3CLK P2.2/T3CAP P2.3/T3OUT/T3PWM P2.4/T4CLK P2.5/T4CAP P2.6/T4OUT/T4PWM P2.7/T5CLK P3.0/T5CAP P3.1/T5OUT/P5PWM P3.2/BUZ P3.3 P3.4 P3.5

PIN DESCRIPTION

Table 1-1. S3CC34D/FC34D Pin Description Pin Name P0.0 P0.7 Pin Type I/O Pin Description
I/O port with bit-programmable pins; Schmitt trigger input or push-pull, open-drain output and software assignable pull-ups; P0.0P0.7 are alternatively used for external interrupt input (noise filters, interrupt enable control). I/O port with bit-programmable pins; Schmitt trigger input or push-pull, open-drain output and software assignable pull-ups.

<Type>

if (Condition) PC := PC + 2 + <eoffset:11> Here, the <Type> field determines whether this branch is BRA (01), BRF (10), or BRT (11). If D is set, the branch instruction has one branch delay slot, meaning that the instruction following the branch will be executed always, regardless of the branch outcome. If D is clear, the immediately following instruction is NOT executed if the branch is taken.
BRA EC Branch on External Condition
Format: Description: BRA(D) EC:2 <eoffset:8> The BRA EC (Branch on External Condition) instruction is used to change the program flow when a certain external condition is set. A typical usage of this instruction is to branch after a coprocessor operation as shown below: COP <operation> NOP NOP BRA EC0 OVERFLOW. OVERFLOW:.. The BRA EC instruction checks the specified external condition (instead of checking the T bit as other branch instructions) and branch to the specified program address. There can be up to 4 external conditions, specified by the <EC:2> field in the instruction. Operation: 10 D 6 <eoffset:8> 0

<EC:2>

if (ExternalCondition_n == True) PC := PC + 2 + <eoffset:8>

BREAK BREAK

Format: Description: BREAK The BREAK instruction suspends the CalmRISC core for 1 cycle by keeping PC from increasing. Processor resumes execution after 1 cycle. This instruction is used for debugging purposes only and thus should not be used in normal operating modes. A core signal nBRK is asserted low for the cycle. Operation: Exceptions: Notes: 0 1
No operation with PC suspended for a single cycle. None None
BSRD Branch Subroutine with Delay Slot
Format: Description: BSRD <eoffset:13> The BSRD (Branch Subroutine with Delay slot) instruction is used to change the program flow to a subroutine by assigning the address of the subroutine to PC after saving the return address (PC+4) in the link register, or A14. The address of the subroutine is calculated by: 1. sign-extending <eoffset:13> to 22 bits 2. adding this to the PC (which contains the address of the branch instruction plus 1) After executing the subroutine, the program flow can return back to the instruction that follows the BSRD instruction by setting PC with the value stored in A14 (see JMP Ai instruction in page 7-52 and RET instruction in page 7-85). This instruction has a delay slot; the instruction that immediately follows BSRD will be always executed. Operation: 11 <eoffset:13> 0

A14 := PC + 4 PC := PC + 2 + <eoffset:13>

CLD Coprocessor Load

Format: Description: CLD Dn, <imm:5> / CLD <imm:5>, Di The CLD (Coprocessor Load) instruction is used to transfer data from and to coprocessor by generating the core signals nCLDID and CLDWR. The content of DA[4:0] is <imm:5>, the address of coprocessor register to be read or written. When a data item is read from coprocessor (CLD Dn, <imm:5>), it is stored in Dn. When a data item is written to coprocessor, it should be prepared in Di. Operation: 8 imm:3 M 2 Dn/Di 0
(M == 0, read) DA[4:0] := <imm:5> nCLDID := 0 CLDWR := 0 Dn := (<imm:5>) (M == 1, write) DA[4:0] := <imm:5> nCLDID := 0 CLDWR := 1 (<imm:5>) := Di
None This instruction has a delay slot, because this instruction is 2-cycle instruction.

CLRSR Clear SR

Format: Description: CLRSR bs:3 The CLRSR (Clear SR) instruction is used to clear a specified bit in SR as follows: CLRSR FE / IE / TE / V / Z0 / Z1 / PM To clear the T bit, one can do as follows: CMP GT, R0, R0 To turn on a specified bit in SR, the SETSR instruction is used. Operation: Exceptions: Notes: <bs:3> 0
SR[<bs:3>] := 0 None None

CMP (1) Compare Register

Format: Description: CMPmode Rn, Ri The CMP (Compare Register) instruction is used to compare two values in registers Rn and Ri. The allowed modes include GE (Greater or Equal), GT (Greater Than), UGE (Unsigned Greater or Equal), UGT (Unsigned Greater Than), and EQ (Equal). CMP subtracts the value of Ri from the value of Rn and performs comparison based on the result. The contents of Rn and Ri are not changed after this operation. The T bit is updated for later reference.

1 Operation:

<Mode>
Temp := Rn - Ri T bit := ~Negative ~Negative && ~Zero Carry Carry && ~Zero Zero if (<Mode> == GE) if (<Mode> == GT) if (<Mode> == UGE) if (<Mode> == UGT) if (<Mode> == EQ)
<Mode> encoding: GE (000), GT (001), UGE (010), UGT (011), and EQ (100). Exceptions: Notes: None None
CMP (2) Compare Immediate
Format: Description: CMPmode Rn, #<imm:16> The CMP (Compare Immediate) instruction is used to compare two values in register Rn and <imm:16>. The allowed modes include GE (Greater or Equal), GT (Greater Than), UGE (Unsigned Greater or Equal), UGT (Unsigned Greater Than), and EQ (Equal). CMP subtracts the value of <imm:16> from the value of Rn and performs comparison based on the result. The contents of Rn is not changed, however, after this operation. The T bit is updated for later reference. Operation: 10 <Mode> Rn 0
Temp := Rn - <imm:16> T bit := ~Negative Carry Carry && ~Zero Zero if (<Mode> == GE) if (<Mode> == UGE) if (<Mode> == UGT) if (<Mode> == EQ) ~Negative && ~Zero if (<Mode> == GT)

<Mode> encoding: GE (000), GT (001), UGE (010), UGT (011), and EQ (100). Exceptions: Notes: None This is a 2-word instruction, where the 16-bit immediate follows the instruction word shown above. Unlike 1-word instructions, therefore, fetching of CMPmode #<imm:16> takes 2 cycles.
CMP (3) Compare Short Immediate
Format: Description: CMP GE, Dn, #<imm:6> The CMP (Compare Immediate) instruction is used to perform signed-comparison of the register Dn and an unsigned immediate value <imm:6>. Dn is one of the registers from R0 to R7. CMP subtracts the value of <imm:6> from the value of Dn and performs signed-comparison based on the result. The contents of Dn is not changed, however, after this operation. The T bit is updated for later reference. Operation: Exceptions: Notes: Dn 0
T bit := ~Negative of (Rn - <imm:6>) None None
CMPEQ (1) Compare Equal Extended Register
Format: Description: CMP EQ, An, Ai The CMP EQ (Compare Equal Extended Register) instruction is used to compare two values in registers An and Ai. This instruction is a restricted form of more general CMPmode instructions for a 22-bit equality comparison between register values. Operation: An 1 Ai 0
T bit := (An == Ai) An or Ai refers to registers from A8 to A15 with their 6-bit extensions.
CMPEQ (2) Compare Equal Small Immediate
Format: Description: CMP EQ, Dn, #<imm:8> The CMP EQ (Compare Equal Small Immediate) instruction is used to compare two values in register Dn and <imm:8>. <imm:8> is zero-extended to 16 bits before comparison. This instruction is a restricted form of more general CMPmode instructions for an 8-bit equality comparison between a register value and an immediate value. Operation: Dn 0

<imm:8>

T bit := ((Dn - <imm:8>) == 0) Dn refers to registers R0 - R8.
CMPEQ (3) Compare Equal Large Immediate
Format: Description: CMP EQ An, #<imm:22> The CMP EQ (Compare Equal Large Immediate) instruction is used to compare two values in register An and <imm:22>. This instruction is a restricted form of more general CMPmode instructions for a 22-bit equality comparison between a register value and an immediate value. Operation: 10 An <imm:22>[21:16] 0
T bit := Zero from (An - <imm:22>) An refers to registers from A8 to A15 with their 6-bit extensions.
None This is a 2-word instruction, where the 16-bit immediate (<imm:22>[15:0]) follows the instruction word shown above. Unlike 1-word instructions, therefore, fetching of CMP EQ <imm:22> takes 2 cycles.

An := An - <imm:16> None This is a 2-word instruction, where the 16-bit immediate follows the instruction word shown above. Unlike 1-word instructions, therefore, fetching of this instruction takes 2 cycles.
SUB (5) Subtract 5-bit Immediate
Format: Description: SUB An, #<imm:5> This form of SUB instruction (Subtract Extended Register) is used to subtract a 5-bit unsigned immediate value from a 22-bit register. This instruction subtracts the value of 5-bit immediate <imm:5> from the value of 22-bit register An, and stores the result in register An. Operation: Exceptions: Notes: 10 An <imm:5> 0
An := An - <imm:5> None None

SWI Software Interrupt

Format: Description: SWI #<imm:6> The SWI (Software Interrupt) instruction performs a specified set of operations (i.e., an SWI handler). This instruction can be used as an interface to the low-level system software such as operating system. Executing this instruction is similar to performing a function call. However, interrupts (IRQ and TRQ) will be masked off so that when a software interrupt is handled, it can be seen as an uninterruptible operation. Note that FIQ can still be triggered when an SWI is serviced. Return from a SWI handler is done by RET_SWI unlike normal function calls. Operation: 5 <imm:6> 0
A14 := PC + 2 SSR_SWI := SR IE := 0, TE := 0 PC := <imm:6> << 2
None Program addresses from 000000h to 0000feh are reserved for SWI handlers. SWI vectors 0 and 1 are not used, as the addresses from 000000h to 000007h are reserved for other interrupts.

SYS System

Format: Description: SYS #<imm:5> The SYS (System) instruction is used for system peripheral interfacing using DA[4:0] and nSYSID core signals. Operation: 4 <imm:5> 0
core output signal DA[4:0] := <imm:5>, DA[21:5] := (unchanged) core output signal nSYSID := LOW

TST (1) Test Register

Format: Description: TST Rn, Ri The TST (TST Register) instruction is used to determine if many bits of a register are all clear, or if at least one bit of a register is set. TST performs a comparison by logically ANDing the value of register Rn with the value of Ri. T bit is set according to the result. Operation: 11 Rn Ri 0
Temp := Rn & Ri T bit := ((Rn & Ri) == 0)
TST (2) Test Small Immediate
Format: Description: TST R0, #<imm:8> This type of TST instruction is used to determine if many bits of a register are all clear, or if at least one bit of a register is set. TST performs a comparison by logically ANDing the value of register Rn with the value of Ri. T bit is set according to the result. Operation: 7 <imm:8> 0
Temp n := Rn & <imm:8> T bit := ((Rn & <imm:8>)[7:0] == 0)

None The register used in this operation is fixed to R0. Therefore, the operand should be placed in R0 before this instruction executes.
TST (3) Test Large Immediate
Format: Description: TST Rn, #<imm:16> This type of TST instruction is used to determine if many bits of a register are all clear, or if at least one bit of a register is set. TST performs a comparison by logically ANDing the value of register Rn with the value of Ri. T bit is set according to the result. Operation: 3 Rn 0
Temp := Rn & <imm:16> T bit := ((Rn & <imm:16>) == 0)

TSTSR Test SR

Format: Description: TSTSR bs:3 The TSTSR (Test SR) instruction is used to test a specified bit in SR as the following example shows: TST FE / IE / TE / V / Z0 / Z1 / PM To set or clear a specified bit, the SETSR or CLRSR instruction is used. Operation: Exceptions: Notes: 2 <bs:3> 0
T bit := ~SR[<bs:3>] None None

XOR (1) XOR Register

Format: Description: XOR Rn, Ri The XOR (XOR Register) instruction is used to perform bitwise XOR operation on two values in registers, Rn and Ri. The result is stored in register Rn. The T bit is updated based on the result. Operation: 11 Rn Ri 0
Rn = Rn ^ Ri T bit = ((Rn ^ Ri) == 0) if(Rn == R6/R7) Z0/Z1 := ((Rn^Ri) == 0)
XOR (2) XOR Small Immediate
Format: Description: XOR R0, #<imm:8> This type of XOR instruction is used to perform bitwise XOR operation on two values in register R0 and <imm:8>. The result is stored in register R0. The T bit is updated based on the result. Operation: 7 <imm:8> 0
R0 = R0 ^ <imm:8> T bit = ((R0 ^ <imm:8>)[7:0] == 0)
XOR (3) XOR Large Immediate
Format: Description: XOR Rn, #<imm:16> This type of XOR instruction is used to perform bitwise XOR operation on two values in register Rn and <imm:16>. The result is stored in register Rn. The T bit is updated based on the result. Operation: 3 Rn 0
Rn = Rn ^ <imm:16> T bit = ((Rn ^ <imm:16>) == 0) if(Rn == R6/R7) Z0/Z1 := ((Rn^<imm:16>) == 0)

CLOCK CIRCUIT

The clock frequency generated for the S3CC34D/FC34D by an external crystal can range from 0.4 MHz to 12.0 MHz. The maximum CPU clock frequency is 12.0 MHz. The XIN and XOUT pins connect the external oscillator or clock source to the on-chip clock circuit. SYSTEM CLOCK CIRCUIT The system clock circuit has the following components: External crystal or ceramic resonator source (or an external clock source) Oscillator stop and wake-up functions Programmable frequency divider for the CPU clock (fOSC divided by 1, 2, 4, or 8) Clock control register, CLKCON Oscillator control register, OSCCON

P10CONL Port 10 Control Register Low

3F0055H

P10.3/INT11 Configuration Bits Schmitt trigger input Schmitt trigger input, pull-up N-channel open-drain output Push-pull output
P10.2/INT10 Configuration Bits Schmitt trigger input Schmitt trigger input, pull-up N-channel open-drain output Push-pull output
P10.1/INT9 Configuration Bits Schmitt trigger input Schmitt trigger input, pull-up N-channel open-drain output Push-pull output
P10.0/INT8 Configuration Bits Schmitt trigger input Schmitt trigger input, pull-up N-channel open-drain output Push-pull output
P10EDGE Port 10 Interrupt EDGE Control Register

3F0056H

P10.7's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P10.6's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P10.5's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P10.4's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P10.3's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P10.2's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P10.1's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P10.0's Interrupt State Setting Bit Falling edge interrupt Rising edge interrupt
P11CON Port 11 Control Register
Bit Identifier Reset Value Read/Write.7.4.7 Bits 74 Not used.3.2 P11.1 Configuration Bits 1 1.1.1 Schmitt trigger input Schmitt trigger input, pull-up N-channel open-drain output Push-pull output.6 .5 .4 .R/W.R/W.R/W

3F0058H

P11.0 Configuration Bits Schmitt trigger input Schmitt trigger input, pull-up N-channel open-drain output Push-pull output
BASIC TIMER/WATCHDOG TIMER
BTCON controls basic timer clock selection and watchdog timer clear bit. Basic timer is used in two different ways: As a clock source to watchdog timer to provide an automatic reset mechanism in the event of a system malfunction (When watchdog function is enabled in ROM code option). To signal the end of the required oscillation stabilization interval after a reset or stop mode release. The reset value of basic timer clock selection bits is decided by the ROM code option. (See the section on ROM code option for details.) After reset, programmer can select the basic timer input clock using BTCON. When watchdog function is enabled by the ROM code option, programmer must set BTCON.0 periodically within every 2048 x basic timer input clock time to prevent system reset.
BTCON Basic Timer Control Register
Bit Identifier Reset Value Read/Write.7.7 Bit 7 Not used.6.4 Basic Timer Clock Selection Bits 1 1.3.1 fxx/2 fxx/4 fxx/16 fxx/32 fxx/128 fxx/256 fxx/1024 fxx/2048.6 X R/W.5 X R/W.4 X R/W.3 .2 .R/W

Watch Timer Enable Bit Disable watch timer; Clear frequency dividing circuits Enable watch timer
WATCH TIMER BLOCK DIAGRAM

WTCON.4-.5

fW/26 (0.5 kHz) fW/25 (1 kHz) fW/24 (2 kHz) fW/23 (4 kHz)

BUZZER Output

fxt fX/64 fX/128 MUX Clock Selector fW
Frequency Dividing Circuit
fW/27 fW/213 fW/214 fW/215 (1Hz)

Selector Circuit

Watch Timer INT

WTCON.6

WTCON.1

WTCON.0

WTCON.2-.3
fX = Main clock (where fxin = 4.19 MHz) fxt = Sub clock (32.768 kHz) fW = Watch timer frequency
Figure 11-1. Watch Timer Block Diagram

8-BIT TIMER 0

The 8-bit timer 0 is an 8-bit general-purpose timer/counter. Timer 0 has three operating modes, one of which you select using the appropriate T0CON setting: Interval timer mode (Toggle output at T0OUT pin) Capture input mode with a rising or falling edge trigger at the T0CAP pin PWM mode (T0PWM)
FUNCTION DESCRIPTION Timer 0 Interrupts (IRR0, IRR1) The Timer 0 module can generate two interrupts: the Timer 0 overflow interrupt (T0OVF), and the Timer 0 match/ capture interrupt (T0INT). T0OVF is interrupt level IRR1. T0INT belongs to interrupt level IRR0 Interval Timer Function The Timer 0 module can generate an interrupt: the Timer 0 match interrupt (T0INT). In interval timer mode, a match signal is generated and T0OUT is toggled when the counter value is identical to the value written to the T0 reference data register, T0DATA. The match signal generates a Timer 0 match interrupt (T0INT) and clears the counter. If, for example, you write the value 10H to T0DATA and 03H to T0CON, the counter will increment until it reaches 10H. At this point, the T0 interrupt request is generated, the counter value is reset, and counting resumes. Pulse Width Modulation Mode Pulse width modulation (PWM) mode lets you program the width (duration) of the pulse that is output at the T0PWM pin. As in interval timer mode, a match signal is generated when the counter value is identical to the value written to the Timer 0 data register. In PWM mode, however, the match signal does not clear the counter but can generate a match interrupt. The counter runs continuously, overflowing at FFH, and then repeats the incrementing from 00H. Whenever an overflow occurs, an overflow (OVF) interrupt can be generated. Although you can use the match or the overflow interrupt in PWM mode, interrupts are not typically used in PWMtype applications. Instead, the pulse at the T0PWM pin is held to High level as long as the reference data value is less than or equal to ( ) the counter value, and then the pulse is held to Low level for as long as the data value is greater than ( > ) the counter value. One pulse width is equal to tCLK 256. Capture Mode In capture mode, a signal edge that is detected at the T0CAP pin opens a gate and loads the current counter value into the T0 data register. You can select the rising or falling edges to trigger this operation. Timer 0 also gives you capture input source: the signal edge at the T0CAP pin. You select the capture input by setting the value of the Timer 0 capture input selection bit in the port 1 control register low, P1CONL.3-.2 (3F0035H). When P1CONL.3-.2 is 00, the T0CAP input is selected. Both kinds of Timer 0 interrupts can be used in capture mode: the Timer 0 overflow interrupt is generated whenever a counter overflow occurs; the Timer 0 match/capture interrupt is generated whenever the counter value is loaded into the T0 data register. By reading the captured data value in T0DATA and assuming a specific value for the Timer 0 clock frequency, you can calculate the pulse width (duration) of the signal that is being input at the T0CAP pin.

3-Bit Counter Clear

Serial I/O 0 INT
SIO0CON.3 SIO0CON.7 (Shift Clock Source Select)

SIO0CON.4 (Edge Select)

SIO0CON.2 (Shift Enable) SIO0CON.5 (Mode Select)

SCK0 P6.2 fxx/2

SIO0PS 8-Bit P.S 1/2
8-Bit SIO 0 Shift Buffer (SIO0DATA)
Prescaler Value = 1/(SIO0PS + 1) 8 SI0 P6.3 Data Bus
SO0 P6.4 SIO0CON.6 (LSB/MSB First Mode Select)
Figure 19-2. SIO 0 Functional Block Diagram
SERIAL I/O 0 TIMING DIAGRAMS

IRQ.7 Set SIO0CON.3

Transmit Complete
Figure 19-3. Serial I/O 0 Timing in Transmit/Receive Mode (Tx at falling, SIO0CON.4 = 0)
Figure 19-4. Serial I/O 0 Timing in Transmit/Receive Mode (Tx at rising, SIO0CON.4 = 1)

SERIAL I/O 1 INTERFACE

The SIO 1 module can transmit or receive 8-bit serial data at a frequency determined by its corresponding control register settings. To ensure flexible data transmission rates, you can select an internal or external clock source. PROGRAMMING PROCEDURE To program the SIO 1 modules, follow these basic steps: 1. Configure the I/O pins at port (SO1, SCK1, SI1) by loading the appropriate value to the P6CONH/L register, if necessary. 2. Load an 8-bit value to the SIO1CON register to properly configure the serial I/O 1 module. In this operation, SIO1CON.2 must be set to "1" to enable the data shifter. 3. When you transmit data to the serial buffer, write data to SIO1DATA and set SIO1CON.3 to 1, the shift operation starts.
SIO1CON Serial I/O 1 Control Register

3F0088H

Serial I/O 1 Shift Clock Selection Bit Internal clock External clock (SCK1)
Serial I/O 1 Mode Selection Bit Receive-only mode Transmit/receive mode
Serial I/O 1 Counter Clear and Shift Start Bit No effect Clear 3-bit counter and start shifting (This bit is automatically cleared to logic zero immediately after starting shift)
Serial I/O 1 Shift Operation Enable Bit Disable shifter and clock counter Enable shifter and clock counter
SIO 1 PRE-SCALER REGISTER (SIO1PS) The values stored in the SIO 1 pre-scaler registers, SIO1PS, lets you determine the SIO clock rate (baud rate) as follows: Baud rate = Input clock/(Pre-scaler value + 1), or SCLK input clock where the input clock is fxx/4

UART BAUD RATE DATA REGISTER (BRDATA) The value stored in the UART baud rate register, BRDATA, lets you determine the UART clock rate (baud rate).
UART Baud Rate Data Register (BRDATA) 3F0080H, R/W MSB.7.6.5.4.3.2.1.0 LSB

Baud rate data

Figure 23-2. UART Baud Rate Data Register (BRDATA)
BAUD RATE CALCULATIONS Mode 0 Baud Rate Calculation In mode 0, the baud rate is determined by the UART baud rate data register, BRDATA at address 3F0080H: Mode 0 baud rate = fxx/(16 (BRDATA + 1)). Mode 2 Baud Rate Calculation The baud rate in mode 2 is fixed at the fOSC clock frequency divided by 16: Mode 2 baud rate Modes 1 and 3 Baud Rate Calculation In modes 1 and 3, the baud rate is determined by the UART baud rate data register, BRDATA at address 3F0080H: Mode 1 and 3 baud rate = fxx/(16 (BRDATA + 1)) = fxx/16
Table 23-1. Commonly Used Baud Rates Generated by BRDATA Mode Mode 2 Mode 0 Mode 1 Mode 3 Baud Rate 0.5 MHz 230,400 Hz 115,200 Hz 57,600 Hz 38,400 Hz 19,200 Hz 9,600 Hz 4,800 Hz 62,500 Hz 9,615 Hz 38,461 Hz 12,500 Hz 19,230 Hz 9,615 Hz Oscillation Clock Decimal 8 MHz 11.0592 MHz 11.0592 MHz 11.0592 MHz 11.0592 MHz 11.0592 MHz 11.0592 MHz 11.0592 MHz 10 MHz 10 MHz 8 MHz 8 MHz 4 MHz 4 MHz x 25 BRDATA Hexadecimal x 02H 05H 0BH 11H 23H 47H 8FH 09H 40H 0CH 27H 0CH 19H
Data Bus TB8 MS0 MS1 BRDATA D CLK S Q UARTDATA CLK Zero Detector MS0 MS1 RxD (P7.6)

Baud Rate Generator

Write to UDATA

TxD (P7.7)

Tx Control

Tx Clock IRR11

EN Send TxD (P7.7)
UART data transmit INT UART data receive INT IMR0H.3 IMR0H.4 Shift Clock
Rx Clock RE UARTCON.0 Start 1-to-0 Transition Detector

Receive

Rx Control

Bit Detector

Shift Value

MS0 MS1

Shift Register

UARTDATA RxD (P7.6)

Figure 23-3. UART Functional Block Diagram
UART MODE 0 FUNCTION DESCRIPTION In mode 0, UART is input and output through the RxD (P7.6) pin and TxD (P7.7) pin outputs the shift clock. Data is transmitted or received in 8-bit units only. The LSB of the 8-bit value is transmitted (or received) first. Mode 0 Transmit Procedure 1. Select mode 0 by setting UARTCON.6 and.7 to "00B". 2. Write transmission data to the shift register UDATA (3F007FH) to start the transmission operation. Mode 0 Receive Procedure 1. Select mode 0 by setting UARTCON.6 and.7 to "00B". 2. Clear the receive interrupt start bit (UARTCON.0) by writing a "0" to UARTCON.0. 3. Set the UART receive enable bit (UARTCON.4) to "1". 4. The shift clock will now be output to the TxD (P7.7) pin and will read the data at the RxD (P7.6) pin. A UART receive interrupt occurs when IMR0H.4 is set to "1".

Write to Shift Register (UDATA)

RxD (Data Out)

TxD (Shift Clock)
IRR11 Clear IRR12 and set RE
RE Receive D0 D1 D2 D3 D4 D5 D6 D8

RxD (Data In)

Figure 23-6. Timing Diagram for Serial Port Mode 0 Operation

Transmit

SERIAL PORT MODE 1 FUNCTION DESCRIPTION In mode 1, 10-bits are transmitted (through the TxD (P7.7) pin) or received (through the RxD (P7.6) pin). Each data frame has three components: Start bit ("0") 8 data bits (LSB first) Stop bit ("1") When receiving, the stop bit is written to the RB8 bit in the UARTCON register. The baud rate for mode 1 is variable. Mode 1 Transmit Procedure 1. Select the baud rate generated by BRDATA. 2. Select mode 1 (8-bit UART) by setting UARTCON bits 7 and 6 to '01B'. 3. Write transmission data to the shift register UDATA (3F007FH). The start and stop bits are generated automatically by hardware. Mode 1 Receive Procedure 1. Select the baud rate to be generated by BRDATA. 2. Select mode 1 and set the RE (Receive Enable) bit in the UARTCON register to "1". 3. The start bit low ("0") condition at the RxD (P7.6) pin will cause the UART module to start the serial data receive operation.
Tx Clock Write to Shift Register (UDATA) Shift TxD IRR11 Start Bit D0 D1 D2 D3 D4 D5 D6 D7 Stop Bit
Rx Clock RxD D0 D1 D2 D3 D4 D5 D6 D7 Stop Bit

Start Bit

Bit Detect Sample Time Shift IRR12 Receive
Figure 23-7. Timing Diagram for Serial Port Mode 1 Operation
SERIAL PORT MODE 2 FUNCTION DESCRIPTION In mode 2, 11-bits are transmitted (through the TxD (P7.7) pin) or received (through the RxD (P7.6) pin). Each data frame has four components: Start bit ("0") 8 data bits (LSB first) Programmable 9th data bit Stop bit ("1") The 9th data bit to be transmitted can be assigned a value of "0" or "1" by writing the TB8 bit (UARTCON.3). When receiving, the 9th data bit that is received is written to the RB8 bit (UARTCON.2), while the stop bit is ignored. The baud rate for mode 2 is fosc/16 clock frequency. Mode 2 Transmit Procedure 1. Select mode 2 (9-bit UART) by setting UARTCON bits 6 and 7 to '10B'. Also, select the 9th data bit to be transmitted by writing TB8 to "0" or "1". 2. Write transmission data to the shift register, UDATA (3F007FH), to start the transmit operation. Mode 2 Receive Procedure 1. Select mode 2 and set the receive enable bit (RE) in the UARTCON register to "1". 2. The receive operation starts when the signal at the RxD (P7.6) pin goes to low level.
Tx Clock Write to Shift Register (UARTDATA) Shift TxD IRR11 Start Bit D0 D1 D2 D3 D4 D5 D6 D7 TB8 Stop Bit
Rx Clock RxD D0 D1 D2 D3 D4 D5 D6 D7 RB8 Stop Bit
Figure 23-8. Timing Diagram for Serial Port Mode 2 Operation

Input high leakage current

ILIH1 ILIH2

Input low leakage current
ILIL2 Output high leakage current Output low leakage current Oscillator feed back Resistor I LOH ILOL ROSC1 ROSC2 Pull-up resistor R L1
Table 24-2. D.C. Electrical Characteristics (Continued) (TA = 25C to + 85C, VDD = 2.4 V to 5.5 V) Parameter Supply Current (1) (4) Symbol IDD1 (2) Conditions Run mode; VDD = 5.5 V Crystal oscillator VDD = 3.3 V IDD2 (2) Idle mode; VDD = 5.5 V Crystal oscillator VDD = 3.3 V IDD3 (3) IDD4 (3) IDDMHz 4 MHz 4 MHz 12 MHz 4 MHz 4 MHz Min Typ 10.0 5.0 3.0 1.5 1.2 0.8 320.0 300.0 100.0 90.0 200.0 180.0 Max 20.0 10.0 6.0 3.0 2.4 1.6 640.0 600.0 200.0 180.0 400.0 360.0 uA mA Units mA
Run mode; VDD = 3.3 V 32 kHz crystal oscillator, TA = 25 C Idle mode; VDD = 3.3 V 32 kHz crystal oscillator, TA = 25 C Stop mode; TA = 25 C VDD = 5.5 V VDD = 3.3 V Stop mode; TA = 25 C to + 85C VDD = 5.5 V VDD = 3.3 V
NOTES: 1. Supply current does not include current drawn through internal pull-up resistors or external output current loads. 2. IDD1 and IDD2 include power consumption through sub clock oscillation and main oscillator is in normal mode. 3. IDD3 and IDD4 are current when main clock oscillation stops and the sub clock is used in normal mode. 4. Every value in this table is measured when bits 1-0 of the clock control register (CLKCON.1-.0) is set to 11B.
Table 24-3. A.C. Electrical Characteristics (TA = 25C to + 85C, VDD = 2.4 V to 5.5 V) Parameter Interrupt input high, low width RESET input low width Symbol tINTH, tINTL tRSL Conditions P0.0 P0.7, P10.0 P10.7, VDD = 3.3 V VDD = 3.3 V Min Typ Max Unit ns us

External Interrupt

VIH1 VIL1
Figure 24-1. Input Timing for External Interrupts

nRESET 0.2 VDD

Figure 24-2. Input Timing for nRESET
Table 24-4. Input/Output Capacitance (TA = 25 C to + 85 C, VDD = 0 V ) Parameter Input capacitance Output capacitance I/O capacitance Symbol CIN COUT CIO Table 24-5. Data Retention Supply Voltage in Stop Mode (TA = 25C to + 85C) Parameter Data retention supply voltage Data retention supply current Symbol VDDDR IDDDR VDDDR = 2.4 V Conditions Min 2.4 Typ Max 5.Unit V uA Conditions f = 1 MHz; unmeasured pins are returned to VSS Min Typ Max 10 Unit pF

nRESET Occurs

Stop Mode Data Retention Mode
Oscillation Stabilization Time Normal Operating Mode

~ ~ ~ ~

VDDDR Execution of STOP Instruction nRESET 0.2VDD tWAIT
NOTE: tWAIT is the same as 32/(Basic timer frequency selected by Smart Option).
Figure 24-3. Stop Mode Release Timing When Initiated by nRESET
Oscillation Stabilization Time
Stop Mode IDLE Mode Data Retention Mode
VDDDR Execution of STOP Instruction INT VIL1 tWAIT NOTE: tWAIT is the same as 32/(Basic timer frequency selected by Smart Option).

Normal Operating Mode

Figure 24-4. Stop Mode Release Timing Initiated by Interrupts Table 24-6. Low Voltage Reset Electrical Characteristics (TA = 25C, VDD = 2.4 V to 5.5 V) Parameter Voltage of LVR VDD voltage rising time VDD voltage off time Hysteresis voltage of LVR Current consumption of LVR Symbol VLVR tR tOFF V ILVR VDD = 3.3 V VDD = 5.5 V Test Condition Min 2.0.5 Typ 2.7 60 Max 3.0 120 Unit V S S mV A

NOTES: 1. All timings are in nanoseconds (ns) and assume a 11.1-MHz CPU clock frequency. 2. The unit tCPU means one CPU clock period.

tSCK tLOW

Figure 24-7. Waveform for UART Timing Characteristics
Shift Clock Data Out tS1 D0

tSCK tH1 D1 tH2

Valid Valid Valid Valid Valid Valid Valid

tS2 Data In

The symbols shown in this diagram are defined as follows: fSCK tS1 tS2 tH1 tH2 Serial port clock cycle time Output data setup to clock rising edge Clock rising edge to input data valid Output data hold after clock rising edge Input data hold after clock rising edge
Figure 24-8. Timing Waveform for the UART Module
Table 24-10. Main Oscillator Characteristics (TA = 25C to + 85C, VDD = 2.4 V to 5.5 V) Oscillator Ceramic Oscillator Clock Configuration

XIN XOUT

Parameter Oscillation frequency (1)
Test Condition VDD=2.4V to 5.5V VDD=3.5V to 5.5V

Min 0.4 0.4

Unit MHz

Stabilization time (2)

Stabilization occurs when VDD is equal to the minimum oscillator voltage range. VDD=2.4V to 5.5V VDD=3.5V to 5.5V

Crystal Oscillator

Oscillation frequency (1)

0.4 0.4

Stabilization occurs when VDD is equal to the minimum oscillator voltage range. VDD=2.4V to 5.5V VDD=3.5V to 5.5V XIN input high and low level width (tXH, tXL)

External Clock

0.4 0.4 41.7

Stabilization time

NOTES: 1. Oscillation frequency and XIN input frequency data are for oscillator characteristics only. 2. Stabilization time is the interval required for oscillating stabilization after a power-on occurs, or when stop mode is terminated.

1/fXIN tXL tXH

VDD - 0.1 V 0.1 V
Figure 24-9. Clock Timing Measurement at XIN
Table 24-11. Sub Oscillator Frequency (TA = 25C to + 85C, VDD = 2.4 V to 5.5 V) Oscillator Crystal Oscillator Clock Configuration

XTIN XTOUT

Parameter Oscillation frequency (1) Stabilization time
Test Condition VDD=3.0V to 5.5V VDD=2.4V to 5.5V

Min 32

Typ 32.768 1.0 3.0

Max 10

Unit kHz s s
Oscillation frequency (1) Stabilization time (2)
XTIN input frequency XTIN input high and low level width (tXTH, tXTL)

100 15

kHz us
NOTES: 1. Oscillation frequency and XTin input frequency data are for oscillator characteristics only. 2. Stabilization time is the interval required for oscillating stabilization after a power-on occurs.

1/fXT tXTL tXTH

Figure 24-10. Clock Timing Measurement at XTIN

CPU Clock 12 MHz