P01 53

P02 54

P03 55

P04 56

P05 57

P06 58

P07 59

GND 62

CLK 63

P10 64

BLOCK DIAGRAM

RDB WRB

VA0-VA12 VD0-VD7

SM85CPU

INTB NMIB

VRDB, VWRB

LCDC/DMA

VCE0B, VCE1B FR, LP, XC XD0-XD3 YD, DOFFB
RAM 1 k-BYTE RAM 4 k-BYTE

A0-A20 VR SOUND

SOUND GENERATOR

MMU BUS CONTROLLER

D0-D7 MCE0B, MCE1B IOE0B, IOE1B

RXDB TXDB

TIMER 8-BIT : 2 CH CLOCK WATCHDOG TIMER

PPPPPPPP0 7

P10 P11 P12 P13 P14 P15 P16 P17
P20 P21 P22 P23 P24 P25 P26 P27
P30 P31 P32 P33 P34 P35 P36 P37

X1 X2 CLK

OSC1 OSC2

RESETB

PIN DESCRIPTION
PIN NAME D0-D7 A0-A20 MCE0B MCE1B IOE0B IOE1B RDB WRB NMIB INTB VD0-7 VA0-12 VCE0B VCE1B VRDB VWRB P00-P07 P10-P17 P20-P27 P3 0-PRxDB TxDB SOUND VR FR LP XC XD0-XD3 YD DOFFB X1 X2 CLK OSC1 OSC2 RESETB M0-M2 VCC, GND I/O I/O O O O O O O O I I I/O O O O O O I/O I/O I/O I/O I O O I O O O O O O I O O I O I I I FUNCTION External data bus External address bus Chip enable 0 (Mask ROM/flash memory) Chip enable 1 (SRAM) I/O enable 0 (address : FF00-FFFF) I/O enable 1 (address : FF00-FFFF) Read strobe Write strobe Non-maskable interrupt External interrupt VRAM data bus VRAM address bus VRAM chip enable 0 (A000-BFFF) VRAM chip enable 1(C000-DFFF) VRAM read strobe VRAM write strobe I/O port 0 I/O port 1 I/O port 2 I/O port 3 UART data input port UART data output port Sound output D/A converter reference voltage LCD drive waveform Display data latch pulse Display data clock Diaplay data Vertical timing Display off Main clock input Main clock output System clock output Subclock input Subclock output Reset Operation Mode (usually GND) Power supply

ABSOLUTE MAXIMUM RATINGS

PARAMETER Supply voltage Input voltage Output voltage Output current Operating temperature Store temperature SYMBOL VDD VI VO IOH IOL TOPR TSTG High-level output current Low-level output current CONDITION RATING 0.3 to 6.5 0.3 to VDD + 0.5 0.3 to VDD + 0.to +to +140 UNIT V V V mA mA C C
RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply voltage System clock frequency Maximum main clock frequency Subclock frequency Operating temperature SYMBOL VDD fSYS CONDITION VDD = 4.5 to 5.5 V VDD = 4.5 to 5.5 V VDD = 2.7 to 5.5 V RATING 4.5 to 5.5 16.384 k to 5 M 10 32.to +60 UNIT V Hz MHz kHz C

fSUB TOPR

NOTE :
Be sure to RESETB when power on because internal signal reguires initialization. Normal operation is not guaranteed without hardware reset.

DC CHARACTERISTICS

PARAMETER SYMBOL VIH1 Input voltage VIL1 VIH2 VIL2 IIH1 Input current IIL1 IIL2 VOH1 VOL1 VIN = VDD, VDD = 5 V VIH = 0 V, VDD = 5 V VIN = 0 V, VDD = 5 V IOH1 = 1 mA, VDD = 5 V IOL1 = 10 mA, VDD = 5 V VR = VDD = 5 V VR = VDD = 5 V VR = VDD = 5 V fSYS = 5 MHz fSYS = 5 MHz, HALT mode fSUB oscillation, STOP mode fSUB stop, STOP mode CONDITION
(VDD = 4.5 to 5.5 V, TOPR = 10 to +60C)
MIN. 0.8 x VDD 0 VDD 0.5 0.VDD 0.5 0.0.0.150 TYP. MAX. VDD 0.2 x VDD UNIT V V A A V bits k V mA A A 10 NOTE 5
Output voltage Resolution D/A
Output resistance Combined tolerance IDD IDDH IDDS1 IDDS2

Supply current

NOTES :
1. Applicable pins : P00-P07, P10-P17, P20-P27, P30-P37, D0D7, VD0-VD7, X1, M0-M2 2. Applicable pins : RESETB, OSC1, RxDB, NMIB, INTB 3. Applicable pins : P00-P07, P10-P17, P20-P27, P30-P37, VD0-VD7, X1, M0-M2 (non-connected pull-up resistor) 4. Applicable pins : RESETB, P00-P07, P10-P17, P20-P27, P30-P37 (connected pull-resistor) 5. Applicable pins : P00-P07, P10-P17, P20-P27, P30-P37, D0D7, A0-A20, MCE0B, MCE1B, IOE0B, IOE1B, RDB, WRB, VA0-VA12, VCE0B, VCE1B, VWRB, TxDB, XC, LP, FR, CLK, XD0-XD3 6. No load condition, VDD = 5 V, main clock = 10 MHz 7. No load condition, VDD = 5 V, sub clock in active (32.768 kHz), VR = GND, input signal fixation. 8. No load condition, VDD = 5 V, sub clock in active (32.768 kHz), VR = GND, input signal fixation. Including LCD, DMA, sound generator and any part concerned with timer operation. 9. No load condition, VDD = 5 V, sub clock in active (32.768 kHz), VR = GND, input signal fixation. 10. No load condition, VDD = 5 V, OSC1 = GND, VR = GND, input signal fixation.
The SM85CPU is an 8-bit CPU with an unique architecture, developed by SHARP, and the following features. General purpose register architectures There are eight 8-bit general purpose registers (also serve as four 16-bit general purpose registers) and four 16-bit general purpose registers serve as accumulator, index register, or the pointer registers. General purpose register allocated at RAM The general purpose registers access the RAM location by the register pointer RP. So pushing the register during an interrupt and passing parameter to subroutine can be executed in High speed. Refined instruction set The instruction set contains total 67 members : 8 load instructions, 19 arithmetic instructions, 7 logic instructions, 9 program control (branch) instruction, 8 bit manipulation instructions, 8 rotate & shift instructions and 9 CPU control instructions. There are powerful bit manipulation instructions includes plural bits transfer, logical operation between bits, and the bit test and jump instructions that incorporates a test and condition branch in the same instruction. (Refer to Table 1) There are data transfer, arithmetic and conditional branch instructions for 16-bit. It can rapidly process the word-sized and long jump. There are 8-bit x 8-bit16-bit multiplication and 16-bit x 16-bit16-bit remaining 8-bit division instructions. (Unsigned arithmetic) 23 address modes The rich address modes provides optimal access to ROM, RAM and the register files. Illegal instruction detecting function When an error code is detected, a non-maskable interrupt (NMI) will be generated. Standby function There are two standby modes, HALT and STOP mode, and the mode can be changed by HALT instruction or STOP instruction respectively.

: In ROM space (60 k bytes), the field beyond the internal ROM is the external memory access field.
Stack pointer (SPL, SPH) The stack pointer SPL, SPH are 8-bit readable/ writable register and show the stack address. The bit SPC of the system configuration (SYS) specifies whether the stack pointer is 8 (SPL only) or 16 (both SPL and SPH) bits long. Program counter (PC) The program counter (PC) is a pointer for program memory and contains the starting address for the next instruction. Bit 15 0
The program counter PC is initialized to 1020H after hardware reset. That is, the application program starts executing from the address 1020H after hardware reset.

MCNF2 MCNF1 MCNF0

- 12 -

Address Space

The SM85CPU has a 64 k-byte address space, which is divided into RAM (0000H-0FFFH) and ROM (1000H-FFFFH) areas. The address 0000H-007FH are both shared by RAM and register file. Fig. 9-1 shows the SM8521 Memory Map. The RAM and register file allocated at 0000H-007FH can be selected by the addressing mode designated by instructions. The SM8521 supports an Memory Management Unit used to external memory area expantion. Refer to "Memory Management Unit (MMU)".

Register File Area

The register file is allocated between 0000H and 007FH. The first 16 bytes (0000H-000FH) area are general registers. The remainder is for CPU control registers, peripherals control register and data register.

RAM Area

The RAM area starts at the beginning 0000H of the address space. It overlaps the register file for the address 0000H-007FH. This arrangement is to shorten the instruction length as much as possible and to permit the use with both RAM and the register file for faster execution.

ROM Area

ROM area starts at the address 1000H of the space address. The first portion (1000H-101FH) is reserved for the interrupt vector table. Each 2 bytes entry in the vector table contains the address of interrupts. When an interrupt encountered, the CPU jumps to the corresponding branch address of vector table for program executing. The address 1020H marks the start of the user program area itself. Executing always starts at 1020H after hardware reset.

Data Type Bit Byte

Register file address 0000H-00FFH 0000H-00FFH
Memory address 0000H-00FFH or FF00H-FFFFH 0000H-00FFH 0000H-00FFH or FF00H-FFFFH (Under shorthand)

Data Format

Address Low
Even byte, 0000H-00FEH, following byte (odd byte)

Fig. 6 External Memory Access Timing (Write Timing)
PARAMETER Address setup time Data setup time WRB signal pulse width Address hold time Data hold time SYMBOL tWSA tWSD tWWR tWHA tWHD tSYS 50 tSYS 10 MIN. TYP.
(VDD = 4.5 to 5.5 V, TOPR = 10 to 60C)
MAX. tSYS + 50 UNIT NOTE 1

tSYS + 30

ns ns ns ns ns
1. tSYS : The system clock period (main clock x 1/2) when the low order 3 bits in the clock change register FCPUS2-FCPUS0 are 100B.

- 17 -

SYSTEM CONTROL Oscillator Circuit
The SM8521 is built-in the main-clock and subclock oscillator circuits for generating clock signal. The main-clock oscillator circuit is applied to 1.5 to 10 MHz. The sub-clock oscillator circuit is applied to 32.768 kHz.

Clock System

The SM8521 uses the main-clock and sub-clock oscillator circuits to generate the required clock.
fCK = 11.0592 MHz CKIN CKOUT Main-clock generator circuit fCK 1/2
The system clock, leads CPU operation, is one of the five clocks which divides the main-clock (fCK) into 1/2, 1/4, 1/8, 1/16 and 1/32. It also selects from sub-clock (f32K). In addition, the clocks supplied to the peripheral functions are fc1-fc10 divided by the prescaler PRS0 and derived from the 1/2 clock of main-clock (fCK/2), and fx1-fx8 divided by the prescaler PRS1 and derived from the subclock.
System clock frequency control

System clock

Warming up counter fc10
Prescaler PRS0 fCK/2 fc1-fc10
Function blocks operation

RAM register read/write

Interrupt control
Peripheral functions f32K OSCIN OSCOUT Sub-clock generator circuit

f32K = 32.768 kHz

Prescaler PRS1
Fig. 7 SM8521 Clock System

- 18 -

System clock frequency control Main-clock fCK

1/2 1/2 1/2 1/2 1/2

fCK/2 fCK/2
CG Selector 5 f32K System clock fSYS

fCK/8 fCK/16 fCK/32

Prescaler PRS2 (frequency divider on fc10) Prescaler PRS0 (frequency divider on fCK/2)
1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2

fc12 fc13 fc14 fc15

For warming up counter
fc10 fc11 fc12 fc13 fc14 fc15 fc16
Warming up counter (frequency divider on fc10)
1/2 1/2 1/2 1/2 1/2 1/2 1/2
Prescaler PRS1 (frequency divider on f32K) f32K Sub-clock fx1 fx2 fx3 fx4 fx5 fx6 fx7 fx8

R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined 00H 00H 00H 00H 00H 00H 00H 00H 0000000 00H Undefined Undefined Undefined 0
PIO control register 0 P0C R/W PIO control register 1 P1C R/W PIO control register 2 P2C R/W PIO control register 3 P3C R/W MMU data register 0 MMU0 R/W MMU data register 1 MMU1 R/W MMU data register 2 MMU2 R/W MMU data register 3 MMU3 R/W MMU data register 4 MMU4 R/W Reseved Reseved UART Transmit data register URTT W UART Receive data register URTR R UART Status register URTS R UART Control register URTC R/W Reseved Control/Status register LCC R/W Display H-timing register LCH R/W Display V-timing register LCV R/W *1 Reserved Controler register DMC R/W Source X-coordinate register DMX-1 R/W Source Y-coordinate register DMY-1 R/W X-width register DMDX R/W Y-width register DMDY R/W Destination X-coordinate register DMX2 R/W Destination Y-coordinate register DMY2 R/W Pallet register DMPL R/W ROM bank register DMBR R/W VRAM page register DMVP R/W Reserved Reserved -
00H 00H 00H 00H 00H 00H 00H 00H 00H FFH 00H 0000010 00H 00H 0000000 00H 00H 00H 00H 00H 00H 00H -
NOTES : R/W indicates that there is at least one bit in the register is capable of read/write.
(The register indicated by R/W includes the bit of special-purpose register for read). R indicates that the register is only for read.
indicates that the corresponding bit is undefined.
*1 The most significant bit is read only.
Fig. 9-3 SM8521 Memory Map (3)

- 22 R R/W

R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W W R/W R/W R/W R/W
Address 0040H 0041H 0042H 0043H 0044H 0045H 0046H 0047H 0048H 0049H 004AH 004BH 004CH 004DH 004EH 004FH 0050H 0051H 0052H 0053H 0054H 0055H 0056H 0057H 0058H 0059H 005AH 005BH 005CH 005DH 005EH 005FH
Register name SG control register SGC Rserved SG0 output level control register SG0L Rserved SG1 output level control register SG1L Rserved SG0 time constant register (High) SG0TH SG0 time constant register (Low) SG0TL SG1 time constant register (High) SG1TH SG1 time constant register (Low) SG1TL SG2 output level control register SG2L Rserved SG2 time constant register (High) SG2TH SG2 time constant register (Low) SG2TL SG-D/A direct output register SGDA Rserved Timer control register 0 TM0C Timer data register 0 TM0D Timer control register 1 TM1C Timer data register 1 TM1D Clock timer CLKT Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Watchdog timer register WDT Watchdog timer control register WDTC
Initial 00H 0000 00H 00H 00H 0000 00H 00000 00H 00H 00H 38H SG0W0 SG0W1 SG0W2 SG0W3 SG0W4 SG0W5 SG0W6 SG0W7 SG0W8 SG0W9 SG0W10 SG0W11 SG0W12 SG0W13 SG0W14 SG0W15 SG1W0 SG1W1 SG1W2 SG1W3 SG1W4 SG1W5 SG1W6 SG1W7 SG1W8 SG1W9 SG1W10 SG1W11 SG1W12 SG1W13 SG1W14 SG1W15

Interrupt Function

The SM8521 supports 10 interrupt sources. In these interrupts, watchdog timer and illegal instruction trap interrupts belong to non-maskable interrupts, the others, however, are maskable interrupts. 10 interrupt sources are shared to independent interrupt vector respectively, in the ROM address area between 1000H-101FH. And, the maskable interrupts are set 8 steps with priority level.
Interrupt request register IR0 IR1 IE0 IE1
PS0 Interrupt enable register PS1
With priority 8 levels Interrupt mask processor Interrupt request latch Maskable interrupt
With priority 1 level Interrupt signal WDT (NMI)

Priority selector

Illegal instruction trap

Interrupt process

Fig. 10 Interrupt Block Diagram

- 23 -

Table 3 SM8521 Interrupt Vectors Location and Their Priority VECTOR LOCATION 1000H 1002H 1006H 1008H 100EH 1012H 1016H 101AH 101CH INTERRUPT SOURCE DMA Timer 0 External interrupt UART transmit/receive complete LCD controller Timer 1 Clock Input/output port Watchdog timer overflow SYMBOL DMAINT TIM0INT EXTINT UARTINT LCDCINT TIM1INT CKINT PIOINT WDTINT PRIORITY
101EH NMI, illegal instruction NMIINT, ILLINT The priority levels determine the order in which the chip process simultaneous interrupts. It also denotes the priority level of
mask interrupts by setting the bits IM2-IM0 (bits 2-0 : PS0).
REGISTER EXPLANATIONS PS0 (Interrupt maskbit (IM) of processor status 0) The bits IM2-IM0 can set the acceptable level for interrupt. The maskable interrupt requested by CPU is set 1 to 8 priority levels. These bits IM2-IM0 determine processing interrupts which priority levels.
Bits 2 to 0 : Interrupt mask bits (IM2-IM0)
BIT CONTENT All maskable interrupts recognized. All maskable interrupts recognized. Maskable interrupts with 1 to 7 level recognized. Maskable interrupts with 1 to 6 level recognized. Maskable interrupts with 1 to 5 level recognized. Maskable interrupts with 1 to 4 level recognized. Maskable interrupts with 1 to 3 level recognized. Maskable interrupts with 1 to 2 level recognized.
When an interrupt enables by interrupt mask bit, if all interrupt conditions are setup, then the CPU starts to the interrupt processing.

- 24 -

PS1 (Interrupt enable bit (I) of processor status 1) The bit I (bit 0 : PS1) enables/disables all maskable interrupts. After hardware reset, the bit I is set 0 and so all maskable interrupts are in disable state. Bit 0 : Interrupt enable (I)
BIT 0 CONTENT Disables to accept all maskable interrupts Enables to accept maskable interrupt. For 1 each maskable interrupt can be enabled/ disabled by interrupt enable register IE0, IE1 and bits IM2-IM0.

IE1 (Interrupt enable register 1) The interrupt enable register IE1 is an 8-bit readable/writable register containing the settings for enable/disable to accept interrupt sources. Bit 7

TIM1 CLK PIO -

Except that write to processor status PS1 directly, the bit I can be set/cleared by the following specialpurpose instructions. (Under normal case, the special-purpose instructions are used.) DI instruction : bit I is set 0. EI instruction : bit I is set 1. IE0 (Interrupt enable register 0) The interrupt enable register IE0 is an 8-bit readable/writable register containing the settings for enable/disable to accept interrupt sources. Bit 7

DMA TIM0 EXTINT UART -

Bit 7 : Sets 0. Bit 6 : Timer 1 interrupt enable bit Bit 5 : Sets 0. Bit 4 : Clock interrupt enable bit Bit 3 : Sets 0. Bit 2 : PIO interrupt enable bit Bits 1 to 0 : Set 0.
BIT Disable Enable CONTENT
The interrupt enable register IE0 and IE1 are also used to wake up the chip from standby mode (STOP mode, HALT mode) by setting the interrupt to enable. If the interrupt enabled by the interrupt enable register IE0 and IE1 occurs, the chip will wake up from standby mode. But also there are interrupt sources which cannot use to wake up from STOP mode. For more details, refer to "Stand by Function".
Bit 7 : DMA interrupt enable bit Bit 6 : Timer 0 interrupt enable bit Bit 5 : Sets 0. Bit 4 : External interrupt enable bit Bit 3 : UART interrupt enable bit Bits 2 to 1 : Set 0. Bit 0 : LCD cotroller interrupt enable bit

- 25 -

IR0 (Interrupt request register 0) The interrupt request register IR0 is an 8-bit readable/writable register containing the setting for enable/disable to accept interrupt sources. Bit 7

DMA TIM0 EXT UART -

Bit Bit Bit Bit Bit Bit Bit Bit

: : : : : : : :

DMA interrupt request bit Timer 0 interrupt request bit Sets 0. External interrupt request bit UART interrupt request bit Sets 0. Sets 0. LCD controller Interrupt Request bit

CONTENT Disable Enable

The interrupt request register IR0 and IR1 are also used to wake up the chip from standby mode (STOP mode, HALT mode) by setting the interrupt to enable. If the interrupt enabled by the interrupt request register IR0 and IR1 occurs, the chip will wake up from standby mode. But also there are interrupt sources which cannot use to wake up from STOP mode. For more details, refer to "Standby Function".
IR1 (Interrupt request register 1) The interrupt request register IR1 is an 8-bit readable/writable register containing the setting for enable/disable to accept interrupt sources. Bit 7
Bit Bit Bit Bit Bit Bit Bit
: Sets 0. : Timer 1 interrupt request bit : Sets 0. : Clock interrupt request bit : Sets 0. : PIO interrupt request bit to 0 : Set 0.

Watchdog Timer Register (WDT)
PRS2 (Prescaler 2) Prescaler PRS2 generates the count clock to watchdog timer counter WDT. The following conditions are to clear all bits of prescaler PRS2. When hardware reset. When watchdog timer counter WDT stopped. When counter WDT is cleared by writing 1 to the bit WDTCR (bit 3 : WDTC). PRS2 fc2 1/2 1/2 1/2 1/2 1/2 fc11 fc12 fc13 fc14 fc15 Prescaler PRS2 divides the frequency derived from input clock fc10 (204.8 s : main-clock = 10 MHz), then fc11-fc15 are output. WDT (Watchdog timer counter register) Watchdog timer counter WDT is an 8-bit read only register which counts up from input clock.
Bits 5 to 4 : set 0. Bit 3 : Counter clear bit (WDTCR) [write only bit]
BIT CONTENT No clear Only in writing operation, WDT is cleared.
Bits 2 to 0 : Watchdog timer counter clock selection bits (WCNT2-WCNT0)
BIT COUNT CLOCK fc12 (819 s1) fc13 (1.639 ms1) fc14 (3.278 ms1) fc15 (6.578 ms1) fx5 (0.976 ms2) fx6 (1.95 ms2) fx7 (3.90 ms2) fx8 (7.81 ms2)
1 The value in ( ) is the period when main-clock is 10 MHz. 2 The value in ( ) is the period when sub-clock is 32.768 kHz.

- 32 -

The SM8521 supports LCD controller (LCDC) to control LCD pannel, in a kind of dot matrix, which is required external LCD drivers. LCDC transfers display data in the external VRAM to the LCD driver. The SM8521 supports a DMA, which can transfer the data at the High speed, between ROM and VRAM, VRAM and VRAM, and external RAM and VRAM, without through the CPU. DMA transfers display data in the ROM and external RAM to VRAM.
External address bus ROM address generator
Source/destination register
Timing generator Shift register

Interrupt (CPU)

LCD driver
VRAM address generator Data composition circuit External data bus
Fig. 15 LCD/DMA Block Diagram

- 33 -

VRAM Configulation
VRAM configulation is shown below. VRAM, maximum 16 k bytes (160 x 200-dot x 2phase or 200 x 160-dot x 2-plane), can be accessed. LCD diaplays a phase specified. Address of VRAM0 and VRAM1 is A000H-BFFFH and C000H-DFFFH respectively. DMA transfers rectangle display data, in arbitrary size specified in ROM and external RAM, to VRAM. NOTE :
Do not write data directly to VRAM while transferring data to LCD driver (MSB of LCC register is 1 and V-blank flag is 0).

0 Bit 1 0

4-dot/byte
dot data = 00 color color color color 3

160/200-dot

160/200-dot VRAM 160-dot 200-dot 2-plane = 16 k-byte
Fig. 16 VRAM Configuration

- 34 -

DMA Transfer
ROM to VRAM transfer mode

256-dot X1 DY

DX 256-dot

160/200-dot X2

VRAM 160/200-dot
Also, transfers between VRAMs. VRAM to VRAM transfer mode

DY 160/200-dot X2 DX

- 35 -
Compound and Overwrite Mode
To transfer display data, DMA provides two modes. One is compound mode that source dot data zero is not stored into the destination. Second is

VRAM ROM

overwrite mode that any dot data is stored into the destination.

VRAM dot data

ROM dot data
ROM dot data = 0 : Transparent

ROM and VRAM

Fig. 17 An Example of Transfer ROM to VRAM in Compound Mode

- 36 -

Registers
LCDC/DMA registers are shown below. LCDC register is initialized at the system initialization. After setting each parameter, set the DMA start bit to 1 and execute HALT instruction, then DMA transfer starts. LCC (LCD control/status register) Bit 7
Bits 3 to 1 : LCDC/DMA clock bits
BIT fCK/2 fCK/4 fCK/6 fCK/8 fCK/10 fCK/12 fCK/14 fCK/16 LCDC/DMA CLOCK
DISON DISPG GRAD1 GRAD0 LCCL2 LCCL1 LCCL0 NORWH

Bit 7 : Display ON/OFF

BIT DISPLAY ON/OFF Display OFF Display ON
Bit 0 : Normal white bar bit
BIT Normal white Normal black STATUS
Bit 6 : Display page A/B bit
BIT DISPLAY PAGE Page A Page B
LCH (Display horizontal timing register) Bit 7 0
HD0T HTIM4 HTIM3 HTIM2 HTIM1 HTIM0
Bits 5 to 4 : Gradation control bits (Depth of black and white on real LCD)
BIT 0 Black 0 Black 0 Black GRADATION CHOOSEN 1 Gray Gray Gray Gray White 3 White
Bits 7 to 6 : Set 0. Bit 5 : H-dot size bit
BIT HORIZONTAL DOT SIZE 160 200

Reserved 1 Gray Gray 3

Bits 4 to 0 : H-timing bits

3 White

NOTE : NOTE : Gray scale
White Gray3 Gray2 Gray1 Black V-blank width bit must not be filled with 0000B. Otherwise, LCDC interrupt can not be effective.
Horizontal display cycle = (shift clock x LCDC/DMA clock ) x (H-timing + 1) Shift clock = 40 (at H-dot size = 160), 50 (at H-dot size = 200) Frame cycle = Horizontal display cycle x (V-line size + V-blank width)

- 37 -

LCV (Display vertical timing register) Bit 7

VBLNK VL1

DMC (DMA control register) Bit 7

DMST -

VL0 VBWD3 VBWD2 VBWD1 VBWD0
INDCY INDCX TRN1 TRN0 COOVr
Bit 7 : V-blank bit (read only)
BIT STATUS Non-vertical blank period Vertical blank period

Bit 7 : DMA start bit

BIT STATUS DMA stops DMA starts transfering data
Bit 6 : Sets 0. Bits 5 to 4 : V-line size bits

BIT VERTICAL LINE SIZE

Bits 6 to 5 : Set 0. Bit 4 : Increment y/decrement y bit (Increment/decrement y-coordinate of source)

BIT STATUS Increment y Decrement y
Bits 4 to 0 : V-blank width bits NOTE :
V-blank width bit must not be filled with 0000B. Otherwise, LCDC interrupt can not be effective.
Bit 3 : Increment x/decrement x bit (Increment/decrement x-coordinate of source)
BIT Increment x Decrement x STATUS
Bits 2 to 1 : Transfer mode bits
BIT SOURCEDESTINATION VRAMVRAM ROMVRAM Extend RAMVRAM VRAMExtend RAM
Bit 0 : Compound/overwrite bit
BIT Compound mode Overwrite mode STATUS

- 38 -

How to overturn a character in right and left. 4-dot data is transfered as a unit, from ROM to VRAM or VRAM to VRAM. ROM is composed of 8
bits. In case of "Increment x" is effective, 8-bit data is transfered as shown below.

dot3 dot2 dot1 dot0

On the other hand, in case of "Decrement x" is effective, 8-bit data is transferred as shown below.
In each 4-dot data is automatically swapped in right and left.

dot2 dot1 dot0

dot0 dot1 dot2 dot3
Position of all specified dots, maximun 256, is overturned with right and left in horizontal. The
heart of their X coordinates becomes an axis of symmetry.
DMX1 (Source X-coordinate register)
DMX17 DMX16 DMX15 DMX14 DMX13 DMX12 DMX11 DMX10
DMY1 (Source Y-coordinate register)
DMY17 DMY16 DMY15 DMY14 DMY13 DMY12 DMY11 DMY10
DMDX (X-width register (X-width-1))
DMDX7 DMDX6 DMDX5 DMDX4 DMDX3 DMDX2 DMDX1 DMDX0
DMDY (Y-width register (Y-width-1))
DMDY7 DMDY6 DMDY5 DMDY4 DMDY3 DMDY2 DMDY1 DMDY0
DMX2 (Destination X-coordinate register)
DMX27 DMX26 DMX25 DMX24 DMX23 DMX22 DMX21 DMX20
DMY2 (Destination Y-coordinate register)
DMY27 DMY26 DMY25 DMY24 DMY23 DMY22 DMY21 DMY20

- 39 -

DMPL (Pallet register) DMPL register specifies gradation to dot data. When transferring, gradation data concerned with dot data of the DMPL register is stored to VRAM. Bit 7 0
COL31COL30 COL21 COL20 COL11 COL10 COL01 COL00
Example : When dot data color 2 (10B) is specified under the status of the DMPL register filled with 01B, bit 4 and 5 of the DMPL register are automatically selected. Dot data changes from color 2 (10B) to color 1 (01B). Then the dot data color 1 moves to specified VRAM.

All 12 bits of each SG0, SG1 and SG2 must not be filled with 0. If all 12 bits become 0, D/A can not perform correct output.

- 41 -

Sound Waveform Register
Sound waveform generator can outputs 16-tone wedge and 32-step sign waveform as shown below.
A period of one step is variable based on the value of Time constant register (SG0, SG1 and SG2 composed of 12 bits). The period can be lead from the formula shown below.
Period = fCK(n-1) Period : Time of one step : System oscillation frequency fCK n : Value of Time constant register

- 42 -

In order of Low and High, each 4-bit data is specified. Each SG0 and SG1 waveform register stores 4-bit x 32-step data as shown below. Refer to SG0 and SG1 waveform registers in Fig. 9-3. The most significant bit of each 4-bit data indicates positive and negative. That means, range of each 4-bit data is 8 to +7. NOTE :
Waveform register read/write is possible only when SG is disable.
9 A B C D E F STEP1 STEP3 STEP5 STEP7 STEP9 STEP11 STEP13 STEP15 STEP17 STEP19 STEP21 STEP23 STEP25 STEP27 STEP29 STEP31
3 STEP0 STEP2 STEP4 STEP6 STEP8 STEP10 STEP12 STEP14 STEP16 STEP18 STEP20 STEP22 STEP24 STEP26 STEP28 STEP30
Fig. 20 Sound Waveform Register

D/A output level

+5.0 V

+2.5 V

Rump-up period

Rump-down period

Mute level of the D/A should be created by software. Attenuate not to exceed capacity of D/A output level (0-5 V) by software. To avoid pop-noise, make rump-up and down period by software.
Fig. 21 Example of D/A Output

- 43 -

SGC (Control register) Bit 7

SONDOUT -

DIROUT SG2OUT SG1OUT SG0OUT
SG0W0-15, SG1W0-15 (Waveform register 0-15) Bit 7 0
SGxWy7 SGxWy6 SGxWy5 SGxWy4 SGxWy3 SGxWy2 SGxWy1 SGxWy0
(x = 0, 1)(y = 0 to 15) Bits 7 : Sound output enable Bits 6 to 4 : Set 0. Bit 3 : D/A direct output enable Bit 2 : SG2 output enable Bit 1 : SG1 output enable Bit 0 : SG0 output enable SG0L, SG1L (Output level control register ; 0, 1/32, 2/3231/32) Bit 7 0

BIT Receiver disable Receiver enbable (built-in baud rate generator operates) CONTENT
Bits 7 to 5 : Set 0. Bit 4 : Transmit enable bit (TE) Setting the bit TE to 1, starts the built-in baud rate generator and the interface enters transmissible status. In such status, if a transmit data is written to the transmit data register URTT, then will start the transmission operation. If the bit TE clears to 0, the transmitter will be initializated.
BIT CONTENT Transmitter disable Transmitter enable (built-in baud rate generator operates)
Bit 2 : Parity enable bit (PEN)
BIT CONTENT Transmit : the data with parity bit Receive : parity enable Transmit : the data without parity bit Receive : parity disable
Bit 1 : Even/odd parity bit (EOP)
BIT CONTENT Even parity Odd parity
Bit 0 : Stop bit length bit (SBL)
BIT Stop bit : 1 bit Stop bit : 2 bits CONTENT

- 49 -

Transfer Format
According to setting stop bit and parity bit by control register URTC, transfer format indicated by Fig. 26 can be selected.
URTC PEN (bit 2) SBL (bit 0) ST ST ST ST bit 0 bit 0 bit 0 bit 0 bit 1 bit 1 bit 1 bit 1 bit 2 bit 2 bit 2 bit 2
(Transfer Direction) bit 3 bit 3 bit 3 bit 3 bit 4 bit 4 bit 4 bit 4 bit 5 bit 5 bit 5 bit 5 bit 6 bit 6 bit 6 bit 6 bit 7 bit 7 bit 7 bit 7 P P STP STP STP STP STP STP
ST : start bit, P : parity bit, STP : stop bit

Fig. 26 Transfer Format

parity

STP STP

Fig. 27 8-Bit Mode Transfer Format (Example for Parity Added and 2 Stop Bits)

- 50 -

INSTRUCTION SET
The instruction set of the SM85CPU has the following characteristics : The instruction set is the result of subtle design and consists of 67 types of basic instructions. The powerful bit manipulation instructions includes plural bits transfer, logical operation between bits, and the bit test and jump instructions that incorporates a test and condition branch in the same instruction. There are transfer, operation and conditional branch instructions for 16-bit. The actions of transfer, operation and long jump for word data can be processed in High speed. There are arithmetic instructions for multiplication and division. Multiplication : 8-bit x 8-bit16-bit Division : 16-bit x 16-bit16-bit remaining 8-bit 23 types of memory addressing mode By variety of memory addressing modes, the accessing to RAM, ROM, and register file can be operated.

Definition of Symbols

SYMBOL PC SP @SP PS0 PS1 C Z S V D H BF I dst src cc EXPLANATION Program counter Stack pointer Indirect stack pointer Processor status 0 Processor status 1 Carry flag Zero flag Sign flag Overflow flag Decimal complement flag Half carry flag Bit flag Interrupt enable Destination Source Condition code

Instruction Summary

Load Instructions
INSTRUCTION OPERAND CLR MOV MOVM MOVW POP POPW PUSH PUSHW dst dst, src dst, IM, src dst, src dst dst src src FUNCTION dst0 (Clear) dstsrc (Move) dst(dst AND IM) OR src (Move Under Mask)

[SPECIAL MODES] key Paper size display Original size display Exposure display and [EXPOSURE] key
Paper select display and [PAPER SELECT] key Copy ratio display and [COPY RATIO] key
AR-M350 EXTERNAL VIEWS AND INTERNAL STRUCTURES 5-3

B. Print mode screen

This screen is displayed when the print mode is selected. (The display varies with the mode. For the display in other modes)
SELECT JOB. PRINT HOLD JOB LIST Sharp 005 Microsoft Word - Test001 Sharp 006 EXCEL1 CONDITION SETTINGS

! "

3 Message display Job status screen Print hold job list
A message is displayed in this column. Refer to the text. If the job retention function is used, the list of stored print jobs is displayed here (up to 100 jobs). The job retention function can be used only if the printer is equipped with a hard disk drive unit. If the main switch is turned off, stored print data will be cleared. Display scroll keys Use these keys to view the job hold list when it is contained on more than one screen. [CONDITION SETTINGS] key Use to switch the display to the printer configuration menu.
AR-M350 EXTERNAL VIEWS AND INTERNAL STRUCTURES 5-4
C. Job status screen (common to print, copy, network scan, and fax modes)
This screen is displayed when the [JOB STATUS] key on the operation panel is pressed. A job list showing the current job at the top of the job queue or a list showing completed jobs can be displayed. The contents of the jobs can be viewed, moved up to the highest priority in the job queue or deleted from the queue.
JOB QUEUE COPY SHARPSETS / PROGRESS 003 / / / 000 STATUS COPYING PAPER EMPTY* DETAIL WAITING PRIORITY STOP/DELETE PRINT JOB E-MAIL/FTP FAX JOB JOB QUEUE 1/1 COMPLETE

1 Job list

A job list which indicates the current job and reserved jobs or a job list which indicates completed jobs is displayed. The icons to the left of the jobs in queue represent the job mode. Print mode Network scan mode Fax mode (transmission job) Fax mode (reception job) When a job list which indicates the current job and reserved jobs is displayed, the displayed jobs themselves are operation keys. To cancel printing or to give a job the highest print priority, touch the relevant job key to select the job and execute the desired operation using the keys described in 7,8, and 9 Use to switch the job list between "JOB QUEUE" and "COMPLETE". "JOB QUEUE": Displays the list of the current job and the reserved jobs. "COMPLETE": Displays the list of completed jobs. Use to display the print job list for all modes (print, copy, network scan, and fax). Use to display the list of jobs that use the network for sending e-mail by SNMP protocol or sending to an ftp site or desktop by ftp protocol. Use to display the fax communication status and the reserved transmission job status. Use to switch the page of the displayed job list. Use to cancel or delete the current job or delete the selected reserved job. Received fax print jobs that have been reserved, however, cannot be deleted. If you select a job among the reserved jobs in the "JOB QUEUE" job list to which you wish to give the highest priority and touch this key, the job will move to the highest priority reserved job. Use to display the detailed information of the selected job. The paper size for printing can be changed from the specified size.This function, however, cannot be used when a fax reception print job is selected. Copy mode

2) Remove the upper transport unit.
AR-M350 DISASSEMBLY AND ASSEMBLY, MAINTENANCE 7-8
b. Stopper solenoid 1) Remove the upper transport unit cover. 2) Remove the stopper solenoid.
e. Original length sensor 1) Remove the OC cover.

! ! "

c. Sensors 1) Remove the upper transport unit cover. 2) Remove the sensors.

"

2)Remove the original length sensor cover, and remove the sensor.
! " ! ! " "

" !

d. (D) SPF control PWB 1) Remove the SPF PWB, and remove the (D) SPF control PWB.
f. Original width detection volume 1) Remove the OC cover. 2) Remove the original length sensor cover. 3) Remove the volume cover and remove the volume.
! ! " " ! " #
AR-M350 DISASSEMBLY AND ASSEMBLY, MAINTENANCE 7-9
Original width detection volume installation <1>Extend the original guide to the maximum position. <2>Adjust so that the mark on the width detection pinion gear is fitted with the mark on the volume mounting plate.
3) Remove the original paper feed unit.
h. Take-up roller, paper feed roller 1) Remove the upper transport unit cover. 2) Remove the paper feed roller cover. 3) Remove the hook of each roller, and remove each roller.
<3>Fix the mounting plate with the screw. * When the rotational volume sensor is replaced, the sensor value must be adjusted to the paper size (mark on the tray). (Refer to the SIM 53-6 or 53-7.) g. Original paper feed unit 1) Remove the OC cover. 2) Remove the SPF lower cover.
i. CIS unit 1) Remove the upper transport unit cover. 2) Remove the CIS unit.
When the CIS unit is replaced, the CIS shading adjustment must be performed. (Refer to the descriptions of ADJUSTMENTS.)
AR-M350 DISASSEMBLY AND ASSEMBLY, MAINTENANCE 7-10
3) Remove the cover, and remove the CIS control PWB.
k. Paper exit sensor 1) Remove the paper exit sensor.

!

l. Paper exit roller * For easy installation of the cover, slide the earth line to the connector side when attaching. Note: The CIS unit is factory-adjusted before shipping. Since these adjustments cannot be performed in the market, never touch the following screws of the CIS unit. 1) Remove the original paper feed unit. 2) Remove the paper exit roller gear.

# "

j. Open sensor 1) Remove the open sensor.
3) Remove the paper exit frame, and remove the paper exit roller.

3) 4) 3)

AR-M350 DISASSEMBLY AND ASSEMBLY, MAINTENANCE 7-11
m. SPF motor 1) Remove the original paper feed unit. 2) Remove the SPF drive unit.
o. SPF paper feed unit, original paper feed solenoid, SPF original paper feed clutch 1) Remove the SPF paper feed unit. 2) Remove the SPF paper guide.

Set value(Default) Engine section LCD
15min/30min*/60min/120min/240min Disable/Enable* 15min*/30min/60min/120min/240min/None ON/OFF* 15sec/30sec/60sec*/OFF 3sec/6sec*/9sec/12sec American English/English*/French/Spanish Yes/No* Yes/No* Yes/No* Yes/No* Yes/No* -3.0mm~0.0mm*~3.0mm (0.1mm unit) -3.0mm~0.0mm*~3.0mm (0.1mm unit) -3.0mm~0.0mm*~3.0mm (0.1mm unit) -3.0mm~0.0mm*~3.0mm (0.1mm unit) -3.0mm~0.0mm*~3.0mm (0.1mm unit) With the saddle finisher installed Depend on the distination
Normal*/DAKER/DARKEST/LIGHTEST/LIGHTER Yes*/No Yes*/No ON/OFF* ON/OFF* Auto*/PostScript/PCL Auto*/PostScript/PCL 1sec~20sec*~999sec Per job*/Timeout/Paralell OFF/Network OFF IP address 000.000.000.000* IP subnet mask 000.000.000.000* IP gateway 000.000.000.000*
Enable TCP/IP Enable NetWare Enable EtherTalk Enable NetBEUI Reset the NIC Intialize/Store settings Restore factory defaults Store current configuration Restore configuration Product key PS3 expansion kit E-mail alert and status
Yes*/No Yes*/No Yes*/No Yes*/No
AR-M350 MACHINE OPERATION 8-4

[9] ADJUSTMENTS

Adjustment item 1 Process section 2 Engine section 3 Scanner section A High voltage output adjustment A LSU right angle adjustment B Print off-center adjustment C Resist quantity adjustment A Scanner unit distortion adjustment B OC scan distortion adjustment C Vertical image distortion balance adjustment D Vertical image distortion balance adjustment E Vertical (sub scanning direction) distortion adjustment F Original detection light emitting unit height adjustment G Original size detection photo sensor check H Original size detection photo sensor adjustment I (D) SPF hinge height adjustment J (D) SPF hinge diagonal adjustment (Front) K Scan magnification ratio adjustment L OC scan lead edge adjustment M Original off-center adjustment N Image density adjustment O DSPF width detection adjustment

1. Process section

A. High voltage output adjustment
(1) Developing bias output check and setup
1) Remove the rear cabinet to allow checking of the high voltage monitor output pin. 2) Execute the simulation of the target high voltage. (See the table below.) 3) Select the mode to be set with 10-key, and press START key. 4) Enter the set value with 10-key and press START key. The set value is outputted for 30 sec. 5) Apply a high voltage tester between the measurement pin and the frame. Note: Take care not to short the measuring pin and the frame. 6) The unit stops after 30 sec of output.
Default Monitor output voltage MC grid MAIN GRID (SIM 8-2) AUTO MIX PHOTO PRINTER FAX Transfer current (THV+ (SIM 8-6) FRONT BACK Developing bias DV BIAS (SIM 8-1) AUTO MIX PHOTO PRINTER FAX PLUS Separation voltage SHV (SIM 8-17) FRONT BACK Transfer voltage THV (SIM 8-17) AE mode Text/Photo mode Photo mode Printer mode Fax mode Front Back AE mode Text/Photo mode Photo mode Printer mode Fax mode Positive bias Front Rear -500V5V -500V5V -500V5V -500V5V -500V5V -500V5V +150V5V +1.25V0.1V +1.25V0.1V -800V10V -650V5V -650V5V -650V5V -650V5V -650V5V -650V5V CHARACTER Text mode Set value 45PPM : 267 35PPM : 220 45PPM : 310 35PPM : 45PPM : 160 35PPM : 120 45PPM : 160 35PPM : 120 780

Trouble Trouble Paper feed Trouble Trouble Communication (RIC/MODEM) Trouble Spec Counter Error Error Counter Error
Adjustment, setup, Used to check the number of total misfeed and troubles. operation data output, (If the number of misfeed is considerably great, the machine must be repaired. The misfeed rate is obtained by dividing this check (display) count by the total counter value.) Used to check the misfeed position and the number of misfeed Adjustment, setup, at that position. operation data output, (If the number of misfeed is considerably great, the machine check (display) must be repaired.) (Sections other than DSPF sections) Used to check the total trouble (self diag) history. Adjustment, setup, operation data output, check (display) Other Adjustment, setup, operation data output, check (print)

Trouble

Misfeed
Used to check the ROM version of each unit (section). Used to print the list of adjustments and setup data (simulations, FAX soft switches, counters).
Software Data Setup, adjustment data User data
Used to display the key operator code. Adjustment, setup, (Used when the customer has forgotten the key operator code.) operation data output, check (display) Used to check the number of use of the staple, DSPF, and scanner (reading) unit. Adjustment, setup, operation data output, check (display) Paper feed

Counter

Used to check the number of use (print quantity) of each paper Adjustment, setup, feed section. operation data output, check (display) Adjustment, setup, operation data output, check (display)
10 Used to check the system configuration (option, internal hardware).

Option

AR-M350 SIMULATIONS 10-2

Code Main Sub 22

Function (Content)
Purpose Adjustment, setup, operation data output, check (display) FAX

Section Data

11 Used to check the use frequency of FAX. (send/receive) (Only when FAX is installed.)
12 Used to check the misfeed position and the number of misfeed Adjustment, setup, at that position. (If the number of misfeed is considerably great, operation data output, the machine must be repaired.) check (display) 13 Used to display the process cartridge data. Adjustment, setup, operation data output, check (display) Adjustment, setup, operation data output, check (display)
19 Used to display the scanner mode counter.
Used to clear the misfeed counter, misfeed history, trouble Data clear counter, and trouble history. (After completion of maintenance, these counters must be cleared.) Used to clear the number of use (print quantity) of each paper feed section. Data clear Paper feed

AR-M350 SIMULATIONS 10-18
Main code 14 Purpose Function (Content) Cancel (in case of a trouble) Used to cancel the self diag U1/LCC/US/PF troubles.
Main code 17 Purpose Function (Content) Cancel (incase of a trouble) Used to cancel the self diag PF trouble (when copy is inhibited by the host computer). Section Communication (RIC/MODEM) Item Trouble Operation/Procedure Select with 10 digit key pad.
SIMULATION 17 PF TROUBLE CANCELLATION.
Section Item Trouble Operation/Procedure Select with 10 digit key pad
SIMULATION 14 TROUBLE CANCELLATION. (OTHERS) ARE YOU SURE ? 1. YES 2. NO
ARE YOU SURE ? 1. YES 2. NO
<List of set values> After canceling a trouble other than U1, U2, PF, and LCC, the display returns to the main code entry menu. Without canceling a trouble, the display returns to the main code entry menu.
<List of set values> After canceling PF trouble, the display returns to the main code entry menu. Without canceling a trouble, the display returns to the main code entry menu.
Main code 15 Purpose Function (Content) Cancel (incase of a trouble) Used to cancel the self diag U6 (09/20/21/22) trouble. Section Paper feed Item Trouble Operation/Procedure Select with 10 digit key pad.
SIMULATION 15 LCC TROUBLE CANCELLATION. ARE YOU SURE ? 1. YES 2. NO

Main code 21

Purpose Function (Content) Section Item Operation/Procedure Setup Used to set the maintenance cycle. Spec Used to set the maintenance cycle in an SRU machine.
SIMULATION 21-1 MAINTENANCE CYCLE SETUP. SELECT 0-6, AND PRESS START. 0. DEFAULT 4. 100K 1. 40K 2. 50K 3. 80K

5. 120K

6.FREE
<List of set values> After canceling LCC trouble, the display returns to the main code entry menu. Without canceling a trouble, the display returns to the main code entry menu. <List of set values> 6 Maintenance display at the cycle of each control spec. Maintenance display at 40K Maintenance display at 50K Maintenance display at 80K Maintenance display at 100K Maintenance display at 120K No maintenance display
Main code 16 Purpose Function (Content) Section Item Operation/Procedure
SIMULATION 16 U2 TROUBLE CANCELLATION. ARE YOU SURE ? 1. YES 2. NO
Cancel (incase of a trouble) Used to cancel the self diag U2 trouble. Trouble Select with 10 digit key pad.
<List of set values> After canceling U2 trouble, the display returns to the main code entry menu. Without canceling a trouble, the display returns to the main code entry menu.
AR-M350 SIMULATIONS 10-19

Main code 22

Purpose Adjustment, setup, operation data output, check (display) Used to check the print count in each section and in each operation mode. (Used to check the maintenance timing.) Function (Content) Adjustment, setup, operation data output, check (display) Used to check the misfeed position and the number of misfeed at that position. (If the number of misfeed is considerably great, the machine must be repaired.) (Sections other than DSPF sections)

Purpose Function (Content)
Section Item Counter Operation/Procedure Data of each counter are displayed.
SIMULATION 22-1 COUNTER DATA DISPLAY. TOTAL : ******** DEVE : ******** PRINTER : ******** RIGHT SIDE : ******** DRUM : ******** TONER : ******** MAINTENANCE : ******** COPIES : ******** OTHERS : ******** FAX OUTPUT : ********
Section Item Trouble Operation/Procedure The history of the latest 50 paper jams is displayed. (Refer to the jam codes below.)
SIMULATION 22-3 PAPER JAM HISTORY. *******,*******,*******,*******,*******,*******,*******,*******,*******,******* *******,*******,*******,*******,*******,*******,*******,*******,*******,******* *******,*******,*******,*******,*******,*******,*******,*******,*******,******* *******,*******,*******,*******,*******,*******,*******,*******,*******,******* *******,*******,*******,*******,*******,*******,*******,*******,*******,*******.. (10 lines x 80 digits = 800 characters)

TOTAL OUTPUT : ********

<List of display values> TOTAL DRUM TONER DEVE MAINTENANCE TOTAL OUTPUT COPIES PRINTER FAX RIIGHT SIDE OUTPUT OTHERS Total counter Drum cartridge counter Toner cartridge counter Developer cartridge counter Maintenance counter Total output quantity Copy effective paper counter Printer counter Fax print counter Right side paper exit counter Other print counter (List print, etc.)
<Jam codes> Code TRAY2 MPFDND1 MPFDND2 MPFDNTD MPFDST2 MPFDSD1 MPFDSD2 MPFDSTD PPD1NMF TRAY1 Description Tray 2 paper feed jam (MPFD not-reaching) MPFD not-reaching jam (Desk tray 1 feed paper) MPFD not-reaching jam (Desk tray 2 feed paper) MPFD not-reaching jam (Tandem desk feed paper) MPFD remaining jam (Machine tray 3 feed paper) MPFD remaining jam (Desk tray 1 feed paper) MPFD remaining jam (Desk tray 2 feed paper) MPFD remaining jam (Tandem desk feed paper) PPD1 not-reaching jam (Manual feed tray paper) Tray 1 feed paper jam (PPD1 not-reaching) PPD1 not-reaching jam (Machine tray 2 feed paper) PPD1 not-reaching jam (Desk tray 1 feed paper) PPD1 not-reaching jam (Desk tray 2 feed paper) PPD1 not-reaching jam (Tandem desk feed paper) PPD1 not-reaching jam (ADU refeed paper) PPD1 remaining jam (Manual feed tray feed paper) PPD1 remaining jam (Machine tray 1 feed paper) PPD1 remaining jam (Machine tray 2 feed paper) PPD1 remaining jam (Desk tray 1 feed paper) PPD1 remaining jam (Desk tray 2 feed paper) PPD1 remaining jam (Tandem desk feed paper) PPD1 remaining jam (ADU refeed paper) PPD1 jam (Image ready is not supplied from ICU.) POD1 not-reaching jam POD1 remaining jam POD2 not-reaching jam POD2 remaining jam (When discharging to the right side of machine.) POD2 remaining jam (When discharging to the left side of machine.) ADU paper entry sensor not-reaching jam ADU paper entry sensor remaining jam ADU paper exit sensor not-reaching jam ADU paper exit sensor remaining jam ADU transport sensor 1 not-reaching jam ADU transport sensor 1 remaining jam ADU transport sensor 2 not-reaching jam (When ADU transport) ADU transport sensor 2 remaining jam (When ADU transport)

<List of set values> 1 Copy effective paper counter
<List of set values> Printer counter Other effective paper counter
AR-M350 SIMULATIONS 10-26
Purpose Function (Content) Section Item Operation/Procedure Data clear Used to clear the FAX counter. FAX Counter Select with 10 digit key pad and press START key. The procedure below is executed and the display returns to the original state. 1: Counter is cleared 2: Not cleared
Purpose Function (Content) Data clear Used to reset the drum rotation time, toner motor rotation time, and developer rotation time counters. The developer counter of the DV unit installed is reset. Section Process (OPC drum, developing, transfer, cleaning) Item Counter Operation/Procedure Select with 10 digit key pad and press START key. The procedure below is executed and the display returns to the original state. 1: Counter is cleared 2: Not cleared
SIMULATION 24-11 TIMER DATA CLEAR. SELECT1-3, AND PRESS START. 1. DRUM ROTATION (CARTRIDGE) 2. DV ROTATION (CARTRIDGE) 3. TONER SUPPLY (CARTRIDGE)
SIMULATION 24-10 FAX COUNTER DATA CLEAR. SELECT1-6, AND PRESS START. 1. FAX SEND 2. FAX RECEIVED 3. FAX OUTPUT 4. SEND IMAGES 5. SEND TIME 6. RECEIVE TIME
SIMULATION 24-10 FAX SEND COUNTER DATA CLEAR. ARE YOU SURE? 1. YES 2. NO

SIMULATION 24-11

<List of set values> FAX SEND: Number of times of FAX sending FAX RECEIVE: Number of times of FAX reception FAX OUTPUT: FAX print quantity SEND IMAGES: Sending quantity SEND TIME: Time for sending RECEIVE TIME: Time for reception
DRUM ROTATION COUNTER DATA CLEAR. ARE YOU SURE ? 1. YES 2. NO
<List of set values> 3 Drum rotating time (cartridge) Developing unit rotating time (cartridge) Toner supply time (cartridge)
Purpose Function (Content) Section Item Operation/Procedure Data clear Used to clear each counter in the scanner mode. Counter Select with 10 digit key pad and press START key. The procedure below is executed and the display returns to the original state. 1: Counter is cleared 2: Not cleared
SIMULATION 24-15 NETWORK SCANNER COUNTER CLEAR.SELECT1-3, AND PRESS START. 1.NETWORK SCANNER ORIGINAL COUNTER 2.MAIL COUNTER 3.FTP COUNTER

SIMULATION 46-13 EXP. LEVEL SETUP FAX(NORMAL). SELECT 1-5, AND PRESS START. (FEED TRAY) 1. TRAY1 2. TRAY2 3. TRAY3 4. TRAY4 5. BPT
<List of set values 1> 2 Paper feed tray selection Copy start (Default) FAX mode exposure setup
SIMULATION 46-13 EXP. LEVEL SETUP FAX(NORMAL). SELECT 3-5, AND PRESS START. (EXP. LEVEL SELECT) 3. AUTO 4. LIGHT 5. DARK
AR-M350 SIMULATIONS 10-40
<List of set values 1> Paper feed tray selection Print start (Default) Exposure level selection Auto Bright Dark
SIMULATION 46-14 EXP. LEVEL SETUP FAX(FINE). SELECT 0-8, AND PRESS START. 0. TRAY SELECT 1 1. PRINT START 2. EXP LEVEL 1 3. AUTO 4. LIGHT 5. DARK 6. AUTO(H) 50 7. LIGHT(H) 50 8. DARK(H) 50 Select other than 0 - 2, and press [START] key. Press [CUSTOM SETTING] key.
NOW COPYING DOOR OPEN. JAM PAPER EMPTY.
<List of display values 1> Normal display ERROR display Door open Jam paper empty
SIMULATION 46-14 EXP. LEVEL SETUP FAX(FINE),INPUT VALUE 0-99, AND PRESS START. 2. AUTO Select 1, and press [START] key. Press [START] key.
SIMULATION 46-14 EXP. LEVEL SETUP FAX(FINE). NOW COPYING. Select 0, and press [START] key. Press [START] key or press [CUSTOME SETTING] key.
<List of set values 3> 5 Auto Bright Dark
SIMULATION 46-14 EXP. LEVEL SETUP FAX(FINE). SELECT 1-5, AND PRESS START. (FEED TRAY) 1. TRAY1 2. TRAY2 3. TRAY3 4. TRAY4 5. BPT Select 2, and press [START] key.
Adjustment Used to adjust the reading density in the FAX mode (small text mode). (Only when FAX is installed.)
Section Item Picture quality Operation/Procedure The exposure mode to be set is selected. (FAX small text mode individual adjustment) 1) The current set value is highlighted on the right side of each item. In this screen, be sure to select "1: COPY START." (Set value: 1) 2) Set the exposure level with 10 digit key pad. Press P to store the set value. (Default: 50, set range: 0 - 99) 3) Press START, and copying is started and the set value is stored. (Display value 1) 4) Select a paper feed tray. (Set value 2) 5) Select an exposure level. (Set value 3)

Section Item Picture quality Operation/Procedure Perform the copy lead edge adjustment. 1) The current set value is highlighted on the right of each item. In this screen, be sure to select "1: COPY START." (Set value: 1) 2) Enter the correction value with 10 digit key pad. Press P to store the set value. 3) Press START to start copying and store the set value. (Display value: 1) 4) Set the scan magnification ratio. (Set value: 3)
Lead edge void quantity set 35 value Void quantity adjustment value 35
SIMULATION 50-1 LEAD EDGE ADJUSTMENT. SELECT 0-9, AND PRESS START. 0. TRAY SELECT 1 1. COPY START 2. MAGNIFICATION 100 3. RRCA 50 4. RRCB 50 5. DENB 30 6. IMAGE LOSS(LEAD) 15 7. IMAGE LOSS(SIDE) 20 8. DENA 50 9. FR_VOID 30 Select other than 0 - 2, and press [START] key. Press [CUSTOM SETTING] key. SIMULATION 50-1 LEAD EDGE ADJUSTMENT. INPUT VALUE 0-99, AND PRESS START. 3. RRCA Select 1, and press [START] key. Press [START] key.
<List of display values 1>
Normal display ERROR display
Door open Jam Paper empty
SIMULATION 50-1 LEAD EDGE ADJUSTMENT. NOW COPYING. Select 0, and press [START] key. Press [START] key or press [CUSTOME SETTING] key.
SIMULATION 50-1 LEAD EDGE ADJUSTMENT. SELECT 1-5, AND PRESS START. (FEED TRAY) 1. TRAY1 2. TRAY2 3. TRAY3 4. TRAY4 5. BPT Select 2, and press [START] key. SIMULATION 50-1 LEAD EDGE ADJUSTMENT. (MAGNIFICATION) INPUT 25-400(%)
AR-M350 SIMULATIONS 10-48
Purpose Function (Content) Adjustment Used to adjust the copy image position and the void area (image loss) on print paper in the copy mode. (This simulation is a simpler procedure compared to the similar adjustment using SIM 50-1.) 0 TRAY SELECT 1 COPY START Paper feed tray selection Copy start (Initial value)
Default Set range ~ ~ ~ ~ ~ ~ ~ ~ 99 1~5
2 MAGNIFICATION Print magnification ratio setup 3 LLIMAGE LOSS (LEAD) 6 IMAGE LOSS (SIDE) 7 DENB 8 DENA 9 FR_VOIDFR Document scan start position adjustment Resist roller clutch ON timing adjustment value Rear edge void quantity adjustment value Lead edge image loss quantity set value Side image loss quantity set value Lead edge void quantity set value Void quantity adjustment value

Press [CUSTOM SETTING] key. SIMULATION 66-4 SIGNAL OUTPUT CHECK.(LEVEL MAX) SELECT 1-32, AND PRESS START. 1.NOSIGNAL 2.33.6 V34 3.31.2 V34 4.28.8 V34 5.26.4 V34 6.24.0 V34 7.21.6 V34 8.19.2 V34 9.16.8 V34 10.14.4 V34 11.12.0 V34 12.9.6 V34 13.7.2 V34 14.4.8 V34 15.2.4 V34 16.14.4 V33 17.12.0 V33 18.14.4 V17 19.12.0 V17 20.9.6 V17 21.7.2 V17 22.9.6 V29 23.7.2 V29 24.4.8 V27t 25.2.4 V27t 26.0.3 FLG 27.CED 2100 28.CNG 1100 29.0.3 V21 30.ANSam 31.RINGER 32.No RBT
AR-M350 SIMULATIONS 10-62
Purpose Function (Content) Operation test, check Used to check the operations of data signal output in the FAX data output mode. (Used to check the MODEM operation.) Signals are sent in the send level set with the soft switch. (Only when FAX is installed.) Section FAX Item Operation Operation/Procedure Signal output check (Send level is set with the soft SW.) When CUSTOM SETTING is pressed during execution of this simulation, execution is stopped. Enter a number and press START to change the kind of signal.
SIMULATION 66-5 SIGNAL OUTPUT CHECK.(SOFT SW.) SELECT 1-32, AND PRESS START. 1.NOSIGNAL 2.33.6 V34 3.31.2 V34 4.28.8 V34 5.26.4 V34 6.24.0 V34 7.21.6 V34 8.19.2 V34 9.16.8 V34 10.14.4 V34 11.12.0 V34 12.9.6 V34 13.7.2 V34 14.4.8 V34 15.2.4 V34 16.14.4 V33 17.12.0 V33 18.14.4 V17 19.12.0 V17 20.9.6 V17 21.7.2 V17 22.9.6 V29 23.7.2 V29 24.4.8 V27t 25.2.4 V27t 26.0.3 FLG 27.CED 2100 28.CNG 1100 29.0.3 V21 30.ANSam 31.RINGER 32.No RBT
Purpose Function (Content) User data output, check (display, print) Used to print the confidential password. (Used when the confidential password is forgotten.) (Only when FAX is installed.) Section Fax Item Data Operation/Procedure The confidential pass code is printed. 1) The currently selected data is displayed on the side of menu. 2) The paper size is automatically selected by the size stored in the image memory.
SIMULATION 66-5 SIGNAL OUTPUT CHECK.(SOFT SW.) SELECT 1-32, AND PRESS START. EXECUTING. 1.NOSIGNAL 2.33.6 V34 3.31.2 V34 4.28.8 V34 5.26.4 V34 6.24.0 V34 7.21.6 V34 8.19.2 V34 Same 9.16.8 V34 10.14.4 V34 11.12.0 V34 12.9.6 V34 display 13.7.2 V34 14.4.8 V34 15.2.4 V34 16.14.4 V33 17.12.0 V33 18.14.4 V17 19.12.0 V17 20.9.6 V17 21.7.2 V17 22.9.6 V29 23.7.2 V29 24.4.8 V27t 25.2.4 V27t 26.0.3 FLG 27.CED 2100 28.CNG 1100 29.0.3 V21 30.ANSam 31.RINGER 32.No RBT
SIMULATION 66-6 PASS CODE PRINT OUT. PRESS START 1. PRINT START Select 1 and press [START] key.

Purpose Function (Content) Setup Used to check the output operation of FAX G3 mode 300BPS. (Used to check the MODEM operation.) Signals are sent in the send level set with the soft switch. (Only when FAX is installed.) Section FAX Item Operation Operation/Procedure A signal of 300bps is outputted. (Send level is set with SW.) Enter a number during execution to change the signal. Press START to start sending a voice message. Press CUSTOMSETTING to terminate.
SIMULATION 66-11 300bps SIGNAL OUTPUT.(LEVEL MAX) SELECT 1-6, AND PRESS START. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001 Select 1 and press [START] key. Press [CUSTOM SETTING] key.
SIMULATION 66-12 300bps SIGNAL OUTPUT.(SOFT SW.) SELECT 1-6, AND PRESS START. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001 Select 1 and press [START] key. Press [CUSTOM SETTING] key.
SIMULATION 66-11 300bps SIGNAL OUTPUT.(LEVEL MAX) SELECT 1-6, AND PRESS START. EXECUTING. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001 Select 3 and press [START] key. SIMULATION 66-11 300bps SIGNAL OUTPUT.(LEVEL MAX) SELECT 1-6, AND PRESS START. EXECUTING. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001 Press [CUSTOM SETTING] key. SIMULATION 66-11 300bps SIGNAL OUTPUT.(LEVEL MAX) SELECT 1-6, AND PRESS START. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001
SIMULATION 66-12 300bps SIGNAL OUTPUT.(SOFT SW.) SELECT 1-6, AND PRESS START. EXECUTING. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001 Select 3 and press [START] key. SIMULATION 66-12 300bps SIGNAL OUTPUT.(SOFT SW.) SELECT 1-6, AND PRESS START. EXECUTING. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001 Press [CUSTOM SETTING] key. SIMULATION 66-12 300bps SIGNAL OUTPUT.(SOFT SW.) SELECT 1-6, AND PRESS START. 1.NO SIGNAL 2.11111 3.11110 4.00000 5.010101 6.00001
<List of set values> NO SIGNAL 00001 No signal <List of set values> NO SIGNAL 00001 No signal
AR-M350 SIMULATIONS 10-66
Purpose Function (Content) Setup Used to select the FAX dial signal output test. (The dial number signal set with this simulation is outputted in the dial signal output test with SIM 66-14~16) (Only when FAX is installed.) Section FAX Item Data Operation/Procedure The dial test number is set. Enter a number with 10 digit key pad, * key, and # key. The upper limit is 20 digits. Press CLEAR to return to the initial state. Press START to register.
Purpose Function (Content) Setup Used to set the add time to the FAX pulse dial mode (20PPS) and to test the dial signal output. (The dial number signal set with SIM 66-13 is outputted.) Used to check dialing troubles and the operation. (Only when FAX is installed.) Section Fax Item Operation Operation/Procedure The dial test is performed. (20PPS output) The make time is set. When CUSTOM SETTING is pressed, the execution is terminated.
SIMULATION 66-13 DIAL TEST NUMBER SETTNG. INPUT NUMBER AND PRESS START. 0123456789*#01234567

MAIN SUB UContent Detail Cause EEPROM read/write error (Controller) EEPROM write error EEPROM trouble EEPROM is not initialized. Controller PWB EEPROM access circuit trouble
Check and Use DIAG (SIM25-2) to perform auto remedy developer adjustment. EU Content Detail Cause Auto developer adjustment trouble (Under-toner) The sample data is of 168 or above when auto developer adjustment is performed. Insufficient toner concentration Charging voltage, developing voltage abnormality Insufficient toner concentration Developing unit trouble PCU PWB trouble
Check and Check that EEPROM is properly inserted. remedy Save the counter/adjustment values with the DIAG simulation. Use DIAG (SIM16) to cancel U2 trouble. Replace the Controller PWB. 11 Content Detail Cause Counter check sum error (Controller) Counter data area check sum error EEPROM trouble Control circuit trouble by noise Controller PWB EEPROM access circuit trouble
Check and Check that EEPROM is properly inserted. remedy Save the counter/adjustment values with the DIAG simulation. Use DIAG (SIM16) to cancel U2 trouble. Replace the Controller PWB. 12 Content Detail Cause Adjustment value check sum error (Controller) Adjustment data area check sum error EEPROM trouble Control circuit trouble by noise Controller PWB EEPROM access circuit trouble
Check and Use DIAG (SIM25-2) to perform auto remedy developer adjustment. FContent Detail Cause PRT Centro port check error Controller Centro port trouble Centro port trouble Controller PWB trouble
Check and Replace the Controller PWB. remedy 03 Content Detail Cause NIC port check error NIC port check error NIC port trouble NIC PWB trouble Controller PWB trouble
Check and Check that EEPROM is properly inserted. remedy Save the counter/adjustment values with the DIAG simulation. Use DIAG (SIM16) to cancel U2 trouble. Replace the Controller PWB. 80 Content Details Cause EEPROM read/write error (Scanner) Scanner EEPROM write error EEPROM abnormality EEPROM which is not initialized is installed. Hang of control circuit due to noises Scanner PWB EEPROM access circuit abnormality Check that EEPROM is set properly. Record counter/adjustment values with the simulation to protect the data from being deleted. Cancel U2 trouble with SIM 16. Replace scanner PWB. Memory check sum error (Scanner) Scanner memory check sum error EEPROM trouble Control circuit freeze by noises Scanner PWB EEPROM access circuit trouble Check that EEPROM is set properly. Record counter/adjustment values with the simulation to protect the data from being deleted. Cancel U2 trouble with SIM 16. Replace scanner PWB.

E. Writing to the trouble memory
In this series, the simulation (diag) allows to select whether the same trouble is written to the trouble memory when it occurs. If the DIAG simulation is set as above, when any trouble occurs, its hysteresis is written to the trouble memory. DIAG(SIM 26-35) 0: The same trouble as the previous one is not recorded. (Default) 1: When a trouble occurs, it is written to the trouble memory without exception.
AR-M350 TROUBLE CODES 11-12

SCANNER UNIT OP PANEL

FAX UNIT

LCD OPE PWB

FFC 6Pin 30Pin

Paper exit detection

TEL/LIV PWB

OPTION)

HAND SET

(JAPAN ONLY

DELIVERY POD3 POD2

Ozone exhaust fan

1. Block Diagram

TOUCH PANEL

BACK LIGHT

INVERTER PWB

BUZZER
MDMC PWB Speaker P-OPE PWB

(OPTION)

FFC 4Pin 3Pin FFC 24Pin FFC 30Pin SCSI 26Pin

FFC 20Pin

Front door open detection

CCD PWB

Controller cooling fan

LVDS PWB

FAX I/F PWB

FFC 24Pin 32Pin

Heat exhaust fan

Left door open detection

(JAPAN STD.)

FFC 5Pin

(Oversea STD.)

SCN JNT PWB

B to B
(Interface Cable) (SCSI Cable 68Pin) (OPTION)

CL STMP MFP

50Pin FFC 8Pin 28Pin 28Pin FFC

100Pin

MOTHE BOARD
TONER HOPPER TM CRU DV unit TCS DVCH PSPS
Toner concentration sensor Paper separation solenoid

CIS un

CIS CNT CONTROL PWB

[12] ELECTRICAL SECTION

SPF MOTOR

SCANNER PWB

SPF Original set sensor

3Pin 13Pin

COIN VENDER
SPF Paper feed cover sensor

AUDITOR

CRU/SRU

FFC 8Pin

MAIN DRIVE DM
SPF Original resist front sensor

SPPD PNC

SCANNER M

(OPTION) POLYGON M

!"#$
SPF Original stopper solenoid