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Tektronix 1502CTektronix 1502C Cable Testers Metallic (TDR LAN CATV)
Tektronix 1502C for buy - rent or request a quote.

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Brand: Tektronix
Part Number: 1502C


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Manual

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Tektronix 1502C

 

 

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Repacking for Shipment

When the 1502C is to be shipped to a Tektronix Service Center for service or repair, attach a tag showing the name and address of the owner, name of the individual at your firm who may be contacted, the complete serial number of the instrument, and a description of the service required. If the original packaging is unfit for use or is not available, repackage the instrument as follows: 1. Obtain a carton of corrugated cardboard having inside dimensions that are at least six inches greater than the equipment dimensions to allow for cushioning. The test strength of the shipping carton should be 275 pounds (102.5 kg). Refer to the following table for test strength requirements:
SHIPPING CARTON TEST STRENGTH Carton Test Strength (lb) Gross Weight (lb) 600
CAUTION. The battery pack should be removed from the instrument before shipping. If it is necessary to ship the battery, it should be wrapped and secured separately before being packed with the instrument.
2. Install the front cover on the 1502C and surround the instrument with polyethylene sheeting to protect the finish. 3. Cushion the instrument on all sides with packing material or urethane foam between the carton and the sides of the instrument. 4. Seal with shipping tape or an industrial stapler. If you have any questions, contact your local Tektronix Field Office or representative.

Operating Instructions

Overview

Handling

The 1502C front panel is protected by a watertight cover, in which the standard accessories are stored. Secure the front cover by snapping the side latches outward. If the instrument is inadvertently left on, installing the front cover will turn off the POWER switch automatically. The carrying handle rotates 325 and serves as a stand when positioned beneath the instrument. Inside the case, at the back of the instrument, is a moisture-absorbing canister containing silica gel. In extremely wet environments, it might be be necessary to periodically remove and dry the canister. This procedure is explained in the 1502C Service Manual. The 1502C can be stored in temperatures ranging from 62 C to +85 C. However, if the temperature is below 40 C or above +55 C, the battery pack should be removed and stored separately. Battery storage temperature should be 40 C to +55 C.

Display

Power Type Waveform Cursor Front-Panel to Cursor Distance Window
View Input Indicator View Store Indicator View Difference Indicator Store Indicator
O N O F F O F F O F F 1 avg
Selected Selected Selected Noise Filter Vertical Scale Distance per Division
Figure 14: Display and Indicators

Front-Panel Controls

1. CABLE: A female BNC connector for attaching a cable to the 1502C for testing.
2. NOISE FILTER: If the displayed waveform is noisy, the apparent noise can be reduced by using noise averaging. Averaging settings are between 1 and 128. The time for averaging is directly proportional to the averaging setting chosen. A setting of 128 might take the instrument up to 35 seconds to acquire and display a waveform. The first two positions on the NOISE FILTER control are used for setting the vertical and horizontal reference points. The selected value or function is displayed above the control on the LCD. 3. VERT SCALE: This control sets the vertical sensitivity, displayed in mr per division, or the vertical gain, displayed in dB. Although the instrument defaults to millirho, you may choose the preferred mode from the Setup Menu. The selected value is displayed above the control on the LCD. 4. DIST/DIV: Determines the number of feet (or meters) per division across the display. The minimum setting is 0.1 ft/div (0.025 meters) and the maximum setting is 200 ft/div (50 meters). The selected value is displayed above the control on the LCD. A standard instrument defaults to ft/div. A metric instrument (Option 05) defaults to m/div, but either may be changed temporarily from the menu. The default can be changed by changing an internal jumper (see 1502C Service Manual and always refer such changes to qualified service personnel).

DIST/DIV

.4.3.5.6.03.7.02.9.8.01.00.04.05.06.07.08.09
5. Vp: The two Velocity of Propagation controls are set according to the propagation velocity factor of the cable being tested. For example, solid polyethylene commonly has a Vp of 0.66. Solid polytetraflourethylene (Teflon ) is approximately 0.70. Air is 0.99. The controls are decaded: the left control is the first digit and the right control is the second digit. For example, with a Vp of 0.30, the first knob would be set to.3 and the second knob to.00. 6. POWER: Pull for power ON and push in for power OFF. When the front cover is installed, this switch is automatically pushed OFF. 7. n POSITION: This is a continuously rotating control that positions the o displayed waveform vertically, up or down the LCD.

Where: RL is the load impedance, and ZO is the characteristic impedance.

RL - ZO RL + ZO

The 1502C instrument is comprised of several subsections, as shown in the block diagram (Figure 51). These are organized as a processor system, which controls several peripheral circuits to achieve overall instrument performance. The processor system reads the front-panel control settings to determine the cable information that you selected for viewing. Distance settings are converted to equivalent time values and loaded into the timebase circuits. The timebase generates repetitive strobe signals to trigger the driver/sampler circuits. Pulse strobes cause a step to be applied to the cable under test. Sample strobes causes a single sample of the cable voltage to be taken during a very short interval. The timebase precisely controls the time delay of the sample strobe relative to the pulse strobe. When many sequential samples are recombined, a replica of the cable voltage is formed. This sampling technique allows extremely rapid repetitive waveforms to be viewed in detail.

Front Panel Drivers LCD

Front End Driver Hybrid Sampler
Controls, LCD Bias and temp. compensation Digital Bus Main Board CPU
Timebase Digital Z80 Analog

RAM ROM

Signal Processing Decoding Offset Gain

Option Port

A/D converter
Power Bus Power Supply Control AC to DC Converter Battery DC to DC Converter
Figure 51: System Block Diagram
Referring to the waveforms in Figure 52, cable voltage waveforms are shown at the top. Each step is from the pulse generator and all steps are identical. At time delays (tn, tn+1, tn+2, etc.) after the steps begin, a sample of the step amplitude is taken. Each of these samples is digitized and stored in the processor until sufficient points are accumulated to define the entire period of interest. The samples are then processed and displayed at a much slower rate, forming the recombined waveform as shown. This process allows the presentation of waveforms too rapidly to be viewed directly.

Voltage samples

Recombined samples
Figure 52: Waveform Accumulation Diagram Voltage samples from the driver/sampler are combined with a vertical position voltage derived from the front-panel control, then amplified. The amplifier gain is programmed by the processor to give the selected vertical sensitivity. Each amplified sample voltage is then digitized by an analog-to-digital converter and stored in the processor memory. When the processor has accumulated sufficient samples (251) to form the desired waveform, the samples are formatted. This formatted data is then transferred to the display memory. The display logic routes the data to each pixel of the LCD, where each digital data bit determines whether or not a particular pixel is turned on or off. Between each waveform, samples are taken at the cursor location for the ohms at cursor function, and at the leading edge of the incident step for use by the timebase correction circuit. Cursor and readout display data is determined by the processor and combined with the formatted sample waveform before it is sent to the display.

Cable voltage

Power Supply
The power supply consists of the following:

H H H H H H

Primary Circuit Pre-regulator Battery Charger Deep Discharge Protection Port-regulator DC-to-DC Converters
The power supply converts either 115/230 VAC line power, or takes power from a lead-gel battery, and provides the instrument with regulated DC voltages. A block diagram of the power supply is shown in Figure 53.
Instr. Pwr. Switch + 15.8 VDC Battery Charger + 12 VDC

115/230 volt AC line

EMI Line Filter
Fuse and Line Select Switch

Step down XFMR

Rectifier & Filter Cap.

+ 30 VDC

Switcher & Prereq.

Battery

+ 10 to 15.5 VDC

Transistor Power Switch

Switcher and Postregulator
+ 16.2 VDC DC to DC Converter

+ 16 VDC

5 VDC 15 VDC

DC Power to Instrument

Deep Discharge Protection Power Status
Figure 53: Power Supply Block Diagram Single-phase AC line voltage is applied to the power supply module through a power plug with internal EMI filter. The filtered line voltage is immediately fused, routed through a line selector switch and applied to a stepdown transformer. The transformer secondary voltage is rectified and power switched to power the post regulator.
A switching pre-regulator reduces this voltage to +15.8 VDC and is used to power the battery charger. This voltage is also processed through a rectifier and power switch to power the post-regulator. If a battery is installed, the battery charger operates as a current source to provide a constant charging current. Voltage limiting circuits in the charger prevent battery overcharge by reducing the charge current as the battery voltages approaches +12.5 VDC. The battery provides a terminal voltage of 10 to 12.5 VDC, with a nominal capacity of up to 2.0 Amp-Hours. It also is connected through a rectifier to the instruments power switch and post-regulator. When the power switch is closed, an FET power transistor is momentarily turned on by the deep discharge protection circuit. If the voltage to the post-regulator rises to +9.7 VDC or greater, the transistor switch remains on. If at any time, the voltage drops below +9.7 VDC, the transistor turns off and the power switch must be recycled to restart the instrument. This operation prevents discharge of the battery below +10 VDC. Such a discharge could cause a reverse charge in a weak cell, resulting in permanent cell damage. The post-regulator is a boost switching regulator that increases its input voltage to a constant +16.2 VDC output. This voltage is supplied directly to the processor for large loads, such as the display heater, electroluminescent backlight, and options port. The post-regulator also supplies a DC-to-DC converter that generates 5 VDC and 15 VDC for use in the instrument.

Battery Charger

The battery charger consists of a linear regulator integrated circuit, U2010, and associated components. U2010 is connected as a current source, drawing current from the +15.8 VDC and supplying it to the battery through T2012. The voltage drop across T2012 is fed back to U2010 through diode CR2014 to control charging current at a nominal 150 mA. Diode CR2013 and voltage divider R2010 and R2011 provide a voltage clamp to U2010s feedback terminal to limit the maximum voltage that can be applied to the battery through CR2015. As the voltage R2012 and CR2015 approaches the clamp voltage, battery charging current is gradually reduced to trickle charge. Rectifier CR2015 prevents battery discharge through the charger when AC line voltage is not present. Rectifier CR2012 allows the battery to power the instrument when AC power is not present.
Deep Discharge Protection
Pre-regulator or battery voltage is applied to Q2011 and Q2012 when the instrument power switch is pulled on. The rising voltage causes Q2011 and Q2012 to turn on due to the momentary low gate voltage while C2011 is charging. During this time, voltage comparator U1020A compares the switched voltage to a +2.5 VDC reference from U1022. If the voltage is greater than +9.7 VDC, U1020A turns on, drawing current through Q2010 and R2015 to keep the gates of Q2011 and Q2012 near ground and the transistors turned on. If the voltage is less than +9.7 VDC (or drops to that value later), U1020A and Q2010 turn off, allowing C2011 to charge to the input voltage and turn off Q2011 and Q2012. When turned off, the deep discharge protection circuit limits current drawn from the battery to only a few microamperes. The post-regulator receives from +9.7 to +15.5 VDC and boosts it to +16.2 VDC by switching Q2022 on and off with a pulse-width modulated signal. When Q2022 is turned on, input voltage is applied across choke L2020, causing the current in L2020 to increase. When Q2022 is turned off, the stored energy in L2020 will cause

Post-Regulator

the current to continue flowing through CR2021 to filter capacitor C2025. Due to its stored energy, the voltage developed across L2020 adds to the input voltage, allowing C2025 to be charged to a voltage greater than the input. The switching of Q2022 is controlled by pulse-width modulator U1023. The post-regulator output voltage is fed back to U1023 through R1025 and R1024 and compared to the +2.5 VDC reference from U1022. Low output voltage causes wider pulses to be supplied to Q2022, storing more energy in L2020 during each pulse. This results in a higher output voltage. High output voltage, however, reduces pulse width and reverses the preceding process. U1023 oscillates at approximately 80 kHz and supplies a synchronizing signal to the pre-regulator at that frequency when the instrument is operating on AC power. This raises the pre-regulator frequency to the same 80 kHz. This synchronization eliminates beat frequency interference between the two regulators. The synchronizing signal from U1023 is also supplied to Q2021, where it is amplified to CMOS levels and buffered by gate U2030A. The signal is then used to clock flip-flop U1024B to produce a 40 kHz square wave output at Q and Q. These square waves are buffered by other U2030 inverters and used to drive DC-to-DC transistors Q2030 and Q2031.

SWITCHED POWER

SUPPLY CONTROLLER
DATA ADDRESS CONTROL BUFFERS

OUTPUT LATCH

Figure 55: Option Port Interface Block Diagram

Supply Control

The +16 VDC and +5 VDC power outputs to the option port are switched supplies controlled by the microprocessor system. CS14 and CS15 are used to set and clear flip-flop U1011B. This feeds comparators U1012A and U1012B. The positive (+) input to the comparators is set at 2.5 volts, so the CMOS flip-flop will drive the negative () terminals above and below that voltage level. The comparators are powered with a +16 VDC and a 12 VDC source to give a good output swing in controlling the FET switches. The output of U1012A controls the +16 VDC switch and is pulled up via a 20 kW resistor, R2011. The output is also passed through two 100 kW resistors, R2012 and R2013, to prevent the FETs from being over-driven. Two parallel FETs, Q2011 and Q2012, control the supply. To reduce the instantaneous draw from the instrument supply when first turning the switch on, capacitive feedback is used (C2016). This feedback slows the turn-on time, allowing a capacitive load to be charged without affecting the instrument supply. A stabilizing 100 W resistor, R2010, is also located in the feedback loop.
NOTE. There are specified limits to this type of circuitry. Load specifications must be followed. The arrangement of the +5 VDC switch is similar except that a 10 kW to 100 kW resistive divider is used to ensure the switch has a definite turn-on. A single FET, Q1010, controls the +5 VDC output.

Buffers

Data lines to the option port pass through the bus transceiver, U2011. Address lines RD and WR are driven by U2012. CS22, from the processor system, enables these drivers with RD controlling the transceiver direction. U2012 outputs are pulled up by the switched +5 VDC supply, via R2015. The data lines are pulled down via R2014. WR is a modified write pulse 200 ns long, created to give a rising edge prior to the disabling of the drivers. This pulse is created by flip-flop U2033A.

Output Latch

The output latch U1011A is controlled by A0 and A1, with select signal CS10. The output of this latch is optionally used in the interface protocol. Two more lines are used in the option port interface. IR4 is an interrupt signal that is active low when creating processor interrupts. R-T TRIG is also available at the interface. This is the trigger pulse generated in the analog timebase.
Option Port Wiring Configuration

J2010 (on Main Board)

Option Port (D-Connector)
D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 RD WR CS22
IA IR4 R-T TRIG SW+16 +16RTN SW+5 +5RTN
J2010 (on Main Board) 4 15
Option Port (D-Connector) 15 8

Video Processor

The video processor system consists of the following:

H H H H

Vertical Position DAC Summing Amplifier Video Amplifier Video DAC
The video processor receives sampled video from the driver/sampler and outputs a digitized video signal to the processor system data bus. A block diagram of the video processor is shown in Figure 56.

INTERRUPT REQUEST

DATA BUS Sampled Video from Driver/Sampler DATA CONTROL VERTICAL POSITION DAC

VIDEO ADC

CONTROL SUMMER AMPLIFIER

COMBINED VIDEO

VIDEO AMPLIFIER

DATA CONTROL

Figure 56: Video Processor Block Diagram Vertical position information is loaded by the processor system into a DAC to generate a DC signal. Sampled video is combined with this vertical position DC voltage in a summing amplifier in order to allow vertical positioning of the displayed waveform.
The combined video and position signal is amplified by the user-selected gain in the video amplifier. Gain of the amplifier is set by the processor system via the data bus and video amplifier select signal. The amplified video is digitized by the video ADC upon receipt of a control signal from the processor system. The processor is notified by the ADC interrupt request when the conversion has been completed. The processor then reads the value via the data bus.

Vertical Position DAC

The vertical position DC voltage is generated by a digital-to-analog converter consisting if U2046 and U3041. DAC integrated circuit U2046 receives a +2.5 VDC reference voltage from U3040 and multiplies it by a 14-bit digital value loaded from the data bus under control of the processor. The resulting current output of U2046 is amplified by operational amplifier U3041 to a proportional voltage of zero to 2.5 VDC. The summing amplifier consists of operational amplifier U8041; input resistors R8044, R8046, and R8047; and a feedback resistor, R8045. Summation of the DAC output through R8047 with the +2.5 VDC reference through R8046 causes the vertical position signal range to be enlarged and shifted to achieve an effective output of 2.5 VDC to +2.5 VDC. Sampled video, through R8044, is summed with the vertical position signal at the input node of U8041. Resistor T8045 determines the gain of U8041 and is paralleled with C8040 to reduce high frequency gain for noise reduction. The sampled video input may be observed at TP9041.

20 MHz CLK

START PULSE VAR. DELAY RAMP TO SET DELAY ZERO COMPARATOR LEVEL SET SO SAMPLE TAKEN AT 10% POINT ON OUTPUT PULSE PULSE OUT 10% LEVEL 4V = 50ns DELAY COMPARATOR OUTPUT DELAY ZERO SET 0V COMPARATOR LEVEL = 0 DELAY 50 ns RAMP SET FIXED CIRCUIT DELAYS 50 ns DELAY 50 ns RAMP START COMPARATOR LEVEL SET TO SAMPLE PULSE AT 10% POINT ON OUTPUT PULSE 0V = 0 DELAY
TP2031 PULSE TRIG DIGITAL DELAY
TRIG TO PULSE GEN. TP9011
Figure 511: Calibration of Delay Zero and 50-ns Analog Delay

TRIG TO SAMPLER TP7010

SAMPLE TRIG TP2030

Digital Timebase

All digital clocks from the instrument are derived from a 20 MHz crystal oscillator, U2031. Flip-flops U2042A and U2042B divide the clock frequency to 10 MHz and 5 MHz respectively. The 5 MHz output is provided to the microprocessor and to TP2041. Gate U2034B decodes one of the four states if U2042 and provides a 5 MHz pulse to U2033B. Flip-flop U2033B is clocked by the 20 MHz clock and divides the 5 MHz signals to 2.5 MHz synchronously with the 20 MHz. The 2.5 MHz clock is further divided to 1.25 MHz by U2025A and 625 kHz by U2025B. The PRT, coarse delay, and real-time counters are contained in a triple, 16-bit, programmable counter device, U2030. The PRT and coarse delay counters are clocked at the 2.5 MHz rate. The output of the PRT counter, pin 10 of U2030, is applied to the trigger input of the coarse delay counter as a start-count signal. The negative-going pulse from the coarse delay counter, pin 13 of U2030, is input to a two-stage shift register, U2032C and U2032D. This shift register is also clocked at 2.5 MHz and serves to delay the signal and reduce its skew relative to the 20 MHz clock. The Q (inverted output) of U2032C is a positive-going pulse that is supplied to a three-stage shift register, U2036B, U2036D, and U2036A, which is clocked at 20 MHz from inverter U2034A. The leading edge of the pulse is decoded by NAND gate U2045B, which also ANDs the signal with the 20 MHz clock from inverter U2045A. The resulting driver trigger pulse is a negative-going pulse of nominally 25 ns width. The falling edge of this pulse is determined by the edge of the 20 MHz input to gate U2045B and is used as the driver trigger. The coarse delay pulse from shift register U2032D and U2032C us decoded by NOR gate U2034C to detect the pulse rising edge (end of the negative pulse). The resulting positive pulse is 400 ns wide (one cycle of the 2.5 MHz clock). This pulse is shifted through flip-flop U2036C to synchronize it with the 20 MHz clock and applied to the count enable input of U2037, a four-bit programmable counter. Counter U2037 will have been preset to a count of 8 through 15 by the processor through latch U2043 with CS11. While the count enable pulse is present, it will count exactly eight times at the 20 MHz rate, thus passing through count 15 after 0 through 7 clock pulses. The terminal count (TC) output of U2037 is a decode of count 15. Thus this signal creates the fine delay pulse after the programmed delay. This positive-going pulse is gated with the 20 MHz clock by NAND gate U2045C to provide a 25 ns negative-going pulse for the ramp trigger. Ramp timing is derived from the trigger falling edge. The end of the coarse delay, detected by gate U2034C, is used to clock U2027A, which generates an interrupt request to inform the processor that a sample is being taken. An acknowledge pulse, CS16, from the address decoder resets this flip-flop.

Calibration

This chapter is divided into the Calibration Performance Check and the Adjustment Procedure. The Calibration Performance Check is a series of checks to compare the instrument parameters to the published specifications. This procedure is similar to the Operator Performance Check (Chapter 2), but additionally lists actions to take if the Calibration Performance Check is not met. The Adjustment Procedure is a series of steps designed to bring the instrument up to standards after repair or performance check.
Calibration Performance Check
The purpose of this procedure is to assure that the instrument is in good working condition and should be performed on an instrument that has been serviced or repaired, as well as at regular intervals. This procedure is not intended to familiarize you with the instrument. If you are not experienced with this instrument, you should read the Operation chapter of this manual before going on with these checks. If the instrument fails any of these tests, it should be calibrated or otherwise serviced. Many failure modes affect only some functions of the instrument.
Equipment 50W precision terminator 3-ft precision coaxial cable Tek Part Number 011012300 012135000
Disconnect any cables from the front panel CABLE connector. Connect the instrument to a suitable power source (a fully charged optional battery or AC line source). If you are using AC power, make sure the fuse and power selector switch on the rear panel are correct for the voltage you are using (115 VAC requires a different fuse than 230 VAC). Option 05 (metric) instruments default to m/div instead of ft/div. You can change this in the Setup menu, or you may use the metric numbers provided. To change the readings to ft/div, press the MENU button. Scroll down to Distance/Div is: m/div
and press MENU again. That menu line will change to Distance/Div is: ft/div. Exit by pressing MENU until the instrument returns to normal operation. If the instrument power is turned off, this procedure must be repeated when the instrument is again powered up. The metric default can be changed to standard default. See the Maintenance chapter of this manual for details.

Sampling Efficiency Check
If the instrument fails this check, the waveforms might not look normal. If the efficiency is more than 100%, the waveforms will appear noisy. If the efficiency is below the lower limit, the waveform will take longer (more pixels) to move from the bottom to the top of the reflected pulse. This smoothing effect might completely hide some events that would normally only be one or two pixels wide on the display. 1. While in the Service Diagnostic Menu, select the Sampling Efficiency Diagnostic and follow the directions shown on the display.
Exit Service Diagnostic Menu Sampling Efficiency Diagnostic Noise Diagnostic Impedance Diagnostic Offset/Gain Diagnostic RAM/ROM Diagnostics Timebase is: Normal Auto Correction Move
Figure 625: Service Diagnostic Menu
Sampling Efficiency Diagnostic Continuous Result Update

Acceptable Range 50% 90%

Result 63%
Push MENU button to Exit Figure 626: Sampling Efficiency Diagnostic NOTE. If the instrument does not pass this check, refer to the Circuit Descriptions chapter and the Troubleshooting section of the Maintenance chapter of this manual. 2. Press MENU once to return to the Service Diagnostic Menu. Do not exit from the Service Diagnostic Menu because you will use it in the next check.

Offset/Gain Check

If the instrument fails this check, it should not be used for loss or impedance measurements. 1. While in the Service Diagnostic Menu, select the Offset/Gain Diagnostic and follow the directions shown on the display.
Figure 627: Service Diagnostic Menu NOTE. The 48 dB step might fail intermittently. If a more accurate reading is desired, TP9041 on the Main Board or TP3051 on the Driver/Sampler Board must be grounded during the check. See the Maintenance chapter for the case and EMI shield removal instructions.
2. There are five screens of data presented in this diagnostic. The Pass/Fail level is 3% for worst case. 3. Press MENU once to return to the Service Diagnostic Menu. Do not exit from the Service Diagnostic Menu because you will use it in the next check.

RAM/ROM Check

If the instrument fails this check, various functions might be affected. Without the RAM/ROM functions operating correctly, it is doubtful you would have gotten this far. This check will give you assurance that the RAM/ROM circuits are operating properly. 1. In the Service Diagnostic Menu, select the RAM/ROM Diagnostics.
Figure 628: Service Diagnostic Menu 2. Press MENU. The diagnostic is automatic and will display the result on the LCD. 3. Turn the instrument off, then on again. This will reset it for the next check. NOTE. If the instrument fails any of the last three checks, refer to the Circuit Descriptions chapter and the Troubleshooting section of the Maintenance chapter of this manual.

267 LOWELL ROAD 1 TECHNOLOGY DR 4115 SPENCER STREET 2900 SEMICONDUCTOR DR PO BOX COLUMBIA AVE 11861 WESTERN AVE PO BOX BOWERS AVE PO BOX SCOTT BLVD PO BOX W TRIMBLE RD 3M AUSTIN CENTER 12920 NE 125TH WAY 927 E STATE PKY 520 E INDUSTRIAL PARK DR 2300 RIVERSIDE BLVD PO BOX SOUTH COLE RD SUITE BARRANCA PARKWAY SUITE BSALEM ST 1016 CLEGG COURT 9801 W HIGGINS RD 2601 WAYNE ST PO BOX S JEFFERSON RD 114 OLD STATE RD PO BOX 14460 PO BOX N BROAD ST 400 REIMANN AVE 800 E NORTHWEST HWY 14150 SW KARL BRAUN DR PO BOX HILLGROVE AVE PO BOX 10373 COUPLES DEPT C PORTER STS PO BOX 12TH AVE PO BOX 609
HUDSON NH 03051 NORWOOD MA 02062 TORRANCE, CA 905032489 SANTA CLARA CA 950510606 GREENVILLE SC 29606 RIVERSIDE CA 925072114 GARDEN GROVE CA 92641 MELBOURNE FL 329020883 SANTA CLARA CA 95051 SANTA CLARA, CA 950528062 SAN JOSE CA 951311008 AUSTIN TX 787692963 KIRKLAND WA 980347716 SCHAUMBURG IL 601954526 MANCHESTER NH 03103 NORFOLK NE 687012242 BOISE ID 83705 IRVINE CA 92718 PROVIDENCE RI 02907 PETALUMA CA 949521152 ROSEMONT IL 600184771 ENDICOTT NY 137603272 WHIPPANY NJ 07981 ST LOUIS MO 63178 FORT DODGE IA 50501 PHILADELPHIA PA 191081001 SANDWICH IL 605481846 DES PLAINES, IL 600163049 BEAVERTON OR 970770001 LA GRANGE IL 605255914 JOPLIN MO 64801 COLUMBUS NE 686013632

Replaceable Parts List

Assy Number Tektronix Part Number Serial No. Effective Serial No. Discontd Qty Name & Description

CIRCUIT BOARD ASSEMBLIES

Mfr. Part Number

672139200

CKT BD ASSY:MAIN W/EPROM & BATTERY

670928504 670928505

B020000 B021284

B021283

CKT BD ASSYLMAIN W/O EPROM CKT BD ASSYLMAIN W/O EPROM

80009 80009

672139100
CKT BD ASSY:FRONT PANEL W/SWITCHES

650-3715-01 650-3715-02

B025588 B025588 B020000 B021284 B021283
POWER SUPPLY: MODULE POWER SUPPLY: MODULE CKT BD ASSY:POWER SUPPLY CKT BD ASSY:POWER SUPPLY (SCHEMATIC SET INCLUDES CHASSIS MOUNTED PARTS)
650-3715-01 650-3715-670928605

670928604 670928605

670929103 670929104
CKT BD ASSY:S/R DRIVER SAMPLER CKT BD ASSY:S/R DRIVER SAMPLER

672124100 118905001

B020000 B021405

B021404

CKT BD ASSY:DISPLAY MODULE CKT BD ASSY:DISPLAY MODULE (REPLACEABLE AS A UNIT ONLY)

CABLE/WIRE ASSEMBLIES

85 1502C MTDR Service Manual
Replaceable Parts List (Cont.)
Assy Number Tektronix Part Number Serial No. Effective Serial No. Discontd Mfr. Code

Name & Description

6721392XX
CKT BD ASSY:MAIN BD W/EPROM & BATTERY

A1U2020 A1BT1010

160901000 146004900
IC,MEMORY:EPROM,PROG BATTERY,STORAGE:3.5V,750MAH SFTY CONT

0B0A01295 0JR04 0JR0JR01295 01295
DS1210 MC74HC113N LM393P TC5564PL20 TC5564PL20 SN74HC138N TMPZ84C00AP6 MM74C30N MC74HC14N MM74C240 MC78L05ACPRP SN74HC20N SN74HC74N MC74HC27N SN74HC32N MC74HC245AN MM74HC244N DILB28P108 SN74HC138N SN74HC138N SN74HC74N SN74HC138N MC74HC113N SN74HC138N MC74HC113N P82C54 MXO55GA3I20M SN74ALS175N 74ALS113 SN74ALS02N SN74ALS175N SN74ALS161BN
A1A1U2021 A1A1U2022 A1A1U2023 A1A1U2024 A1A1U2025 A1A1U2026 A1A1U2027 A1A1U2030 A1A1U2031 A1A1U2032 A1A1U2033 A1A1U2034 A1A1U2036 A1A1U2037

156209600 156209800

A1A1U2040 A1A1U2041 A1A1U2042 A1A1U2043 A1A1U2044 A1A1U2045 A1A1U2046 A1A1U3010 A1A1U3020 A1A1U3021 A1A1U3022 A1A1U3023 A1A1U3040 A1A1U3041 A1A1U3042 A1A1U4020 A1A1U4021 A1A1U4040 A1A1U5010 A1A1U5020 A1A1U5040 A1A1U6040 A1A1U7010 A1A1U7040 A1A1U8010 A1A1U8040 A1A1U8041 A1A1U9030

156111400 156049600

IC,DIGITAL:HCTCMOS,GATE;QUAD 2INPUT AND IC,LINEAR:12 BIT PLUS SIGN 1205 IC,DIGITAL:ALSTTL,FLIP FLOP;DUAL JK IC,DIGITAL:HCMOS,FLIP FLOP;QUAD DTYPE IC,DIGITAL:HCMOS,FLIP FLOP;OCTAL DTYPE IC,DIGITAL:FTTL,GATE;TRIPLE 3INPUT NAND IC,INTFC:CMOS,D/A CONVERTER IC,DIGITAL:HCMOS,FLIP FLOP;OCTAL DTYPE IC,DIGITAL:HCMOS,GATE;QUAD 2INPUT NOR IC,DIGITAL:HCMOS,FLIP FLOP;OCTAL DTYPE IC,DIGITAL:HCMOS,FLIP FLOP;QUAD DTYPE IC,LINEAR:DIGITAL TO ANALOG CONVERTER IC,LINEAR:BIPOLAR,VOLT REF;POS,2.5V,1.0% IC,LINEAR:BIPOLAR,OPAMP IC,LINEAR:MOS/FET INP,COS/MOS OUT,OP AMP IC,INTFC:CMOS,D/A CONVERTER IC,LINEAR:DUAL BIFET,OPNL AMPL,LOW OFFSET IC,MISC:CMOS,ANALOG MUX;8 CHANNEL IC,LINEAR:BIPOLAR,OPAMP IC,LINEAR:BIFET,OPAMP;;LF356N,DIP08.3 IC,LINEAR:MOS/FET INP,COS/MOS OUT,OP AMP IC,MISC:CMOS,ANALOG MUX;8 CHANNEL IC,DIGITAL:HCMOS,FLIP FLOP;DUAL JK IC,LINEAR:MOS/FET INP,COS/MOS OUT,OP AMP IC,DIGITAL:FTTL,GATE;QUAD 2INPUT NAND IC,MISC:CMOS,ANALOG MUX;8 CHANNEL IC,LINEAR:MOS/FET INP,COS/MOS OUT,OP AMP IC,LINEAR:VOLTAGE REGULATOR RC4194D,MI

34371 34333

CD74HCT08E17 ADC1205 74ALS113 MC74HC175N SN74HC374N MC 74F10N AD7534JN SN74HC374N MC74HC02AN SN74HC374N MC74HC175N MC3410CL MC1403U OP08FP OR PM308026P CA3160E AD7534JN TL288CP MC14051BCP OP08FP OR PM308026P LF356N CA3160E MC14051BCP MC74HC113N CA3160E MC74F00 (N OR J) MC14051BCP CA3160E SG4194CJ

A1A1VR3030 A1A1VR6030

152064700 152051400
DIODE,ZENER:6.8V,5%,0.4W;1N957B DIODE,ZENER:10V,1%,0.4W;MZ4104D

04713 04713

1N957B MZ4104D
817 1502C MTDR Service Manual

6721391XX

CIRCUIT BD ASSY:FRONT PANEL
A2C1011 A2C1015 A2C2010 A2C2011 A2C2020 A2C2021 A2C2022 A2C2023 A2C2024 A2C2025 A2C2026 A2C2027 A2C2028 A2C2030 A2C2031 A2C2032 A2C2033 A2C2034 A2C3010 A2C3020 A2C3021 A2C3022 A2C3023 A2C3030 A2C3031 A2C3032 A2C3033 A2C3034

CKT BD ASSY:S/R DRIVER SAMPLER (Cont)
A4R2043 A4R2045 A4R2046 A4R2047 A4R2048 A4R2049 A4R2050 A4R2051 A4R2052 A4R2053 A4R2054 A4R3020 A4R3021 A4R3032 A4R3033 A4R3040 A4R3050 A4R3051 A4R3061 A4R3062 A4R3070 A4R3071 A4R3080

321064500

RES,FXD,FILM:100 OHM,5%,0.25W RES,FXD,FILM:120 OHM,5%,0.25W RES,FXD,FILM:47K OHM,5%,0.25W RES,FXD,FILM:24K OHM,5%,0.25W RES,FXD,FILM:100 OHM,5%,0.25W RES,FXD,FILM:5.6K OHM,5%,0.25W RES,FXD,FILM:100 OHM,5%,0.25W RES,FXD,FILM:20K OHM,5%,0.25W RES,FXD,FILM:100 OHM,5%,0.25W RES,FXD,FILM:5.6K OHM,5%,0.25W RES,FXD,FILM:7.5K OHM,5%,0.25W RES,FXD,FILM:10 OHM,5%,0.25W RES,FXD,FILM:37.4K OHM,1%,0.2W RES,FXD,CMPSN:2.7 OHM,5%,0.125W RES,FXD,CMPSN:2.7 OHM,5%,0.125W RES,FXD,FILM:6.04K OHM,1%,0.2W RES,FXD,FILM:10 OHM,5%,0.25W RES,FXD,FILM:10 OHM,5%,0.25W RES,FXD,FILM:130K OHM,1%,0.2W RES,FXD,FILM:12.5K OHM,0.25%,0.125W RES,FXD,FILM:110K OHM,0.25%,0.2W RES,FXD,FILM:100K OHM,0.5%,0.125W RES,FXD,FILM:100K OHM,0.5%,0.125W
CB1015 CB1215 CB4735 CB2435 CB1015 CB5625 CB1015 CB2035 CB1015 CB5625 CB7525 CB1005 CRB20 FXE 37K4 BB27G5 BB27G5 CRB20 FXE 6K04 CB1005 CB1005 CRB20 FXE 130K ADVISE CCF5021103F 5033RC1003D 5033RC1003D

A4T1020

120058200
XFMR,TOROID:2 WINDINGS,067057200
A4TP1020 A4TP1021 A4TP1030 A4TP1060 A4TP1080 A4TP1081

214057900 214057900

B020000 B020000 B020000 B020000 B020000 B020000
B021172 B021172 B021172 B021172 B021172 B021172
TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L
A4TP1082 A4TP1083 A4TP1084 A4TP2060 A4TP3020

214057900

B020000 B020000 B020000 B020000 B020000
B021172 B021172 B021172 B021172 B021172
TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L TERM,TEST POINT:0.052 ID,0.169 H,0.465 L

 

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