HP Vectra VE 5/xxx Series 3 PC

Models and Accessories

Product Number Flexible Drive A: Hard Drive C: Video Controller Cache Std. RAM Multimedia OS
Vectra VE 5/xxx Series 3 PC HP Vectra VE 5/100 Series 3 PC (CPL: 09/96 ) D4051A D4052A D4053A D4054A D4055A D4059A2 1.44 MB None 850 MB IDE SiS 6205 None 8 MB 16 MB 8 MB 16 MB 8 MB None None Yes1
(Unified Memory 1 GB IDE Architecture: no dedicated video RAM) 256 KB User None defined
HP Vectra VE 5/120 Series 3 PC (CPL: 09/96 ) D4061A D4062A D4063A D4064A D4065A D4069A2 1.44 MB None 850 MB IDE SiS 6205 None 8 MB 16 MB 8 MB 16 MB 8 MB None None Yes1
HP Vectra VE 5/133 Series 3 PC (CPL: 09/96 ) D4071A D4072A D4073A D4074A D4075A3 D4079A2

1. 2. 3.

1.44 MB

None 850 MB IDE

SiS 6205
8 MB 16 MB 8 MB 16 MB 8 MB

None Yes1

Dual loading Windows for Workgroups 3.11 or Windows 95. EBTO program (see the Introduction of this edition of the Service Handbook) The D4075G has the same specification, but is a demonstration unit for HP use only.
Medium-Profile Desktop Vectras
HP Vectra VE 5/xxx Series 3 PC 14-1

Supported Accessories

8-MB kit (2 ! 4-MB) 32-bit EDO, 60 ns main memory modules 16-MB kit (2 ! 8-MB) 32-bit EDO, 60 ns main memory modules 32-MB kit (2 ! 16-MB) 32-bit EDO, 60 ns main memory modules 64-MB kit (2 ! 32-MB) 32-bit EDO, 60 ns main memory modules 20 ! 4-MB, 32-bit EDO, 60 ns main memory modules 20 ! 8-MB, 32-bit EDO, 60 ns main memory modules 20 ! 16-MB, 32-bit EDO, 60 ns main memory modules 256 KB synchronous pipeline burst cache memory modules (recommended) 256 KB asynchronous pipeline burst cache memory modules D3646B D3647B D3648B D4543A D2878A D2879A D3649A D3659A D4049A
Documentation HP Vectra VE 5/xxx Series 3 Users Guide Manual Kit Input Devices HP mouse HP keyboard for Windows 95 HP keyboard for OS/2 (recommended) Video Displays All current HP Displays (see the HP Vectra Accessory Service Handbook) Mass Storage 640-MB IDE hard disk 1.2-GB IDE hard disk 1.2-GB IDE hard disk (introduction planned 01-Oct-1996) 2.5-GB IDE hard disk (introduction planned 01-Oct-1996) Flexible disk 3.5-inch 1.44-MB (1-inch high) IDE 8! CD-ROM drive IDE CD-ROM data cable 3.5-inch side mounting rails (packs of 5 pairs) 5.25-inch side mounting rails (packs of 5 pairs) Multimedia PnP Sound controller board + 8! CD-ROM drive D4179A D2929A D2930A D2785A D2786A D2035B D4381A D4099A D3566A D2880A C3751B C4725A C3757B D4050A

BIOS History

The latest BIOS, the flasher utility program, and the BIOS history can each be obtained from HP Electronic Services. BIOS revisions are of the form GX.07.xx.
14-2 HP Vectra VE 5/xxx Series 3 PC

System Board

VESA feature connector JP4 J15 (Reserved)
FDD J7 (CPU bus freq.) CD-ROM HDD

Power connector

Ext. battery connector

Status panel

Ext. Speaker connector
Bank B, Bank C : - pair of identical memory modules or -a single memory module in B1 and/or C1 Bank A : - pair of identical memory modules

Bank A Bank B Bank C

3V Power connector

J6 (sync/async cache)

(ratio bus/CPU frequency)
SW2 (bus/CPU freq. ratio)

SW1 (security features)

Sw1- 1 : bios flash SW1 Sw1- 2 : CMOS Sw1- 3 : password JP4 J6 J15 Keyboard Power-On Cache Memory Type Serial EEprom flag

Simm Connectors

Cache connector

Processor

Processor frequency (MHz) J7
(local bus frequency) short pins short pins short pins short pins short pins short pins short pins
OFF = enable ON = disable OFF = normal ON = clear OFF = normal ON = clear jumper-on = enable no jumper = disable 1-2 = asynchronous 2-3 = synchronous jumper-on (1-2) = normal no jumper = clear ( reserved HP )

SW2 SW2-1 OFF OFF OFF ON ON ON ON
SW2-2 OFF OFF OFF OFF OFF ON ON
2-4 1-3 3-4 1-3 3-4 1-3 3-4

Default config is bold

Main Memory
A pair of identical modules must always be installed in bank A (two memory modules of the same size and type). In banks B and C, it is alternatively permissible to install a single module (in B1 or C1, with the other socket of the bank, B2 or C2, unfilled) or a pair of identical modules. Main memory can be installed up to a maximum of 192 MB. The banks must be filled in order: Bank A, Bank B, Bank C. When Bank C is used, the lowermost ISA slot becomes blocked, and cannot be used. Video memory is allocated as part of the main memory, using the HP Dynamic Video utility under Windows 95, or HP BIOS Setup for other operating systems.
Medium-Profile Desktop Vectras HP Vectra VE 5/xxx Series 3 PC 14-3

Part Numbers

14-4 HP Vectra VE 5/xxx Series 3 PC
Parts List for HP Vectra VE 5/xxx Series 3 PC
Item 1 Box assembly: a b c d e f g 4 Cover lock assembly Serial number label I/O panel blank Filler panel 1.75 inch Filler panel 3.5 inch Filler panel 5.25 inch System board guide Description Repl. Part Number 5064-0215 5062-5590 5182-0030 45935-00004 5042-1155 5063-7067 5063-7066 5042-0507 5042-1177 5042-1485 D2749-63001 D2787-63001 5182-1862 5063-7922 5063-0309 D2035-63121 5182-1037 C3751-60201 5063-9066 1420-0513 5063-7956 5063-9086 D2749-69001 D2787-69001 Exchange Part Number
Rear bezel connector label Left VE logo bezel IDE hard disk drive (standard) MB 1 GB
IDE hard disk cable Rail kit 1 3.5 inch plus 1 5.25 inch 1 3.5 inch
Flexible disk drive Flexible disk drive cable Mouse System board Power supply2 4.5V external battery (not bundled) Status (control) panel Backplane board
See PCs system board parts list
For optional disk drive information, see the Accessory Service Handbook. If the power supply or fan appear to be not working, make sure first that it is not because they have gone into self-protection mode. Unplug the power cord from the mains supply for 60 seconds, and then plug it back in and attempt to restart the PC.

HP Vectra VE 5/xxx Series 3 PC 14-5
System Board Parts List for HP Vectra VE 5/xxx Series 3 PC
Description System board: Vectra VE 5/xxx Series 3 Processors: Intel Pentium P54C 100 MHz (VCC) Intel Pentium P54C 120 MHz (VCC) Intel Pentium P54CS 133 MHz (VCC) Heatsink and clip 5063-7059 5063-8765 5063-7974 1205-0832 5063-7942 5063-7941 5063-7944 5063-7945 1818-6431 1420-0356 D4051-63001 D4051-69001 Repl. Part Number Exchange Part Number
Cache memory modules (pipeline burst) 256 KB synchronous cache memory Main memory modules: 1 ! 4-MB main memory 60-ns EDO RAM 1 ! 8-MB main memory 60-ns EDO RAM 1 ! 16-MB main memory 60-ns EDO RAM 1 ! 32-MB main memory 60-ns EDO RAM Batteries: 3 V system board battery (type CR2032)
Software for HP Vectra VE 5/xxx Series 3 PC
DOS and Windows 3.x drivers: disk kit also available from HP BBS or WWW 5063-9036
Manuals and Documentation for HP Vectra VE 5/xxx Series 3 PC
Users Guide (Setting up the PC and Troubleshooting) HP Help (Using the PC and Technical information) Familiarization Guide Technical Reference Manual: hardware and BIOS

1. Electronic file only.

D4050-90001 online 1 D4050-90901 D4050-90911 1
14-6 HP Vectra VE 5/xxx Series 3 PC

Technical Reference Manual Vectra Technology
This manual is a technical reference document for engineers and technicians providing system level support. It is assumed that the reader possesses a detailed understanding of AT-compatible microprocessor functions and digital addressing techniques. Technical information that is readily available from other sources, such as manufacturers proprietary publications, has not been reproduced. This manual contains summary information only. For additional reference material, refer to the bibliography inside this document.
HP Vectra VEi 7, VEi 8, VLi 8 and VLi 8 SF PCs

Contents

Core Components and Technologies Processors. 8
Intel Celeron (Socket 370). Intel Pentium II. Intel Pentium III. GTL+ Technology. Pentium Processor Packages. 9

Chip Sets. 11

The Intel 440ZX AGPset (VEi 8, VLi 8 and VLi 8SF PCs). 11 Intel 440ZX PAC Chip.11 The PIIX4E PCI/ISA Bridge Chip (82371EB).13 The SiS 620/5595 Chip Set (VEi 7 PCs). 17 The SiS 620 Chip.17 The SiS 5595 PCI/ISA Bridge Chip.18

Mass-Storage Devices. 22

Ultra-ATA Hard Disk Drives. DVD Drives. 22 24
AGP Graphics Controllers. 26
Matrox Millennium G200 AGP Graphics (VEi 8, VLi 8 and VLi 8SF PCs). 26 SiS Super AGP Graphics (VEi 7 PCs). 29
Crystal Integrated PCI Audio. 30 Network Features. 33
HP 10/100 3Com 3C905B-TX Network Interface Card (D7504A and D7505A) 33

Francais iii

HP 10/100 Intel PRO/100+ Management Adapter (D7506A and D7507A). 34 LAN Card Ready Program. 34

Input Devices.

Standard HP Keyboard. 35 Enhanced HP Keyboard. 35 Scrolling Mouse. 36 Specifications. 36

Connectors and Sockets.

iv Francais

Bibliography

Data sheets can be obtained at: Matrox Millennium G200 AGP (graphics controller)
www.matrox.com/mga/products/millennium_g200/home.htm
Intel Chipsets. 440ZX AGPSet (82443ZX) and PIIX4E PCI/ISA Bridge Chip (82371EB)
www.intel.com/design/chipsets/datashts
SiS Chipsets. SiS620 and SiS5595 PCI/ISA Bridge Chip (includes information on the integrated super AGP graphics controller)
www.sis.com/tw/products/pentium2/s620.htm
Celeron, Pentium II & Pentium III Processors
www.intel.com/design/celeron/datashts www.intel.com/design/pentiumII/datashts www.intel.com/design/pentiumIII/datashts

PC Data Sheets

www.hp.com/vectra

Crystal Audio

www.cirrus.com/products/overviews/cs4280.html www.cirrus.com/products/overviews/cs4297.html

Intel LAN card

www.intel.com/network/products/pro100mgmt.htm
Hewlett-Packard white papers are available on a variety of subjects including AGP graphics, SDRAM memory and the Ultra ATA/33 protocol at: www.hp.com/desktop/library/wp.html
Core Components and Technologies
This chapter describes core components of the PCs such as processors, chip sets, mass storage devices, graphics controllers, audio controllers, network features and input devices.
Core Components and Technologies Processors

Processors

Intel Celeron (Socket 370)
The Socket 370 Intel Celeron processor has the following features:
128K on-die L2 cache Intel MMX technology, which gives higher performance for media, communications and 3D applications.
Socket 370 is a conversion of Slot 1 (used by the Pentium II and Pentium III) to a socket. The Socket 370 Celeron shares the same P6 microarchitecture as the Pentium II. The reduction in size achieved by the Socket 370 Celeron is due to the integration of the L2 cache on the processor die. The heatsink is supplied separately from the processor. The processor is locked in place in the plastic pin grid array (PPGA) by a lever. Thermal efficiency is further enhanced by a heat interface gum supplied with the heatsink.

Intel Pentium II

The Pentium II processor connects to the motherboard via a single edge 242-contact slot (Slot 1) connector. It comes in either a SECC or a SECC 2 package (see Pentium Processor Packages below). The Pentium II processor has several performance-enhancing features:
Dual Independent Bus architecture, which combines a dedicated 64bit L2 cache bus (supporting level cache sizes of 512K), plus a 64-bit system bus with non-ECC that enables multiple simultaneous transactions. Intel MMX technology, which improves video compression/decompression, image manipulation, encryption and I/O processing. Dynamic execution to speed up software performance.

Intel Pentium III

The Pentium III processor uses the same basic core and L2 cache as the Pentium II. In addition to this, however, it uses 70 new multimediaoriented instructions known as SSE (streaming SIMD extensions). These SIMD (single instruction multiple data) instructions enable the CPU to perform simultaneous floating point calculations on multiple data. This brings substantial improvements to 3D graphics, video encoding and decoding and other floating point-intensive operations that operate on large sets of data such as voice recognition. Like the Pentium II, the Pentium III processor connects to the motherboard by a Slot 1 connector. It comes in a SECC 2 package only (see Pentium Processor Packages below).

The Intel 440ZX AGPset is used in conjunction with either a Socket 370 Celeron, a Pentium II or a Pentium III processor depending on the model of PC. For information on the various configurations available, refer to the Technical Reference Manual - Product Line Overview. The 440ZX chip set is derived from and has the same benchmarks as the 440BX. The only differences in features are:
512MB of RAM supported instead of 1GB on the 440BX One less PCI master No ECC memory support.
The Intel 440ZX AGPset is comprised of two chips: the 440ZX PAC (PCI AGP Controller) chip and the PIIX4E chip.
The PAC chip (440ZX) is the bridge between four buses: the Processor Local Bus (GTL+, also referred to as the Host, or Front Side Bus), the main memory bus, the PCI bus and the AGP (graphics) bus. The PIIX4E chip is the bridge between three buses: the PCI bus, the SM bus and the ISA bus. In addition, it contains the IDE controller, USB controller and Power Management logic.
The Intel 440ZX AGPset is contained in a Ball Grid Array (BGA) package, giving a smaller footprint and higher reliability. The two chips that make up the Intel 440ZX AGPset are explained below:

Intel 440ZX PAC Chip

The 440ZX PAC chip integrates a Host-to-PCI bridge, optimized DRAM controller and data path, and an Accelerated Graphics Port (AGP) interface. AGP is a high performance, component level interconnect, targeted at 3D graphics applications.
Features of the Intel 440ZX Chip Processor Local Bus Interface
The 440ZX chip monitors each cycle that is initiated by the processor, and forwards those to the PCI bus that are not targeted at the local memory. It translates Processor Local (PL) bus cycles into PCI bus cycles. The chip can support one processor at up to 100MHz Front Side Bus clock frequency.

PCI Bus Interface

The 82443ZX PCI interface is 3.3V (5V tolerant), 33 MHz and is PCI 2.1 compliant. The maximum PCI burst transfer rate is 132 MB/s. The chip supports advanced snooping for PCI master bursting, and provides a pre-fetch mechanism dedicated for IDE read. The PCI arbiter supports PCI bus arbitration for up to six masters using a rotating priority mechanism. Its hidden arbitration scheme minimizes arbitration overhead. A controller for the AGP (Accelerated Graphics Port) slot is integrated in the 440ZX PAC chip. The PAC chip supports only a synchronous AGP interface, coupling to the host bus frequency. The AGP characteristics are described in detail in Matrox Millennium G200 AGP Graphics (VEi 8, VLi 8 and VLi 8SF PCs) on page 26. The main memory controller in the 440ZX chip supports two DIMM slots. Each slot can host a 168-pin unbuffered SDRAM module, running at 100MHz, for a total of up to 512 MB of dynamic random access memory (non-ECC SDRAM). The memory bus is 72-bits wide, comprised of 64 bits of data and 8 bits of ECC. However, the 440ZX chip does not support ECC operation.

ISA Bus Interface

SMBus Controller

IDE Controller

USB Controller

Ultra DMA Controller

Interrupt Controller
The interrupt controller incorporates the functionality of two 82C59 interrupt controllers. The two controllers are cascaded, supporting 15 interrupts (edge/level triggered). The chip contains a three-channel 82C54 counter/timer. The counters use a division of the 14.318 MHz OSC input as the clock source. For tips on where to find more information on the Intel 440ZX AGPset, refer to the bibliography at the beginning of this document.

Counter / Timer

The SiS 620/5595 Chip Set (VEi 7 PCs)
The SiS 620/5595 chip set is used in conjunction with a Socket 370 Celeron processor. The SiS 620/5595 chip set is comprised of two chips: the SiS 620 host chip and the SiS 5595 PCI/ISA bridge chip.
The SiS 620 is the bridge between three buses: the Processor Local Bus (GTL+, also referred to as the Host, or Front Side Bus), the main memory bus, and the PCI bus. The SiS 5595 chip is the bridge between three buses: the PCI bus, the SM bus and the ISA bus. In addition, it contains the USB controller and Power Management logic.

The SiS 620 Chip

The SiS620 integrates the host bus interface, the DRAM controller, the IDE controller, the PCI interface, 2D/3D Graphics accelerator and video playback accelerator. The SiS 620 is contained in a Ball Grid Array (BGA) package, giving a smaller footprint and higher reliability.
Features of the SiS 620 chip PL Bus Interface
The SiS 620 chip monitors each cycle that is initiated by the processor, and forwards to the PCI bus those that are not targeted at the local memory. It translates PL (Processor Local) bus cycles into PCI bus cycles. The chip can support one Celeron processor at a Front Side Bus clock frequency of 66 MHz.
The PCI interface is PCI2.2 compliant and supports up to 4 PCI masters. The built-in PCI arbiter uses a rotating priority arbitration scheme with guaranteed minimum access time for PCI masters, providing fair access and low latency for each PCI master.
DRAM (Main Memory) The DRAM controller supports two DIMM slots. The maximum system memory size supported is 512MB. The memory clock frequency can be Controller
operated at up to 100MHz and can be in synchronous or asynchronous modes with respect to host bus frequency. The host/DRAM clock scheme is 66/66MHz.
The PCI master/slave IDE controller supports four devices, two on each of two channels. The SiS 620 chip defines a data buffering scheme to support the required level of concurrent operations and provide adequate sustained bandwidth between the DRAM subsystem and all other system interfaces (Host, AGP and PCI). The SiS 620 chip operates the host interface at 66 MHz, the SDRAM/core at 66 MHz, PCI at 33 MHz and AGP at 66 MHz. Coupling between all interfaces and internal logic is done in a synchronous manner. The clocking scheme uses an external clock synthesizer (which produces reference clocks for the host and PCI interfaces).

The SiS 5595 PCI/ISA Bridge Chip
The SiS 5595 chip is a multi-function PCI device implementing a PCIto-ISA bridge function, a PCI IDE function, a Universal Bus host/hub function, and an Enhanced Power Management function. The following figure shows an example of the system block diagram using the SiS 5595 chip.
SiS 5595 PCI-ISA Bridge Chip Block Diagram
Hard Disk BMI IDE Ultra DMA/33 Host Bridge & super AGP (SiS620) Memory Bus
DVD/Zip PCI Bus (3.3V or 5V, 33 MHz)
USB 1 PCI/ISA Bridge (SiS5595) KBD Mouse USB2 GP[I,O] (30+) SM Bus
SP, PP, FDC ISA/EIO Bus (5V)
Features of the SiS 5595 Chip PCI Bus Interface
This part of the chip is responsible for transferring data between the PCI bus and the ISA expansion bus. It performs PCI-to-ISA, and ISA-toPCI bus cycle translation. It supports the Plug-and-Play mechanism. Data buffers are provided to isolate the PCI and ISA buses. As well as accepting cycles from the PCI bus interface, and translating them for the ISA bus, the ISA bus interface also requests the PCI master bridge to generate PCI cycles on behalf of a DMA or ISA master. The ISA bus interface contains a standard ISA bus controller and data buffering logic. It can directly support six ISA slots without external data or address buffering. The System Management (SM) bus is a two-wire serial bus provided by the SiS 5595 controller. It runs at a maximum of 16 kHz. The bus monitors some of the hardware functions of the main board, both during boot-up and run-time. All access to the SM bus is handled by the main processor, via the SiS 5595 SM bus registers. The PCI USB (Universal Serial Bus) controller, supports two stacked USB connectors on the back panel. These ports are built into the SiS5595 controller as standard USB ports. The seven channel DMA controller incorporates the functionality of two 82C37 DMA controllers. Channels 0 to 3 are for 8-bit DMA devices, while channels 5 to 7 are for 16-bit devices. The channels can be programmed for any of the four transfer modes: the three active modes (single, demand and block), can perform three different types of transfer: read, write and verify. The address generation circuitry supports 24-bit addresses for DMA devices. The interrupt controller incorporates the functionality of two 82C59 interrupt controllers. The two controllers are cascaded, supporting 15 interrupts (edge/level triggered).
The chip contains a three-channel 82C54 counter/timer. The counters use a division of the 14.318 MHz OSC input as the clock source. For tips on where to find more information on the SiS 620/5595 chip set, refer to the bibliography at the beginning of this document.
Core Components and Technologies Mass-Storage Devices

Mass-Storage Devices

Ultra-ATA Hard Disk Drives
ATA (AT Attachment) is a disk drive implementation designed to integrate the controller into the drive itself, thereby reducing interface costs. Ultra-ATA bridges the gap between the current standard (ATA-3) and the upcoming standard ATA-4. Ultra-ATA adds a new, high performance mode: DMA/33 with 33MB/s bandwidth, twice that of DMA mode 2. Ultra-ATA provides higher levels of disk throughput (with a burst transfer rate of 33 megabytes per second) yet also enhancing data integrity. A checksum is added to the data sent over the ATA interface. That way, data corruption can be detected and the data retransmitted. Ultra-ATA improves timing margins by eliminating propagation and data turnaround delays. During a read under Fast ATA, the drive must wait for the strobe from the host (propagation delay) before taking some time to respond by putting data on the bus (data turnaround delay) - for which the host must then wait (more propagation delay). All these events must occur with a fixed time window between the falling edge of the strobe and the rising edge, when data is latched in the host. The Ultra-ATA protocol eliminates these delays by having the drive be the source of both the strobe and the data during a read. Since the strobe and data signal travel in the same direction down the cable simultaneously, propagation delay in the opposite direction is eliminated. And since the drive controls both strobe and data, there is no data turnaround delay. With the time window remaining constant, less delay means improved timing margins during reads.

On top of improved timing margins, the protocol of Ultra-ATA also implements a significant feature new to ATA called Cyclical Redundancy Check (CRC) to provide data protection verification. CRC is calculated on a per-burst basis by both the host and the drive, and is stored in their respective CRC registers. At the termination of each burst, the host sends the contents of its CRC register to the drive, which compares it against its own register's contents. For even greater integrity, the protocol can be used at speeds slower than its maximum 33MB/s. In these cases, signal and data integrity will still surpass that of Fast ATA and earlier protocols at a given burst transfer rate. In fact, the slower the Ultra-ATA transfer speeds, the greater the integrity margins. To access HPs white paper on the Ultra ATA/33 protocol, refer to www.hp.com/desktop/library/wp.html.
S.M.A.R.T. Technology S.M.A.R.T. or Self Monitoring Analysis and Reporting Technology allows
the hard disk drive to report certain types of degradation or impending failure. This allows the operating system to take the necessary precautions and warn the user. The system is comprised of software that resides both on the disk drive and on the host computer. The disk drive software monitors the internal performance of the motors, media, heads, and electronics of the drive, while the host software monitors the overall reliability status of the drive. The reliability status is determined through the analysis of the drive's internal performance level and the comparison of internal performance levels to predetermined threshold limits.
DVD Drives Digital Versatile Disk (DVD) Technology
Digital Versatile Disc (DVD) is a medium for the distribution of from 4.7 to 17 GB of digital data on a 120-mm (4.75 inch) disc. This huge volume of data (CD-ROMs can store 680 MB) can be used to store up to nine hours of studio quality video and multi-channel surround-sound audio, highly interactive multimedia computer programs, 30 hours of CDquality audio, or anything else that can be represented as digital data. A DVD looks like a CD-ROM: it is a silvery disc, 4.75 inches in diameter, with a hole in the center. Like a CD, data is recorded on the disc in a spiral trail of tiny pits, and the discs are read using a laser beam. The DVD's larger capacity is achieved by making the pits smaller and the spiral tighter, and by recording the data in as many as four layers, two on each side of the disc. To read these tightly packed discs, lasers that produce a shorter wavelength beam of light are required, as are more accurate aiming and focusing mechanisms. In fact, the focusing mechanism is the technology that allows data to be recorded on two layers. To read the second layer, the reader simply focuses the laser a little deeper into the disc, where the second layer of data is recorded. Not only are two layer discs possible, but so are double-sided discs. The availability of four layers is what gives DVD its 17 gigabyte capacity.

DVD Diameter Thickness Track Pitch Minimum Pit Length Laser Wavelength Data Capacity (per layer) Layers 120mm 0.6 mm 0.74 nanometers 0.40 nanometers 640 nm 4.7 GB 1,2,4 120mm 1.2 mm 1.6 nanometers 0.834 nanometers 780 nm 0.68 GB 1 CD
Audio features of DVD- A DVD-Video disc can have up to 8 audio tracks (streams). Each track can be in one of three formats: Video
Dolby Digital (Dolby AC-3): 1 to 5.1 channels MPEG-2 audio: 1 to 5.1 or 7.1 channels LPCM: 1 to 8 channels.
Dolby Digital is multi-channel digital audio, using lossy AC-3 coding technology from original PCM with a sample rate of 48 kHz at up to 24 bits. The bitrate is 64 kbps to 448 kbps, with 384 being the normal rate for 5.1 channels and 192 being the normal rate for stereo (with or without surround encoding). MPEG audio is multi-channel digital audio, using lossy compression from original PCM format with sample rate of 48 kHz at 16 bits. Both MPEG-1 and MPEG-2 formats are supported. The variable bitrate is 32 kbps to 912 kbps, with 384 being the normal average rate. MPEG-1 is limited to 384 kbps. Linear PCM is uncompressed (lossless) digital audio, the same format used on CDs and most studio masters. It can be sampled at 48 or 96 kHz with 16, 20, or 24 bits/sample. (Audio CD is limited to 44.1 kHz at 16 bits.) There can be from 1 to 8 channels. The maximum bitrate is 6.144 Mbps.

DVD Region Codes

DVD Regional Locking is a system used to control which DVD movies play on which DVD Players. For example, if the first DVD-Video disc played on a DVD device is from Region 1, the device can subsequently only play DVD-Video discs from that region. The regions are broken down as follows:
Regional Codes Region USA & Canada Europe & Japan South East Asia Latin America & Australia Russia, Rest of Asia, Africa China
Core Components and Technologies AGP Graphics Controllers

AGP Graphics Controllers

AGP technology was developed as a means of accessing system memory as a viable alternative to augmenting the memory of the graphics subsystem needed for high quality 3D graphics applications. All the PCs covered in this manual support an AGP device (Matrox MGA-G200, 8MB, not upgradeable, or SiS super AGP, 4MB upgradeable to 8MB).
Matrox Millennium G200 AGP Graphics (VEi 8, VLi 8 and VLi 8SF PCs)
The Matrox Millennium G200s 128-bit DualBus architecture uses two independent 64-bit buses to allow faster management of data and process graphics. The G200 graphics chip also provides full AGP 2X optimization based on Symmetrical Rendering Architecture. This enables faster data transfer rates and drawing engine access to both frame buffer and system memory. The Millennium G200 uses a high-speed 250 MHz RAMDAC to eliminate screen flicker and produce crystal clear displays. Its 250 MHz RAMDAC incorporates ultra-high bandwidth DAC for sharp display images.

128-bit Dual Bus Architecture
The 128-bit DualBus uses two independent 64-bit buses that operate in parallel inside the graphics engine to effectively double the raw performance of almost every operation. In addition, the 128-bit DualBus architecture uses Dual Command Pipelining so that read and write phases of two consecutive commands can be overlapped and executed simultaneously. This system allows very fast 2D performance even at the most demanding resolutions and color depths. The 64-bit granularity of the 128-bit DualBus means that for frequent copying of small bitmaps and fonts, performance is much higher than with a traditional 128-bit architecture.
Vibrant Color Quality (VCQ) Rendering
Vibrant Color Quality Rendering (VCQ) uses 32-bpp color accuracy throughout the rendering pipeline. VCQ is capable of rendering displayed images in 32-bpp color from source texture maps of up to 32bpp color. Additionally, VCQ architecture provides high quality analog color output to avoid 'washed out' images. VCQ delivers sharp contrast and highly saturated colors for maximum photo-realism. The Millennium G200s Symmetric Rendering Architecture (SRA) treats AGP memory exactly as if it were local video memory. It is able to draw to, render to and read from AGP memory using the high bandwidth of the AGP 2X bus. The G200 also uses the SRA to implement a hierarchical texturing system (HTS) for 3D rendering. With HTS, the G200 offers the storage of surfaces - either textures, bitmaps or video streams - across three levels depending on the frequency of use or the size of the texture in most cases. The first level is the large on-chip cache, the second level is the 8MB of local video memory and the third level is the AGP memory. Trilinear filtering is an advanced texture filtering algorithm that provides image quality much higher than bilinear filtering and must be calculated on a per pixel basis. The trilinear filtering algorithm checks texel scale factors1 on a per pixel basis and uses the scale factor to index into two adjacent MIP maps. It then takes four texels from each MIP, bilinearly filtering each set of four pixels and then averages the results based on scale factor. The highest resolution source texture maps available are always used for rendering unless the application specifically provides lower resolution MIP maps to be used in conjunction with high resolution textures. The fast 3D engine of the G200 provides high performance without needing to downscale textures. Allows high quality rendering without compromising performance and prevents blurry images.
Symmetric Rendering Architecture (SRA)
Per Pixel Trilinear Filtering

Full Resolution Rendering
The texel scale factor is the ratio between the size of the rendered texture versus the size of the source texture. 27
Full Scene Anti-aliasing Full scene anti-aliasing is a technique where all low resolution aliasing
artifacts are removed from the image. This is done in an independent manner, meaning that it is application independent. Full scene antialiasing removes "jaggies" from rendered scenes so that images in CAD, animation and 3D appear smooth and realistic.
AGP PCI Bus Implementation
In the diagram below, the AGP Bus is viewed as a PCI bus with extra data lines.

Pentium Processor

AGP Device

PCI Bus # MHz

100 MHz ZX-Device 1 AGP Port Virtual PCI-PCI Bridge 440 ZX - Device 0 Host to PCI Bridge Host bus and DRAM interfaces PCI Bus # 0

PCI/ISA Bridge (PIIX4E)

SiS Super AGP Graphics (VEi 7 PCs)
SiS super AGP graphics is an integrated 3D graphics system built in to the SiS 620 chip. Super AGP has the following features:
Integrated 2D Accelerator
The integrated 2D accelerator is a 64-bit BITBLT graphics engine. It supports all 256 raster operations and DirectDraw. The accelerated primitives include: BLT, Transparent BLT, Color expansion, Clipping, Multiple scanline, Polylines, Patterns, Trapezoid Fills. Up to 8MB of frame buffer can be used with linear addressing. The integrated 3D graphics accelerator is composed of the triangle setup engine and the rendering engine. The hardware acceleration features can be enabled by the SiS driver under Direct 3D and OpenGL. Supported 3D quality acceleration includes: Gouraud Shading, Z buffer, Alpha buffer, Perspective Correction, MipMapping, Tri-linear Texture Filtering, Specular Lighting and Dithering. The integrated graphics accelerator is compatible with AGP1.0 and PCI 2.2 configurations. Display memory can be up to 8MB of SGRAM. The super AGP architecture provides a bandwidth of 800MB/s between VGA and the host bus, an increase of 50% compared with AGP 2X mode (532MB/s). The display memory interface bus frequency can also be operated at up to 100MHz, with a 64-bit data path.

Integrated 3D Accelerator
Integrated Graphics Accelerator
Core Components and Technologies Crystal Integrated PCI Audio
Crystal Integrated PCI Audio
The Crystal integrated PCI audio solution in the PC is a two-chip solution made up of the CrystalClear CS4280 PCI audio controller and the CrystalClear CS4297 Audio Codec 97. The audio controller interfaces with the PCI bus and performs all digital operations such as sample rate conversions and synthesis. The CS4297 chip mixes and processes all the analog signals. A typical signal-to-noise ratio is 95 dB, compared with 85 dB at best for ISA audio solutions. High fidelity audio is achieved through features such as differential CD audio input, which cancels out PC activity noise. In addition, the systems converters use a highly efficient over-sampling scheme to perform 18 bit analog-to-digital and digital-to-analog conversion. Through its use of DirectX, this Crystal audio solution offers high-end audio features such as 3-D localization, surround sound, room effects and Doppler effect. The Crystal PCI audio solution includes an integrated FM synthesizer, Plug-and-Play interface and power management features. There is an internal connection for CD-ROM and DVD drives, and external stereo in, stereo out and microphone in sockets. Crystal audio is not SoundBlaster compatible. The Crystal audio solution has been optimized for Windows-based platforms, while supporting the other major operating systems. It is therefore fully compatible with any application written for a Windows environment. Moreover, it is possible to play back virtually any PC audio format using Microsofts Media Player 6. This player can process new formats through the use of plug-ins and can decode the following formats by default:
File Formats Midi files (music synthesis) MOD tracker files (enhanced music playback) File Extension.rmi.mid.mod
File Formats Windows audio files
File Extension.wav.asx.asf.ra.ram.rm.rmm
RealAudio and RealVideo streams
AVI (Audio Visual Interleave) video files MPEG video files

.avi.mpg.mpeg.m1v.mp2.mpa.mpe.qt.aif.aifc.aiff.mov.au.snd
QuickTime audio video files
Sun Microsystems and NeXT audio files
CS4280 PCI Audio Interface Features
PCI Version 2.1 Bus Master Windows 95, Windows 98, Windows NT 4.0, Windows NT 5.0 (WDM) Drivers PC97 and PC98 Compliance MPU-401 interface, FM synthesizer, and Game Port Full duplex operation Advanced Power Management (PPMI)
CS4297 Audio Codec 97 Features
AC97 1.03 compatibility Sophisticated mixed signal technology 18-bit stereo full-duplex Codec with fixed 48kHz sampling rate High quality differential CD input Mono microphone input Two analog line-level stereo inputs for LINE IN and CD (or VIDEO) connection Single stereo line level output Extensive power management support Meets Microsofts PC97 and PC98 audio performance requirements
Core Components and Technologies Network Features

Network Features

The LAN cards described in this section are qualified for use with your PC. To order one of these products, refer to HPs Web site at: www.hp.com/go/vectraaccessories.
HP 10/100 3Com 3C905B-TX Network Interface Card (D7504A and D7505A)
This network interface device is integrated on the riser card on some models. To see whether a PC has integrated networking, refer to the Technical Reference Manual - Vectra Product Line Overview.
Card Features LAN Interface Power Management Manageability Diagnostics 32 bits PCI 10/100 BT RJ 45 LAN port RPO (Remote Power-On) and RWU (Remote Wake-Up) for APM Windows 95 and Windows 98 (SR # 1 only) On Now 1.0; APM 1.2; ACP 1.0 PCI Power Management 1.0
DMI 2.0 Component Code Production Diag MAC address DOS report tool User Diag for MS-DOS, Windows 95, Windows 98 and Windows NT 4.0

Drivers

Windows 95, Windows 98, Windows NT 4.0, Windows 3.11, Windows NT 3.5.1, OS2 (Warp4), MS-DOS Specifications

Network Interface

10 Mbps Ethernet 10BASE-T: Ethernet IEEE 802.3 industry standard for a 10 Mbps baseband CSMA/CD local area network. 100 Mbps Ethernet 100BASE-TX: Ethernet IEEE 802.3u industry standard for a 100 Mbps baseband CSMA/CD local area network. Height: 8.57 cm (3.75 in.) Length: 12.07 cm (4.75 in.)
Physical Dimensions of the card
HP 10/100 Intel PRO/100+ Management Adapter (D7506A and D7507A)
Card Features LAN Interface Power Management Manageability Diagnostics 32 bits PCI 10/100 BT RJ 45 LAN port RPO (Remote Power-On) and RWU (Remote Wake-Up) for APM Windows 95 and Windows 98 (SR #1 only) On Now 1.0; APM 1.2; ACPI 1.0 PCI Power Management 1.0
DMI 2.0 Component Code Production Diag MAC address DOS report tool User Diagfor MS-DOS, Windows 95, Windows 98 and Windows NT 4.0
10 Mbps Ethernet 10BASE-T: Ethernet IEEE 802.3 industry standard for a 10 Mbps baseband CSMA/CD local area network. 100 Mbps Ethernet 100BASE-TX: Ethernet IEEE 802.3u industry standard for a 100 Mbps baseband CSMA/CD local area network. Height: 5.1cm (2.01 in.) Length: 12.1cm (4.76 in.)

Physical Dimensions

LAN Card Ready Program
The HP LAN Card Ready (LCR) Program provides drivers and installation information for LAN cards by third-party manufacturers that have been tested on your PC. By using the exact configuration tested by HP, you will be able to install the LAN card more quickly and avoid many of the problems that can occur due to resource conflicts and incompatible driver revisions.
Core Components and Technologies Input Devices
Follow the LAN Card Ready link from HPs Support Web site at: www.hp.com/go/vectrasupport to access LAN information and drivers tested on your PC.

Input Devices

Standard HP Keyboard
The standard HP keyboard has the following features:
Euro symbol available on selected localizations if supported by the operating system (Windows 98, Windows NT 5.0). See Microsofts Web site for more details 6-pin Mini-Din style Keyboard with Windows keys Available in 30 languages Power on function from the space bar supported on some PC models Includes 12 function keys, numeric keypad and cursor keys
The standard keyboard kit includes 1 keyboard with 104 or 105 keys and a Working in Comfort booklet.

Enhanced HP Keyboard

The enhanced HP keyboard has a number of multimedia features not present on a standard keyboard. You can, for example, connect a headset and microphone to the keyboard. In this instance the headset and microphone cables supplied with the keyboard must be connected to the appropriate PC connectors. You can control and mute the PCs audio volume, put the PC in suspend or lock mode, launch a Web browser or use programmable QuickLaunch keys to launch applications open files or perform other actions.

Scrolling Mouse

The HP Scrolling Mouse provides the following benefits: Quicker and smoother scrolling through screens of information Immediate zooming on data without having to action scrollbars, menus or buttons Full functionality on supporting applications, including Microsoft Office 97
You can easily configure the scrolling wheel to take full advantage of the functionality provided by an increasing number of applications or simply use it as a third button. The scrolling mouse kit includes 1 scrolling mouse and 2 driver floppies.

Specifications

PS/2 compatible mouse with rubber scrolling wheel, including miniDIN connector Allows scrolling in Windows 95, 98, NT applications (not only Office 97-compatible applications) Allows configuration of the wheel as a 3rd button.
Core Components and Technologies Connectors and Sockets

Connectors and Sockets

IDE and Floppy Disk Drive Connectors

Socket Pin Layouts

Ethernet UTP Connector

VGA Connector

Keyboard and Mouse Connector
Parallel Port Connector Serial Port Connector
The Technical Reference Manual contains the following documents downloadable from the Web in PDF format:
Introduction & Vectra Product Line Overview Describes how to use the Technical Reference Manual and provides a brief overview of VEi and VLi PCs. Product Description A separate document exists for VEi 7 models, VEi 8 models and VLi 8/VLi 8SF models, providing detailed BIOS information and summary information on the hardware components in the PC. Vectra Technology The document you are reading. A detailed look at the hardware components in all the PCs in the product line. Includes information on processors, chip sets, graphics controllers, network cards, connectors and sockets.